.. | .. |
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40 | 40 | { |
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41 | 41 | union mips_instruction *insn_p; |
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42 | 42 | union mips_instruction insn; |
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| 43 | + long offset; |
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43 | 44 | |
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44 | 45 | insn_p = (union mips_instruction *)msk_isa16_mode(e->code); |
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45 | | - |
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46 | | - /* Jump only works within an aligned region its delay slot is in. */ |
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47 | | - BUG_ON((e->target & ~J_RANGE_MASK) != ((e->code + 4) & ~J_RANGE_MASK)); |
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48 | 46 | |
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49 | 47 | /* Target must have the right alignment and ISA must be preserved. */ |
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50 | 48 | BUG_ON((e->target & J_ALIGN_MASK) != J_ISA_BIT); |
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51 | 49 | |
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52 | 50 | if (type == JUMP_LABEL_JMP) { |
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53 | | - insn.j_format.opcode = J_ISA_BIT ? mm_j32_op : j_op; |
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54 | | - insn.j_format.target = e->target >> J_RANGE_SHIFT; |
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| 51 | + if (!IS_ENABLED(CONFIG_CPU_MICROMIPS) && MIPS_ISA_REV >= 6) { |
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| 52 | + offset = e->target - ((unsigned long)insn_p + 4); |
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| 53 | + offset >>= 2; |
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| 54 | + |
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| 55 | + /* |
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| 56 | + * The branch offset must fit in the instruction's 26 |
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| 57 | + * bit field. |
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| 58 | + */ |
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| 59 | + WARN_ON((offset >= (long)BIT(25)) || |
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| 60 | + (offset < -(long)BIT(25))); |
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| 61 | + |
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| 62 | + insn.j_format.opcode = bc6_op; |
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| 63 | + insn.j_format.target = offset; |
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| 64 | + } else { |
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| 65 | + /* |
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| 66 | + * Jump only works within an aligned region its delay |
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| 67 | + * slot is in. |
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| 68 | + */ |
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| 69 | + WARN_ON((e->target & ~J_RANGE_MASK) != |
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| 70 | + ((e->code + 4) & ~J_RANGE_MASK)); |
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| 71 | + |
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| 72 | + insn.j_format.opcode = J_ISA_BIT ? mm_j32_op : j_op; |
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| 73 | + insn.j_format.target = e->target >> J_RANGE_SHIFT; |
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| 74 | + } |
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55 | 75 | } else { |
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56 | 76 | insn.word = 0; /* nop */ |
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57 | 77 | } |
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