add new system file

hc

2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/arch/mips/kernel/genex.S
..
..
@@ -18,6 +18,7 @@
18
18
 #include <asm/fpregdef.h>
19
19
 #include <asm/mipsregs.h>
20
20
 #include <asm/stackframe.h>
21
+#include <asm/sync.h>
21
22
 #include <asm/war.h>
22
23
 #include <asm/thread_info.h>
23
24
 
..
..
@@ -32,9 +33,6 @@
32
33
 NESTED(except_vec3_generic, 0, sp)
33
34
 	.set	push
34
35
 	.set	noat
35
-#if R5432_CP0_INTERRUPT_WAR
36
-	mfc0	k0, CP0_INDEX
37
-#endif
38
36
 	mfc0	k1, CP0_CAUSE
39
37
 	andi	k1, k1, 0x7c
40
38
 #ifdef CONFIG_64BIT
..
..
@@ -356,8 +354,9 @@
356
354
 
357
355
 #ifdef CONFIG_SMP
358
356
 1:	PTR_LA	k0, ejtag_debug_buffer_spinlock
359
-	ll	k0, 0(k0)
360
-	bnez	k0, 1b
357
+	__SYNC(full, loongson3_war)
358
+2:	ll	k0, 0(k0)
359
+	bnez	k0, 2b
361
360
 	PTR_LA	k0, ejtag_debug_buffer_spinlock
362
361
 	sc	k0, 0(k0)
363
362
 	beqz	k0, 1b
..
..
@@ -499,20 +498,33 @@
499
498
 	KMODE
500
499
 	.endm
501
500
 
501
+	.macro __build_clear_gsexc
502
+	.set	push
503
+	/*
504
+	 * We need to specify a selector to access the CP0.Diag1 (GSCause)
505
+	 * register. All GSExc-equipped processors have MIPS32.
506
+	 */
507
+	.set	mips32
508
+	mfc0	a1, CP0_DIAGNOSTIC1
509
+	.set	pop
510
+	TRACE_IRQS_ON
511
+	STI
512
+	.endm
513
+
502
514
 	.macro	__BUILD_silent exception
503
515
 	.endm
504
516
 
505
-	/* Gas tries to parse the PRINT argument as a string containing
517
+	/* Gas tries to parse the ASM_PRINT argument as a string containing
506
518
 	   string escapes and emits bogus warnings if it believes to
507
519
 	   recognize an unknown escape code.  So make the arguments
508
520
 	   start with an n and gas will believe \n is ok ...  */
509
521
 	.macro	__BUILD_verbose nexception
510
522
 	LONG_L	a1, PT_EPC(sp)
511
523
 #ifdef CONFIG_32BIT
512
-	PRINT("Got \nexception at %08lx\012")
524
+	ASM_PRINT("Got \nexception at %08lx\012")
513
525
 #endif
514
526
 #ifdef CONFIG_64BIT
515
-	PRINT("Got \nexception at %016lx\012")
527
+	ASM_PRINT("Got \nexception at %016lx\012")
516
528
 #endif
517
529
 	.endm
518
530
 
..
..
@@ -553,8 +565,11 @@
553
565
 	BUILD_HANDLER ov ov sti silent			/* #12 */
554
566
 	BUILD_HANDLER tr tr sti silent			/* #13 */
555
567
 	BUILD_HANDLER msa_fpe msa_fpe msa_fpe silent	/* #14 */
568
+#ifdef CONFIG_MIPS_FP_SUPPORT
556
569
 	BUILD_HANDLER fpe fpe fpe silent		/* #15 */
570
+#endif
557
571
 	BUILD_HANDLER ftlb ftlb none silent		/* #16 */
572
+	BUILD_HANDLER gsexc gsexc gsexc silent		/* #16 */
558
573
 	BUILD_HANDLER msa msa sti silent		/* #21 */
559
574
 	BUILD_HANDLER mdmx mdmx sti silent		/* #22 */
560
575
 #ifdef	CONFIG_HARDWARE_WATCHPOINTS
..
..
@@ -650,14 +665,15 @@
650
665
 	ori	k1, _THREAD_MASK
651
666
 	xori	k1, _THREAD_MASK
652
667
 	LONG_L	v1, TI_TP_VALUE(k1)
668
+	.set	push
653
669
 	.set	arch=r4000
654
670
 	eret
655
-	.set	mips0
671
+	.set	pop
656
672
 #endif
657
673
 	.set	pop
658
674
 	END(handle_ri_rdhwr)
659
675
 
660
-#ifdef CONFIG_64BIT
676
+#ifdef CONFIG_CPU_R4X00_BUGS64
661
677
 /* A temporary overflow handler used by check_daddi(). */
662
678
 
663
679
 	__INIT