add new system file

hc

2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/arch/ia64/pci/pci.c
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@@ -1,3 +1,4 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * pci.c - Low-Level PCI Access in IA-64
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  *
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@@ -20,10 +21,9 @@
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 #include <linux/ioport.h>
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 #include <linux/slab.h>
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 #include <linux/spinlock.h>
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-#include <linux/bootmem.h>
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+#include <linux/memblock.h>
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 #include <linux/export.h>
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-#include <asm/machvec.h>
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 #include <asm/page.h>
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 #include <asm/io.h>
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 #include <asm/sal.h>
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@@ -371,7 +371,6 @@
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 	}
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 	list_for_each_entry(dev, &b->devices, bus_list)
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 		pcibios_fixup_device_resources(dev);
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-	platform_pci_fixup_bus(b);
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 }
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 void pcibios_add_bus(struct pci_bus *bus)
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@@ -412,7 +411,7 @@
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 }
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 /**
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- * ia64_pci_get_legacy_mem - generic legacy mem routine
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+ * pci_get_legacy_mem - generic legacy mem routine
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  * @bus: bus to get legacy memory base address for
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  *
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  * Find the base of legacy memory for @bus.  This is typically the first
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@@ -423,7 +422,7 @@
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  * This is the ia64 generic version of this routine.  Other platforms
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  * are free to override it with a machine vector.
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  */
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-char *ia64_pci_get_legacy_mem(struct pci_bus *bus)
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+char *pci_get_legacy_mem(struct pci_bus *bus)
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 {
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 	return (char *)__IA64_UNCACHED_OFFSET;
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 }
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@@ -449,7 +448,7 @@
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 		return -ENOSYS;
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 	/*
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-	 * Avoid attribute aliasing.  See Documentation/ia64/aliasing.txt
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+	 * Avoid attribute aliasing.  See Documentation/ia64/aliasing.rst
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 	 * for more details.
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 	 */
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 	if (!valid_mmap_phys_addr_range(vma->vm_pgoff, size))
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@@ -472,7 +471,7 @@
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 }
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 /**
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- * ia64_pci_legacy_read - read from legacy I/O space
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+ * pci_legacy_read - read from legacy I/O space
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  * @bus: bus to read
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  * @port: legacy port value
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  * @val: caller allocated storage for returned value
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@@ -484,7 +483,7 @@
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  * overridden by the platform.  This is necessary on platforms that don't
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  * support legacy I/O routing or that hard fail on legacy I/O timeouts.
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  */
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-int ia64_pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size)
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+int pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size)
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 {
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 	int ret = size;
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@@ -507,7 +506,7 @@
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 }
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 /**
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- * ia64_pci_legacy_write - perform a legacy I/O write
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+ * pci_legacy_write - perform a legacy I/O write
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  * @bus: bus pointer
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  * @port: port to write
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  * @val: value to write
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@@ -515,7 +514,7 @@
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  *
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  * Simply writes @size bytes of @val to @port.
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  */
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-int ia64_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size)
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+int pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size)
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 {
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 	int ret = size;
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@@ -567,32 +566,6 @@
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 	}
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 	pci_dfl_cache_line_size = (1 << cci.pcci_line_size) / 4;
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 }
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-
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-u64 ia64_dma_get_required_mask(struct device *dev)
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-{
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-	u32 low_totalram = ((max_pfn - 1) << PAGE_SHIFT);
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-	u32 high_totalram = ((max_pfn - 1) >> (32 - PAGE_SHIFT));
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-	u64 mask;
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-
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-	if (!high_totalram) {
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-		/* convert to mask just covering totalram */
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-		low_totalram = (1 << (fls(low_totalram) - 1));
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-		low_totalram += low_totalram - 1;
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-		mask = low_totalram;
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-	} else {
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-		high_totalram = (1 << (fls(high_totalram) - 1));
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-		high_totalram += high_totalram - 1;
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-		mask = (((u64)high_totalram) << 32) + 0xffffffff;
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-	}
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-	return mask;
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-}
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-EXPORT_SYMBOL_GPL(ia64_dma_get_required_mask);
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-
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-u64 dma_get_required_mask(struct device *dev)
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-{
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-	return platform_dma_get_required_mask(dev);
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-}
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-EXPORT_SYMBOL_GPL(dma_get_required_mask);
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 static int __init pcibios_init(void)
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 {