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2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c 
 kernel/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
....@@ -1,7 +1,7 @@
11 /*
22  * omap_hwmod_33xx_data.c: Hardware modules present on the AM33XX chips
33  *
4
- * Copyright (C) {2012} Texas Instruments Incorporated - http://www.ti.com/
4
+ * Copyright (C) {2012} Texas Instruments Incorporated - https://www.ti.com/
55  *
66  * This file is automatically generated from the AM33XX hardware databases.
77  * This program is free software; you can redistribute it and/or
....@@ -14,8 +14,6 @@
1414  * GNU General Public License for more details.
1515  */
1616 
17
-#include <linux/platform_data/i2c-omap.h>
18
-
1917 #include "omap_hwmod.h"
2018 #include "omap_hwmod_common_data.h"
2119 
....@@ -23,8 +21,6 @@
2321 #include "cm33xx.h"
2422 #include "prm33xx.h"
2523 #include "prm-regbits-33xx.h"
26
-#include "i2c.h"
27
-#include "wd_timer.h"
2824 #include "omap_hwmod_33xx_43xx_common_data.h"
2925 
3026 /*
....@@ -85,36 +81,6 @@
8581 	.rst_lines_cnt	= ARRAY_SIZE(am33xx_wkup_m3_resets),
8682 };
8783 
88
-/*
89
- * 'adc/tsc' class
90
- * TouchScreen Controller (Anolog-To-Digital Converter)
91
- */
92
-static struct omap_hwmod_class_sysconfig am33xx_adc_tsc_sysc = {
93
-	.rev_offs	= 0x00,
94
-	.sysc_offs	= 0x10,
95
-	.sysc_flags	= SYSC_HAS_SIDLEMODE,
96
-	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
97
-			SIDLE_SMART_WKUP),
98
-	.sysc_fields	= &omap_hwmod_sysc_type2,
99
-};
100
-
101
-static struct omap_hwmod_class am33xx_adc_tsc_hwmod_class = {
102
-	.name		= "adc_tsc",
103
-	.sysc		= &am33xx_adc_tsc_sysc,
104
-};
105
-
106
-static struct omap_hwmod am33xx_adc_tsc_hwmod = {
107
-	.name		= "adc_tsc",
108
-	.class		= &am33xx_adc_tsc_hwmod_class,
109
-	.clkdm_name	= "l4_wkup_clkdm",
110
-	.main_clk	= "adc_tsc_fck",
111
-	.prcm		= {
112
-		.omap4	= {
113
-			.clkctrl_offs	= AM33XX_CM_WKUP_ADC_TSC_CLKCTRL_OFFSET,
114
-			.modulemode	= MODULEMODE_SWCTRL,
115
-		},
116
-	},
117
-};
11884 
11985 /*
12086  * Modules omap_hwmod structures
....@@ -230,87 +196,6 @@
230196 	},
231197 };
232198 
233
-/* gpio0 */
234
-static struct omap_hwmod_opt_clk gpio0_opt_clks[] = {
235
-	{ .role = "dbclk", .clk = "gpio0_dbclk" },
236
-};
237
-
238
-static struct omap_hwmod am33xx_gpio0_hwmod = {
239
-	.name		= "gpio1",
240
-	.class		= &am33xx_gpio_hwmod_class,
241
-	.clkdm_name	= "l4_wkup_clkdm",
242
-	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,
243
-	.main_clk	= "dpll_core_m4_div2_ck",
244
-	.prcm		= {
245
-		.omap4	= {
246
-			.clkctrl_offs	= AM33XX_CM_WKUP_GPIO0_CLKCTRL_OFFSET,
247
-			.modulemode	= MODULEMODE_SWCTRL,
248
-		},
249
-	},
250
-	.opt_clks	= gpio0_opt_clks,
251
-	.opt_clks_cnt	= ARRAY_SIZE(gpio0_opt_clks),
252
-};
253
-
254
-/* lcdc */
255
-static struct omap_hwmod_class_sysconfig lcdc_sysc = {
256
-	.rev_offs	= 0x0,
257
-	.sysc_offs	= 0x54,
258
-	.sysc_flags	= (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE),
259
-	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
260
-	.sysc_fields	= &omap_hwmod_sysc_type2,
261
-};
262
-
263
-static struct omap_hwmod_class am33xx_lcdc_hwmod_class = {
264
-	.name		= "lcdc",
265
-	.sysc		= &lcdc_sysc,
266
-};
267
-
268
-static struct omap_hwmod am33xx_lcdc_hwmod = {
269
-	.name		= "lcdc",
270
-	.class		= &am33xx_lcdc_hwmod_class,
271
-	.clkdm_name	= "lcdc_clkdm",
272
-	.flags		= HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
273
-	.main_clk	= "lcd_gclk",
274
-	.prcm		= {
275
-		.omap4	= {
276
-			.clkctrl_offs	= AM33XX_CM_PER_LCDC_CLKCTRL_OFFSET,
277
-			.modulemode	= MODULEMODE_SWCTRL,
278
-		},
279
-	},
280
-};
281
-
282
-/*
283
- * 'usb_otg' class
284
- * high-speed on-the-go universal serial bus (usb_otg) controller
285
- */
286
-static struct omap_hwmod_class_sysconfig am33xx_usbhsotg_sysc = {
287
-	.rev_offs	= 0x0,
288
-	.sysc_offs	= 0x10,
289
-	.sysc_flags	= (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE),
290
-	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
291
-			  MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
292
-	.sysc_fields	= &omap_hwmod_sysc_type2,
293
-};
294
-
295
-static struct omap_hwmod_class am33xx_usbotg_class = {
296
-	.name		= "usbotg",
297
-	.sysc		= &am33xx_usbhsotg_sysc,
298
-};
299
-
300
-static struct omap_hwmod am33xx_usbss_hwmod = {
301
-	.name		= "usb_otg_hs",
302
-	.class		= &am33xx_usbotg_class,
303
-	.clkdm_name	= "l3s_clkdm",
304
-	.flags		= HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
305
-	.main_clk	= "usbotg_fck",
306
-	.prcm		= {
307
-		.omap4	= {
308
-			.clkctrl_offs	= AM33XX_CM_PER_USB0_CLKCTRL_OFFSET,
309
-			.modulemode	= MODULEMODE_SWCTRL,
310
-		},
311
-	},
312
-};
313
-
314199 
315200 /*
316201  * Interfaces
....@@ -348,14 +233,6 @@
348233 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
349234 };
350235 
351
-/* l4 hs -> pru-icss */
352
-static struct omap_hwmod_ocp_if am33xx_l4_hs__pruss = {
353
-	.master		= &am33xx_l4_hs_hwmod,
354
-	.slave		= &am33xx_pruss_hwmod,
355
-	.clk		= "dpll_core_m4_ck",
356
-	.user		= OCP_USER_MPU | OCP_USER_SDMA,
357
-};
358
-
359236 /* l3_main -> debugss */
360237 static struct omap_hwmod_ocp_if am33xx_l3_main__debugss = {
361238 	.master		= &am33xx_l3_main_hwmod,
....@@ -388,78 +265,6 @@
388265 	.user		= OCP_USER_MPU,
389266 };
390267 
391
-/* L4 WKUP -> I2C1 */
392
-static struct omap_hwmod_ocp_if am33xx_l4_wkup__i2c1 = {
393
-	.master		= &am33xx_l4_wkup_hwmod,
394
-	.slave		= &am33xx_i2c1_hwmod,
395
-	.clk		= "dpll_core_m4_div2_ck",
396
-	.user		= OCP_USER_MPU,
397
-};
398
-
399
-/* L4 WKUP -> GPIO1 */
400
-static struct omap_hwmod_ocp_if am33xx_l4_wkup__gpio0 = {
401
-	.master		= &am33xx_l4_wkup_hwmod,
402
-	.slave		= &am33xx_gpio0_hwmod,
403
-	.clk		= "dpll_core_m4_div2_ck",
404
-	.user		= OCP_USER_MPU | OCP_USER_SDMA,
405
-};
406
-
407
-/* L4 WKUP -> ADC_TSC */
408
-static struct omap_hwmod_ocp_if am33xx_l4_wkup__adc_tsc = {
409
-	.master		= &am33xx_l4_wkup_hwmod,
410
-	.slave		= &am33xx_adc_tsc_hwmod,
411
-	.clk		= "dpll_core_m4_div2_ck",
412
-	.user		= OCP_USER_MPU,
413
-};
414
-
415
-static struct omap_hwmod_ocp_if am33xx_l4_hs__cpgmac0 = {
416
-	.master		= &am33xx_l4_hs_hwmod,
417
-	.slave		= &am33xx_cpgmac0_hwmod,
418
-	.clk		= "cpsw_125mhz_gclk",
419
-	.user		= OCP_USER_MPU,
420
-};
421
-
422
-static struct omap_hwmod_ocp_if am33xx_l3_main__lcdc = {
423
-	.master		= &am33xx_l3_main_hwmod,
424
-	.slave		= &am33xx_lcdc_hwmod,
425
-	.clk		= "dpll_core_m4_ck",
426
-	.user		= OCP_USER_MPU,
427
-};
428
-
429
-/* l4 wkup -> timer1 */
430
-static struct omap_hwmod_ocp_if am33xx_l4_wkup__timer1 = {
431
-	.master		= &am33xx_l4_wkup_hwmod,
432
-	.slave		= &am33xx_timer1_hwmod,
433
-	.clk		= "dpll_core_m4_div2_ck",
434
-	.user		= OCP_USER_MPU,
435
-};
436
-
437
-/* l4 wkup -> uart1 */
438
-static struct omap_hwmod_ocp_if am33xx_l4_wkup__uart1 = {
439
-	.master		= &am33xx_l4_wkup_hwmod,
440
-	.slave		= &am33xx_uart1_hwmod,
441
-	.clk		= "dpll_core_m4_div2_ck",
442
-	.user		= OCP_USER_MPU,
443
-};
444
-
445
-/* l4 wkup -> wd_timer1 */
446
-static struct omap_hwmod_ocp_if am33xx_l4_wkup__wd_timer1 = {
447
-	.master		= &am33xx_l4_wkup_hwmod,
448
-	.slave		= &am33xx_wd_timer1_hwmod,
449
-	.clk		= "dpll_core_m4_div2_ck",
450
-	.user		= OCP_USER_MPU,
451
-};
452
-
453
-/* usbss */
454
-/* l3 s -> USBSS interface */
455
-static struct omap_hwmod_ocp_if am33xx_l3_s__usbss = {
456
-	.master		= &am33xx_l3_s_hwmod,
457
-	.slave		= &am33xx_usbss_hwmod,
458
-	.clk		= "l3s_gclk",
459
-	.user		= OCP_USER_MPU,
460
-	.flags		= OCPIF_SWSUP_IDLE,
461
-};
462
-
463268 static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
464269 	&am33xx_l3_main__emif,
465270 	&am33xx_mpu__l3_main,
....@@ -469,68 +274,15 @@
469274 	&am33xx_l3_main__l4_hs,
470275 	&am33xx_l3_main__l3_s,
471276 	&am33xx_l3_main__l3_instr,
472
-	&am33xx_l3_main__gfx,
473277 	&am33xx_l3_s__l3_main,
474
-	&am33xx_pruss__l3_main,
475278 	&am33xx_wkup_m3__l4_wkup,
476
-	&am33xx_gfx__l3_main,
477279 	&am33xx_l3_main__debugss,
478280 	&am33xx_l4_wkup__wkup_m3,
479281 	&am33xx_l4_wkup__control,
480282 	&am33xx_l4_wkup__smartreflex0,
481283 	&am33xx_l4_wkup__smartreflex1,
482
-	&am33xx_l4_wkup__uart1,
483
-	&am33xx_l4_wkup__timer1,
484
-	&am33xx_l4_wkup__rtc,
485
-	&am33xx_l4_wkup__i2c1,
486
-	&am33xx_l4_wkup__gpio0,
487
-	&am33xx_l4_wkup__adc_tsc,
488
-	&am33xx_l4_wkup__wd_timer1,
489
-	&am33xx_l4_hs__pruss,
490
-	&am33xx_l4_per__dcan0,
491
-	&am33xx_l4_per__dcan1,
492
-	&am33xx_l4_per__gpio1,
493
-	&am33xx_l4_per__gpio2,
494
-	&am33xx_l4_per__gpio3,
495
-	&am33xx_l4_per__i2c2,
496
-	&am33xx_l4_per__i2c3,
497
-	&am33xx_l4_per__mailbox,
498
-	&am33xx_l4_ls__mcasp0,
499
-	&am33xx_l4_ls__mcasp1,
500
-	&am33xx_l4_ls__mmc0,
501
-	&am33xx_l4_ls__mmc1,
502
-	&am33xx_l3_s__mmc2,
503
-	&am33xx_l4_ls__timer2,
504
-	&am33xx_l4_ls__timer3,
505
-	&am33xx_l4_ls__timer4,
506
-	&am33xx_l4_ls__timer5,
507
-	&am33xx_l4_ls__timer6,
508
-	&am33xx_l4_ls__timer7,
509
-	&am33xx_l3_main__tpcc,
510
-	&am33xx_l4_ls__uart2,
511
-	&am33xx_l4_ls__uart3,
512
-	&am33xx_l4_ls__uart4,
513
-	&am33xx_l4_ls__uart5,
514
-	&am33xx_l4_ls__uart6,
515
-	&am33xx_l4_ls__spinlock,
516
-	&am33xx_l4_ls__elm,
517
-	&am33xx_l4_ls__epwmss0,
518
-	&am33xx_l4_ls__epwmss1,
519
-	&am33xx_l4_ls__epwmss2,
520284 	&am33xx_l3_s__gpmc,
521
-	&am33xx_l3_main__lcdc,
522
-	&am33xx_l4_ls__mcspi0,
523
-	&am33xx_l4_ls__mcspi1,
524
-	&am33xx_l3_main__tptc0,
525
-	&am33xx_l3_main__tptc1,
526
-	&am33xx_l3_main__tptc2,
527285 	&am33xx_l3_main__ocmc,
528
-	&am33xx_l3_s__usbss,
529
-	&am33xx_l4_hs__cpgmac0,
530
-	&am33xx_cpgmac0__mdio,
531
-	&am33xx_l3_main__sha0,
532
-	&am33xx_l3_main__aes0,
533
-	&am33xx_l4_per__rng,
534286 	NULL,
535287 };
536288