hc
2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c
kernel/arch/arm/mach-omap2/omap_hwmod_2420_data.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips
34 *
....@@ -5,16 +6,11 @@
56 * Copyright (C) 2012 Texas Instruments, Inc.
67 * Paul Walmsley
78 *
8
- * This program is free software; you can redistribute it and/or modify
9
- * it under the terms of the GNU General Public License version 2 as
10
- * published by the Free Software Foundation.
11
- *
129 * XXX handle crossbar/shared link difference for L3?
1310 * XXX these should be marked initdata for multi-OMAP kernels
1411 */
1512
1613 #include <linux/platform_data/i2c-omap.h>
17
-#include <linux/omap-dma.h>
1814
1915 #include "omap_hwmod.h"
2016 #include "l3_2xxx.h"
....@@ -91,7 +87,6 @@
9187 static struct omap_hwmod_class i2c_class = {
9288 .name = "i2c",
9389 .sysc = &i2c_sysc,
94
- .rev = OMAP_I2C_IP_VERSION_1,
9590 .reset = &omap_i2c_reset,
9691 };
9792
....@@ -128,21 +123,6 @@
128123 },
129124 .class = &i2c_class,
130125 .flags = HWMOD_16BIT_REG,
131
-};
132
-
133
-/* dma attributes */
134
-static struct omap_dma_dev_attr dma_dev_attr = {
135
- .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
136
- IS_CSSA_32 | IS_CDSA_32,
137
- .lch_count = 32,
138
-};
139
-
140
-static struct omap_hwmod omap2420_dma_system_hwmod = {
141
- .name = "dma",
142
- .class = &omap2xxx_dma_hwmod_class,
143
- .main_clk = "core_l3_ck",
144
- .dev_attr = &dma_dev_attr,
145
- .flags = HWMOD_NO_IDLEST,
146126 };
147127
148128 /* mailbox */
....@@ -284,14 +264,6 @@
284264 .user = OCP_USER_MPU | OCP_USER_SDMA,
285265 };
286266
287
-/* l4_wkup -> timer1 */
288
-static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = {
289
- .master = &omap2xxx_l4_wkup_hwmod,
290
- .slave = &omap2xxx_timer1_hwmod,
291
- .clk = "gpt1_ick",
292
- .user = OCP_USER_MPU | OCP_USER_SDMA,
293
-};
294
-
295267 /* l4_wkup -> wd_timer2 */
296268 static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = {
297269 .master = &omap2xxx_l4_wkup_hwmod,
....@@ -329,22 +301,6 @@
329301 .master = &omap2xxx_l4_wkup_hwmod,
330302 .slave = &omap2xxx_gpio4_hwmod,
331303 .clk = "gpios_ick",
332
- .user = OCP_USER_MPU | OCP_USER_SDMA,
333
-};
334
-
335
-/* dma_system -> L3 */
336
-static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {
337
- .master = &omap2420_dma_system_hwmod,
338
- .slave = &omap2xxx_l3_main_hwmod,
339
- .clk = "core_l3_ck",
340
- .user = OCP_USER_MPU | OCP_USER_SDMA,
341
-};
342
-
343
-/* l4_core -> dma_system */
344
-static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
345
- .master = &omap2xxx_l4_core_hwmod,
346
- .slave = &omap2420_dma_system_hwmod,
347
- .clk = "sdma_ick",
348304 .user = OCP_USER_MPU | OCP_USER_SDMA,
349305 };
350306
....@@ -388,15 +344,6 @@
388344 .flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE,
389345 };
390346
391
-
392
-/* l4_wkup -> 32ksync_counter */
393
-static struct omap_hwmod_ocp_if omap2420_l4_wkup__counter_32k = {
394
- .master = &omap2xxx_l4_wkup_hwmod,
395
- .slave = &omap2xxx_counter_32k_hwmod,
396
- .clk = "sync_32k_ick",
397
- .user = OCP_USER_MPU | OCP_USER_SDMA,
398
-};
399
-
400347 static struct omap_hwmod_ocp_if omap2420_l3__gpmc = {
401348 .master = &omap2xxx_l3_main_hwmod,
402349 .slave = &omap2xxx_gpmc_hwmod,
....@@ -418,8 +365,6 @@
418365 &omap2420_l4_core__i2c2,
419366 &omap2420_l3__iva,
420367 &omap2420_l3__dsp,
421
- &omap2420_l4_wkup__timer1,
422
- &omap2xxx_l4_core__timer2,
423368 &omap2xxx_l4_core__timer3,
424369 &omap2xxx_l4_core__timer4,
425370 &omap2xxx_l4_core__timer5,
....@@ -439,8 +384,6 @@
439384 &omap2420_l4_wkup__gpio2,
440385 &omap2420_l4_wkup__gpio3,
441386 &omap2420_l4_wkup__gpio4,
442
- &omap2420_dma_system__l3,
443
- &omap2420_l4_core__dma_system,
444387 &omap2420_l4_core__mailbox,
445388 &omap2420_l4_core__mcbsp1,
446389 &omap2420_l4_core__mcbsp2,
....@@ -449,7 +392,6 @@
449392 &omap2xxx_l4_core__sham,
450393 &omap2xxx_l4_core__aes,
451394 &omap2420_l4_core__hdq1w,
452
- &omap2420_l4_wkup__counter_32k,
453395 &omap2420_l3__gpmc,
454396 NULL,
455397 };