add new system file

hc

2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/arch/arm/boot/dts/meson8m2.dtsi
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..
@@ -14,14 +14,25 @@
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 	compatible = "amlogic,meson8m2-clkc", "amlogic,meson8-clkc";
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 };
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+&dmcbus {
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+	/* the offset of the canvas registers has changed compared to Meson8 */
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+	/delete-node/ video-lut@20;
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+
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+	canvas: video-lut@48 {
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+		compatible = "amlogic,meson8m2-canvas", "amlogic,canvas";
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+		reg = <0x48 0x14>;
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+	};
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+};
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+
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 &ethmac {
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 	compatible = "amlogic,meson8m2-dwmac", "snps,dwmac";
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 	reg = <0xc9410000 0x10000
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 		0xc1108140 0x8>;
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 	clocks = <&clkc CLKID_ETH>,
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 		 <&clkc CLKID_MPLL2>,
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-		 <&clkc CLKID_MPLL2>;
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-	clock-names = "stmmaceth", "clkin0", "clkin1";
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+		 <&clkc CLKID_MPLL2>,
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+		 <&clkc CLKID_FCLK_DIV2>;
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+	clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
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 	resets = <&reset RESET_ETHERNET>;
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 	reset-names = "stmmaceth";
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 };
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@@ -45,10 +56,46 @@
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 				 "eth_rxd1", "eth_rxd0",
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 				 "eth_mdio", "eth_mdc";
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 			function = "ethernet";
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+			bias-disable;
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 		};
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 	};
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 };
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+&pwrc {
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+	compatible = "amlogic,meson8m2-pwrc";
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+	resets = <&reset RESET_DBLK>,
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+		 <&reset RESET_PIC_DC>,
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+		 <&reset RESET_HDMI_APB>,
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+		 <&reset RESET_HDMI_SYSTEM_RESET>,
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+		 <&reset RESET_VENCI>,
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+		 <&reset RESET_VENCP>,
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+		 <&reset RESET_VDAC_4>,
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+		 <&reset RESET_VENCL>,
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+		 <&reset RESET_VIU>,
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+		 <&reset RESET_VENC>,
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+		 <&reset RESET_RDMA>;
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+	reset-names = "dblk", "pic_dc", "hdmi_apb", "hdmi_system", "venci",
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+		      "vencp", "vdac", "vencl", "viu", "venc", "rdma";
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+	assigned-clocks = <&clkc CLKID_VPU>;
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+	assigned-clock-rates = <364000000>;
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+};
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+
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+&saradc {
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+	compatible = "amlogic,meson8m2-saradc", "amlogic,meson-saradc";
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+};
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+
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+&sdhc {
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+	compatible = "amlogic,meson8m2-sdhc", "amlogic,meson-mx-sdhc";
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+};
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+
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+&usb0_phy {
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+	compatible = "amlogic,meson8m2-usb2-phy", "amlogic,meson-mx-usb2-phy";
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+};
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+
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+&usb1_phy {
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+	compatible = "amlogic,meson8m2-usb2-phy", "amlogic,meson-mx-usb2-phy";
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+};
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+
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 &wdt {
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 	compatible = "amlogic,meson8m2-wdt", "amlogic,meson8b-wdt";
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 };