add new system file

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2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/arch/arc/include/asm/spinlock.h
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@@ -1,9 +1,6 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /*
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  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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  */
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 #ifndef __ASM_SPINLOCK_H
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@@ -21,8 +18,6 @@
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 {
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 	unsigned int val;
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-	smp_mb();
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-
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 	__asm__ __volatile__(
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 	"1:	llock	%[val], [%[slock]]	\n"
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 	"	breq	%[val], %[LOCKED], 1b	\n"	/* spin while LOCKED */
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@@ -34,6 +29,14 @@
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 	  [LOCKED]	"r"	(__ARCH_SPIN_LOCK_LOCKED__)
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 	: "memory", "cc");
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+	/*
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+	 * ACQUIRE barrier to ensure load/store after taking the lock
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+	 * don't "bleed-up" out of the critical section (leak-in is allowed)
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+	 * http://www.spinics.net/lists/kernel/msg2010409.html
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+	 *
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+	 * ARCv2 only has load-load, store-store and all-all barrier
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+	 * thus need the full all-all barrier
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+	 */
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 	smp_mb();
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 }
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@@ -41,8 +44,6 @@
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 static inline int arch_spin_trylock(arch_spinlock_t *lock)
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 {
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 	unsigned int val, got_it = 0;
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-
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-	smp_mb();
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 	__asm__ __volatile__(
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 	"1:	llock	%[val], [%[slock]]	\n"
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@@ -67,9 +68,7 @@
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 {
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 	smp_mb();
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-	lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__;
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-
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-	smp_mb();
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+	WRITE_ONCE(lock->slock, __ARCH_SPIN_LOCK_UNLOCKED__);
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 }
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 /*
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@@ -80,8 +79,6 @@
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 static inline void arch_read_lock(arch_rwlock_t *rw)
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 {
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 	unsigned int val;
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-
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-	smp_mb();
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 	/*
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 	 * zero means writer holds the lock exclusively, deny Reader.
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@@ -113,8 +110,6 @@
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 {
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 	unsigned int val, got_it = 0;
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-	smp_mb();
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-
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 	__asm__ __volatile__(
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 	"1:	llock	%[val], [%[rwlock]]	\n"
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 	"	brls	%[val], %[WR_LOCKED], 4f\n"	/* <= 0: already write locked, bail */
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@@ -139,8 +134,6 @@
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 static inline void arch_write_lock(arch_rwlock_t *rw)
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 {
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 	unsigned int val;
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-
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-	smp_mb();
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 	/*
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 	 * If reader(s) hold lock (lock < __ARCH_RW_LOCK_UNLOCKED__),
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@@ -174,8 +167,6 @@
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 static inline int arch_write_trylock(arch_rwlock_t *rw)
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 {
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 	unsigned int val, got_it = 0;
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-
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-	smp_mb();
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 	__asm__ __volatile__(
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 	"1:	llock	%[val], [%[rwlock]]	\n"
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@@ -217,17 +208,13 @@
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 	: [val]		"=&r"	(val)
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 	: [rwlock]	"r"	(&(rw->counter))
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 	: "memory", "cc");
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-
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-	smp_mb();
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 }
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 static inline void arch_write_unlock(arch_rwlock_t *rw)
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 {
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 	smp_mb();
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-	rw->counter = __ARCH_RW_LOCK_UNLOCKED__;
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-
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-	smp_mb();
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+	WRITE_ONCE(rw->counter, __ARCH_RW_LOCK_UNLOCKED__);
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 }
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 #else	/* !CONFIG_ARC_HAS_LLSC */
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@@ -237,34 +224,19 @@
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 	unsigned int val = __ARCH_SPIN_LOCK_LOCKED__;
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 	/*
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-	 * This smp_mb() is technically superfluous, we only need the one
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-	 * after the lock for providing the ACQUIRE semantics.
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-	 * However doing the "right" thing was regressing hackbench
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-	 * so keeping this, pending further investigation
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+	 * Per lkmm, smp_mb() is only required after _lock (and before_unlock)
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+	 * for ACQ and REL semantics respectively. However EX based spinlocks
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+	 * need the extra smp_mb to workaround a hardware quirk.
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 	 */
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 	smp_mb();
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 	__asm__ __volatile__(
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 	"1:	ex  %0, [%1]		\n"
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-#ifdef CONFIG_EZNPS_MTM_EXT
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-	"	.word %3		\n"
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-#endif
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 	"	breq  %0, %2, 1b	\n"
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 	: "+&r" (val)
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 	: "r"(&(lock->slock)), "ir"(__ARCH_SPIN_LOCK_LOCKED__)
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-#ifdef CONFIG_EZNPS_MTM_EXT
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-	, "i"(CTOP_INST_SCHD_RW)
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-#endif
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 	: "memory");
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-	/*
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-	 * ACQUIRE barrier to ensure load/store after taking the lock
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-	 * don't "bleed-up" out of the critical section (leak-in is allowed)
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-	 * http://www.spinics.net/lists/kernel/msg2010409.html
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-	 *
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-	 * ARCv2 only has load-load, store-store and all-all barrier
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-	 * thus need the full all-all barrier
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-	 */
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 	smp_mb();
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 }
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@@ -309,8 +281,7 @@
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 	: "memory");
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 	/*
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-	 * superfluous, but keeping for now - see pairing version in
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-	 * arch_spin_lock above
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+	 * see pairing version/comment in arch_spin_lock above
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 	 */
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 	smp_mb();
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 }
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@@ -344,7 +315,6 @@
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 	arch_spin_unlock(&(rw->lock_mutex));
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 	local_irq_restore(flags);
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-	smp_mb();
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 	return ret;
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 }
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