.. | .. |
---|
180 | 180 | { |
---|
181 | 181 | struct nand_chip *this = mtd_to_nand(mtd); |
---|
182 | 182 | switch(cmd){ |
---|
183 | | - case NAND_CTL_SETCLE: this->IO_ADDR_W |= CLE_ADRR_BIT; break; |
---|
184 | | - case NAND_CTL_CLRCLE: this->IO_ADDR_W &= ~CLE_ADRR_BIT; break; |
---|
185 | | - case NAND_CTL_SETALE: this->IO_ADDR_W |= ALE_ADRR_BIT; break; |
---|
186 | | - case NAND_CTL_CLRALE: this->IO_ADDR_W &= ~ALE_ADRR_BIT; break; |
---|
| 183 | + case NAND_CTL_SETCLE: this->legacy.IO_ADDR_W |= CLE_ADRR_BIT; break; |
---|
| 184 | + case NAND_CTL_CLRCLE: this->legacy.IO_ADDR_W &= ~CLE_ADRR_BIT; break; |
---|
| 185 | + case NAND_CTL_SETALE: this->legacy.IO_ADDR_W |= ALE_ADRR_BIT; break; |
---|
| 186 | + case NAND_CTL_CLRALE: this->legacy.IO_ADDR_W &= ~ALE_ADRR_BIT; break; |
---|
187 | 187 | } |
---|
188 | 188 | } |
---|
189 | 189 | |
---|
.. | .. |
---|
197 | 197 | should return 0, if the device is busy (R/B pin is low) and 1, if the |
---|
198 | 198 | device is ready (R/B pin is high). If the hardware interface does not |
---|
199 | 199 | give access to the ready busy pin, then the function must not be defined |
---|
200 | | -and the function pointer this->dev_ready is set to NULL. |
---|
| 200 | +and the function pointer this->legacy.dev_ready is set to NULL. |
---|
201 | 201 | |
---|
202 | 202 | Init function |
---|
203 | 203 | ------------- |
---|
.. | .. |
---|
235 | 235 | } |
---|
236 | 236 | |
---|
237 | 237 | /* Set address of NAND IO lines */ |
---|
238 | | - this->IO_ADDR_R = baseaddr; |
---|
239 | | - this->IO_ADDR_W = baseaddr; |
---|
| 238 | + this->legacy.IO_ADDR_R = baseaddr; |
---|
| 239 | + this->legacy.IO_ADDR_W = baseaddr; |
---|
240 | 240 | /* Reference hardware control function */ |
---|
241 | 241 | this->hwcontrol = board_hwcontrol; |
---|
242 | 242 | /* Set command delay time, see datasheet for correct value */ |
---|
243 | | - this->chip_delay = CHIP_DEPENDEND_COMMAND_DELAY; |
---|
| 243 | + this->legacy.chip_delay = CHIP_DEPENDEND_COMMAND_DELAY; |
---|
244 | 244 | /* Assign the device ready function, if available */ |
---|
245 | | - this->dev_ready = board_dev_ready; |
---|
| 245 | + this->legacy.dev_ready = board_dev_ready; |
---|
246 | 246 | this->eccmode = NAND_ECC_SOFT; |
---|
247 | 247 | |
---|
248 | 248 | /* Scan to find existence of the device */ |
---|
.. | .. |
---|
276 | 276 | #ifdef MODULE |
---|
277 | 277 | static void __exit board_cleanup (void) |
---|
278 | 278 | { |
---|
279 | | - /* Release resources, unregister device */ |
---|
280 | | - nand_release (mtd_to_nand(board_mtd)); |
---|
| 279 | + /* Unregister device */ |
---|
| 280 | + WARN_ON(mtd_device_unregister(board_mtd)); |
---|
| 281 | + /* Release resources */ |
---|
| 282 | + nand_cleanup(mtd_to_nand(board_mtd)); |
---|
281 | 283 | |
---|
282 | 284 | /* unmap physical address */ |
---|
283 | 285 | iounmap(baseaddr); |
---|
.. | .. |
---|
336 | 338 | struct nand_chip *this = mtd_to_nand(mtd); |
---|
337 | 339 | |
---|
338 | 340 | /* Deselect all chips */ |
---|
339 | | - this->IO_ADDR_R &= ~BOARD_NAND_ADDR_MASK; |
---|
340 | | - this->IO_ADDR_W &= ~BOARD_NAND_ADDR_MASK; |
---|
| 341 | + this->legacy.IO_ADDR_R &= ~BOARD_NAND_ADDR_MASK; |
---|
| 342 | + this->legacy.IO_ADDR_W &= ~BOARD_NAND_ADDR_MASK; |
---|
341 | 343 | switch (chip) { |
---|
342 | 344 | case 0: |
---|
343 | | - this->IO_ADDR_R |= BOARD_NAND_ADDR_CHIP0; |
---|
344 | | - this->IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0; |
---|
| 345 | + this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIP0; |
---|
| 346 | + this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0; |
---|
345 | 347 | break; |
---|
346 | 348 | .... |
---|
347 | 349 | case n: |
---|
348 | | - this->IO_ADDR_R |= BOARD_NAND_ADDR_CHIPn; |
---|
349 | | - this->IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn; |
---|
| 350 | + this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIPn; |
---|
| 351 | + this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn; |
---|
350 | 352 | break; |
---|
351 | 353 | } |
---|
352 | 354 | } |
---|