enable lvds 1280x800

hc

2023-11-20 0d8657dd3056063fb115946b10157477b5c70451

 kernel/drivers/video/rockchip/mpp/mpp_vepu2.c
..
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@@ -287,6 +287,7 @@
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 	u32 i;
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 	u32 reg_en;
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 	struct vepu_task *task = to_vepu_task(mpp_task);
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+	u32 timing_en = mpp->srv->timing_en;
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 	mpp_debug_enter();
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..
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@@ -305,12 +306,21 @@
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 		mpp_write_req(mpp, task->reg, s, e, reg_en);
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 	}
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+
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+	/* flush tlb before starting hardware */
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+	mpp_iommu_flush_tlb(mpp->iommu_info);
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+
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 	/* init current task */
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 	mpp->cur_task = mpp_task;
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+
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+	mpp_task_run_begin(mpp_task, timing_en, MPP_WORK_TIMEOUT_DELAY);
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+
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 	/* Last, flush the registers */
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 	wmb();
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 	mpp_write(mpp, VEPU2_REG_ENC_EN,
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 		  task->reg[reg_en] | VEPU2_ENC_START);
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+
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+	mpp_task_run_end(mpp_task, timing_en);
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 	mpp_debug_leave();
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@@ -578,6 +588,10 @@
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 		enc->procfs = NULL;
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 		return -EIO;
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 	}
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+
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+	/* for common mpp_dev options */
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+	mpp_procfs_create_common(enc->procfs, mpp);
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+
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 	mpp_procfs_create_u32("aclk", 0644,
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 			      enc->procfs, &enc->aclk_info.debug_rate_hz);
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 	mpp_procfs_create_u32("session_buffers", 0644,
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@@ -722,15 +736,17 @@
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 {
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 	struct vepu_dev *enc = to_vepu_dev(mpp);
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+	mpp_write(mpp, VEPU2_REG_ENC_EN, 0);
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+	udelay(5);
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 	if (enc->rst_a && enc->rst_h) {
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 		/* Don't skip this or iommu won't work after reset */
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-		rockchip_pmu_idle_request(mpp->dev, true);
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+		mpp_pmu_idle_request(mpp, true);
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 		mpp_safe_reset(enc->rst_a);
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 		mpp_safe_reset(enc->rst_h);
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 		udelay(5);
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 		mpp_safe_unreset(enc->rst_a);
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 		mpp_safe_unreset(enc->rst_h);
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-		rockchip_pmu_idle_request(mpp->dev, false);
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+		mpp_pmu_idle_request(mpp, false);
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 	}
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 	mpp_write(mpp, VEPU2_REG_INT, VEPU2_INT_CLEAR);
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