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| 60 | 60 | #define CI_HDRC_OVERRIDE_RX_BURST BIT(11) |
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| 61 | 61 | #define CI_HDRC_OVERRIDE_PHY_CONTROL BIT(12) /* Glue layer manages phy */ |
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| 62 | 62 | #define CI_HDRC_REQUIRES_ALIGNED_DMA BIT(13) |
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| 63 | +#define CI_HDRC_IMX_IS_HSIC BIT(14) |
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| 64 | +#define CI_HDRC_PMQOS BIT(15) |
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| 63 | 65 | enum usb_dr_mode dr_mode; |
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| 64 | 66 | #define CI_HDRC_CONTROLLER_RESET_EVENT 0 |
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| 65 | 67 | #define CI_HDRC_CONTROLLER_STOPPED_EVENT 1 |
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| 68 | +#define CI_HDRC_IMX_HSIC_ACTIVE_EVENT 2 |
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| 69 | +#define CI_HDRC_IMX_HSIC_SUSPEND_EVENT 3 |
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| 70 | +#define CI_HDRC_CONTROLLER_VBUS_EVENT 4 |
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| 66 | 71 | int (*notify_event) (struct ci_hdrc *ci, unsigned event); |
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| 67 | 72 | struct regulator *reg_vbus; |
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| 68 | 73 | struct usb_otg_caps ci_otg_caps; |
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| 77 | 82 | struct ci_hdrc_cable vbus_extcon; |
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| 78 | 83 | struct ci_hdrc_cable id_extcon; |
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| 79 | 84 | u32 phy_clkgate_delay_us; |
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| 85 | + |
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| 86 | + /* pins */ |
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| 87 | + struct pinctrl *pctl; |
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| 88 | + struct pinctrl_state *pins_default; |
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| 89 | + struct pinctrl_state *pins_host; |
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| 90 | + struct pinctrl_state *pins_device; |
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| 80 | 91 | }; |
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| 81 | 92 | |
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| 82 | 93 | /* Default offset of capability registers */ |
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| .. | .. |
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| 88 | 99 | struct ci_hdrc_platform_data *platdata); |
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| 89 | 100 | /* Remove ci hdrc device */ |
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| 90 | 101 | void ci_hdrc_remove_device(struct platform_device *pdev); |
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| 102 | +/* Get current available role */ |
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| 103 | +enum usb_dr_mode ci_hdrc_query_available_role(struct platform_device *pdev); |
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| 91 | 104 | |
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| 92 | 105 | #endif |
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