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| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
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| 1 | 2 | /******************************************************************************* |
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| 2 | 3 | |
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| 3 | 4 | Header file for stmmac platform data |
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| 4 | 5 | |
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| 5 | 6 | Copyright (C) 2009 STMicroelectronics Ltd |
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| 6 | 7 | |
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| 7 | | - This program is free software; you can redistribute it and/or modify it |
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| 8 | | - under the terms and conditions of the GNU General Public License, |
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| 9 | | - version 2, as published by the Free Software Foundation. |
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| 10 | | - |
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| 11 | | - This program is distributed in the hope it will be useful, but WITHOUT |
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| 12 | | - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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| 13 | | - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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| 14 | | - more details. |
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| 15 | | - |
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| 16 | | - You should have received a copy of the GNU General Public License along with |
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| 17 | | - this program; if not, write to the Free Software Foundation, Inc., |
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| 18 | | - 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
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| 19 | | - |
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| 20 | | - The full GNU General Public License is included in this distribution in |
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| 21 | | - the file called "COPYING". |
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| 22 | 8 | |
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| 23 | 9 | Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> |
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| 24 | 10 | *******************************************************************************/ |
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| .. | .. |
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| 27 | 13 | #define __STMMAC_PLATFORM_DATA |
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| 28 | 14 | |
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| 29 | 15 | #include <linux/platform_device.h> |
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| 16 | +#include <linux/phy.h> |
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| 30 | 17 | |
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| 31 | 18 | #define MTL_MAX_RX_QUEUES 8 |
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| 32 | 19 | #define MTL_MAX_TX_QUEUES 8 |
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| .. | .. |
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| 92 | 79 | /* Platfrom data for platform device structure's platform_data field */ |
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| 93 | 80 | |
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| 94 | 81 | struct stmmac_mdio_bus_data { |
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| 95 | | - int (*phy_reset)(void *priv); |
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| 96 | 82 | unsigned int phy_mask; |
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| 83 | + unsigned int has_xpcs; |
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| 97 | 84 | int *irqs; |
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| 98 | 85 | int probed_phy_irq; |
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| 99 | | -#ifdef CONFIG_OF |
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| 100 | | - int reset_gpio, active_low; |
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| 101 | | - u32 delays[3]; |
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| 102 | | -#endif |
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| 86 | + bool needs_reset; |
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| 103 | 87 | }; |
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| 104 | 88 | |
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| 105 | 89 | struct stmmac_dma_cfg { |
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| .. | .. |
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| 110 | 94 | int fixed_burst; |
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| 111 | 95 | int mixed_burst; |
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| 112 | 96 | bool aal; |
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| 97 | + bool eame; |
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| 113 | 98 | }; |
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| 114 | 99 | |
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| 115 | 100 | #define AXI_BLEN 7 |
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| .. | .. |
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| 123 | 108 | bool axi_fb; |
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| 124 | 109 | bool axi_mb; |
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| 125 | 110 | bool axi_rb; |
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| 111 | +}; |
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| 112 | + |
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| 113 | +#define EST_GCL 1024 |
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| 114 | +struct stmmac_est { |
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| 115 | + struct mutex lock; |
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| 116 | + int enable; |
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| 117 | + u32 btr_offset[2]; |
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| 118 | + u32 btr[2]; |
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| 119 | + u32 ctr[2]; |
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| 120 | + u32 ter; |
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| 121 | + u32 gcl_unaligned[EST_GCL]; |
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| 122 | + u32 gcl[EST_GCL]; |
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| 123 | + u32 gcl_size; |
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| 126 | 124 | }; |
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| 127 | 125 | |
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| 128 | 126 | struct stmmac_rxq_cfg { |
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| .. | .. |
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| 143 | 141 | u32 low_credit; |
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| 144 | 142 | bool use_prio; |
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| 145 | 143 | u32 prio; |
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| 144 | + int tbs_en; |
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| 146 | 145 | }; |
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| 147 | 146 | |
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| 148 | 147 | struct plat_stmmacenet_data { |
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| 149 | 148 | int bus_id; |
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| 150 | 149 | int phy_addr; |
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| 151 | 150 | int interface; |
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| 151 | + phy_interface_t phy_interface; |
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| 152 | 152 | struct stmmac_mdio_bus_data *mdio_bus_data; |
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| 153 | 153 | struct device_node *phy_node; |
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| 154 | + struct device_node *phylink_node; |
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| 154 | 155 | struct device_node *mdio_node; |
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| 155 | 156 | struct stmmac_dma_cfg *dma_cfg; |
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| 157 | + struct stmmac_est *est; |
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| 156 | 158 | int clk_csr; |
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| 157 | 159 | int has_gmac; |
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| 158 | 160 | int enh_desc; |
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| .. | .. |
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| 169 | 171 | int unicast_filter_entries; |
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| 170 | 172 | int tx_fifo_size; |
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| 171 | 173 | int rx_fifo_size; |
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| 174 | + int dma_tx_size; |
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| 175 | + int dma_rx_size; |
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| 176 | + int flow_ctrl; |
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| 177 | + u32 addr64; |
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| 172 | 178 | u32 rx_queues_to_use; |
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| 173 | 179 | u32 tx_queues_to_use; |
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| 174 | 180 | u8 rx_sched_algorithm; |
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| .. | .. |
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| 176 | 182 | struct stmmac_rxq_cfg rx_queues_cfg[MTL_MAX_RX_QUEUES]; |
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| 177 | 183 | struct stmmac_txq_cfg tx_queues_cfg[MTL_MAX_TX_QUEUES]; |
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| 178 | 184 | void (*fix_mac_speed)(void *priv, unsigned int speed); |
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| 185 | + int (*serdes_powerup)(struct net_device *ndev, void *priv); |
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| 186 | + void (*serdes_powerdown)(struct net_device *ndev, void *priv); |
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| 179 | 187 | int (*integrated_phy_power)(void *priv, bool up); |
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| 180 | 188 | int (*init)(struct platform_device *pdev, void *priv); |
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| 181 | 189 | void (*exit)(struct platform_device *pdev, void *priv); |
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| .. | .. |
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| 187 | 195 | struct clk *clk_ptp_ref; |
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| 188 | 196 | unsigned int clk_ptp_rate; |
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| 189 | 197 | unsigned int clk_ref_rate; |
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| 198 | + s32 ptp_max_adj; |
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| 190 | 199 | struct reset_control *stmmac_rst; |
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| 191 | 200 | struct stmmac_axi *axi; |
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| 192 | 201 | int has_gmac4; |
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| 193 | 202 | bool has_sun8i; |
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| 194 | 203 | bool tso_en; |
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| 204 | + int rss_en; |
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| 195 | 205 | int mac_port_sel_speed; |
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| 196 | 206 | bool en_tx_lpi_clockgating; |
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| 207 | + bool rx_clk_runs_in_lpi; |
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| 197 | 208 | int has_xgmac; |
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| 209 | + bool vlan_fail_q_en; |
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| 210 | + u8 vlan_fail_q; |
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| 211 | + unsigned int eee_usecs_rate; |
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| 212 | + bool sph_disable; |
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| 198 | 213 | }; |
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| 199 | 214 | #endif |
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