forked from ~ljy/RK356X_SDK_RELEASE
blame | history | patch | commit | commitdiff
hc
2024-05-10 093a6c67005148ae32a5c9e4553491b9f5c2457b 
 kernel/include/linux/mfd/ti-lmu-register.h
....@@ -1,63 +1,16 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
12 /*
23  * TI LMU (Lighting Management Unit) Device Register Map
34  *
45  * Copyright 2017 Texas Instruments
56  *
67  * Author: Milo Kim <milo.kim@ti.com>
7
- *
8
- * This program is free software; you can redistribute it and/or modify
9
- * it under the terms of the GNU General Public License version 2 as
10
- * published by the Free Software Foundation.
118  */
129 
1310 #ifndef __MFD_TI_LMU_REGISTER_H__
1411 #define __MFD_TI_LMU_REGISTER_H__
1512 
1613 #include <linux/bitops.h>
17
-
18
-/* LM3532 */
19
-#define LM3532_REG_OUTPUT_CFG			0x10
20
-#define LM3532_ILED1_CFG_MASK			0x03
21
-#define LM3532_ILED2_CFG_MASK			0x0C
22
-#define LM3532_ILED3_CFG_MASK			0x30
23
-#define LM3532_ILED1_CFG_SHIFT			0
24
-#define LM3532_ILED2_CFG_SHIFT			2
25
-#define LM3532_ILED3_CFG_SHIFT			4
26
-
27
-#define LM3532_REG_RAMPUP			0x12
28
-#define LM3532_REG_RAMPDN			LM3532_REG_RAMPUP
29
-#define LM3532_RAMPUP_MASK			0x07
30
-#define LM3532_RAMPUP_SHIFT			0
31
-#define LM3532_RAMPDN_MASK			0x38
32
-#define LM3532_RAMPDN_SHIFT			3
33
-
34
-#define LM3532_REG_ENABLE			0x1D
35
-
36
-#define LM3532_REG_PWM_A_CFG			0x13
37
-#define LM3532_PWM_A_MASK			0x05	/* zone 0 */
38
-#define LM3532_PWM_ZONE_0			BIT(2)
39
-
40
-#define LM3532_REG_PWM_B_CFG			0x14
41
-#define LM3532_PWM_B_MASK			0x09	/* zone 1 */
42
-#define LM3532_PWM_ZONE_1			BIT(3)
43
-
44
-#define LM3532_REG_PWM_C_CFG			0x15
45
-#define LM3532_PWM_C_MASK			0x11	/* zone 2 */
46
-#define LM3532_PWM_ZONE_2			BIT(4)
47
-
48
-#define LM3532_REG_ZONE_CFG_A			0x16
49
-#define LM3532_REG_ZONE_CFG_B			0x18
50
-#define LM3532_REG_ZONE_CFG_C			0x1A
51
-#define LM3532_ZONE_MASK			(BIT(2) | BIT(3) | BIT(4))
52
-#define LM3532_ZONE_0				0
53
-#define LM3532_ZONE_1				BIT(2)
54
-#define LM3532_ZONE_2				BIT(3)
55
-
56
-#define LM3532_REG_BRT_A			0x70	/* zone 0 */
57
-#define LM3532_REG_BRT_B			0x76	/* zone 1 */
58
-#define LM3532_REG_BRT_C			0x7C	/* zone 2 */
59
-
60
-#define LM3532_MAX_REG				0x7E
6114 
6215 /* LM3631 */
6316 #define LM3631_REG_DEVCTRL			0x00
....@@ -234,47 +187,26 @@
234187 
235188 #define LM3695_MAX_REG				0x14
236189 
237
-/* LM3697 */
238
-#define LM3697_REG_HVLED_OUTPUT_CFG		0x10
239
-#define LM3697_HVLED1_CFG_MASK			BIT(0)
240
-#define LM3697_HVLED2_CFG_MASK			BIT(1)
241
-#define LM3697_HVLED3_CFG_MASK			BIT(2)
242
-#define LM3697_HVLED1_CFG_SHIFT			0
243
-#define LM3697_HVLED2_CFG_SHIFT			1
244
-#define LM3697_HVLED3_CFG_SHIFT			2
190
+/* LM36274 */
191
+#define LM36274_REG_REV				0x01
192
+#define LM36274_REG_BL_CFG_1			0x02
193
+#define LM36274_REG_BL_CFG_2			0x03
194
+#define LM36274_REG_BRT_LSB			0x04
195
+#define LM36274_REG_BRT_MSB			0x05
196
+#define LM36274_REG_BL_EN			0x08
245197 
246
-#define LM3697_REG_BL0_RAMP			0x11
247
-#define LM3697_REG_BL1_RAMP			0x12
248
-#define LM3697_RAMPUP_MASK			0xF0
249
-#define LM3697_RAMPUP_SHIFT			4
250
-#define LM3697_RAMPDN_MASK			0x0F
251
-#define LM3697_RAMPDN_SHIFT			0
198
+#define LM36274_REG_BIAS_CONFIG_1		0x09
199
+#define LM36274_EXT_EN_MASK			BIT(0)
200
+#define LM36274_EN_VNEG_MASK			BIT(1)
201
+#define LM36274_EN_VPOS_MASK			BIT(2)
252202 
253
-#define LM3697_REG_RAMP_CONF			0x14
254
-#define LM3697_RAMP_MASK			0x0F
255
-#define LM3697_RAMP_EACH			0x05
203
+#define LM36274_REG_BIAS_CONFIG_2		0x0a
204
+#define LM36274_REG_BIAS_CONFIG_3		0x0b
205
+#define LM36274_REG_VOUT_BOOST			0x0c
206
+#define LM36274_REG_VOUT_POS			0x0d
207
+#define LM36274_REG_VOUT_NEG			0x0e
208
+#define LM36274_VOUT_MASK			0x3F
256209 
257
-#define LM3697_REG_PWM_CFG			0x1C
258
-#define LM3697_PWM_A_MASK			BIT(0)
259
-#define LM3697_PWM_B_MASK			BIT(1)
210
+#define LM36274_MAX_REG				0x13
260211 
261
-#define LM3697_REG_IMAX_A			0x17
262
-#define LM3697_REG_IMAX_B			0x18
263
-
264
-#define LM3697_REG_FEEDBACK_ENABLE		0x19
265
-
266
-#define LM3697_REG_BRT_A_LSB			0x20
267
-#define LM3697_REG_BRT_A_MSB			0x21
268
-#define LM3697_REG_BRT_B_LSB			0x22
269
-#define LM3697_REG_BRT_B_MSB			0x23
270
-
271
-#define LM3697_REG_ENABLE			0x24
272
-
273
-#define LM3697_REG_OPEN_FAULT_STATUS		0xB0
274
-
275
-#define LM3697_REG_SHORT_FAULT_STATUS		0xB2
276
-
277
-#define LM3697_REG_MONITOR_ENABLE		0xB4
278
-
279
-#define LM3697_MAX_REG				0xB4
280212 #endif