forked from ~ljy/RK356X_SDK_RELEASE
blame | history | patch | commit | commitdiff
hc
2024-05-10 093a6c67005148ae32a5c9e4553491b9f5c2457b 
 kernel/include/linux/mfd/rk630.h
....@@ -13,11 +13,9 @@
1313 #include <linux/regmap.h>
1414 #include <linux/mfd/core.h>
1515 
16
-#ifndef HIWORD_UPDATE
1716 #define UPDATE(x, h, l)		(((x) << (l)) & GENMASK((h), (l)))
1817 #define HIWORD_MASK(h, l)	((GENMASK((h), (l)) << 16) | GENMASK((h), (l)))
1918 #define HIWORD_UPDATE(v, h, l)	((((v) << (l)) & GENMASK((h), (l))) | (GENMASK((h), (l)) << 16))
20
-#endif
2119 
2220 #define RTC_REG(x)			((x) + 0x60000)
2321 #define RTC_SET_SECONDS			RTC_REG(0x0)
....@@ -63,27 +61,29 @@
6361 
6462 #define GRF_REG(x)			((x) + 0x20000)
6563 #define PLUMAGE_GRF_GPIO0A_IOMUX	GRF_REG(0x0000)
64
+#define GPIO0A0_SEL_MASK		HIWORD_MASK(1, 0)
65
+#define GPIO0A0_SEL(x)			HIWORD_UPDATE(x, 1, 0)
66
+#define GPIO0A1_SEL_MASK		HIWORD_MASK(3, 2)
67
+#define GPIO0A1_SEL(x)			HIWORD_UPDATE(x, 3, 2)
68
+#define GPIO0A2_SEL_MASK		HIWORD_MASK(5, 4)
69
+#define GPIO0A2_SEL(x)			HIWORD_UPDATE(x, 5, 4)
70
+#define GPIO0A3_SEL_MASK		HIWORD_MASK(7, 6)
71
+#define GPIO0A3_SEL(x)			HIWORD_UPDATE(x, 7, 6)
72
+#define GPIO0A4_SEL_MASK		HIWORD_MASK(9, 8)
73
+#define GPIO0A4_SEL(x)			HIWORD_UPDATE(x, 9, 8)
74
+#define GPIO0A5_SEL_MASK		HIWORD_MASK(11, 10)
75
+#define GPIO0A5_SEL(x)			HIWORD_UPDATE(x, 11, 10)
76
+#define GPIO0A6_SEL_MASK		HIWORD_MASK(13, 12)
77
+#define GPIO0A6_SEL(x)			HIWORD_UPDATE(x, 13, 12)
78
+#define GPIO0A7_SEL_MASK		HIWORD_MASK(15, 14)
79
+#define GPIO0A7_SEL(x)			HIWORD_UPDATE(x, 15, 14)
6680 #define PLUMAGE_GRF_GPIO0B_IOMUX	GRF_REG(0x0008)
81
+#define GPIO0B0_SEL_MASK		HIWORD_MASK(1, 0)
82
+#define GPIO0B0_SEL(x)			HIWORD_UPDATE(x, 1, 0)
6783 #define PLUMAGE_GRF_GPIO0C_IOMUX	GRF_REG(0x0010)
6884 #define PLUMAGE_GRF_GPIO0D_IOMUX	GRF_REG(0x0018)
6985 #define PLUMAGE_GRF_GPIO1A_IOMUX	GRF_REG(0x0020)
7086 #define PLUMAGE_GRF_GPIO1B_IOMUX	GRF_REG(0x0028)
71
-#define PIN0_SEL_MASK			HIWORD_MASK(1, 0)
72
-#define PIN0_SEL(x)			HIWORD_UPDATE(x, 1, 0)
73
-#define PIN1_SEL_MASK			HIWORD_MASK(3, 2)
74
-#define PIN1_SEL(x)			HIWORD_UPDATE(x, 3, 2)
75
-#define PIN2_SEL_MASK			HIWORD_MASK(5, 4)
76
-#define PIN2_SEL(x)			HIWORD_UPDATE(x, 5, 4)
77
-#define PIN3_SEL_MASK			HIWORD_MASK(7, 6)
78
-#define PIN3_SEL(x)			HIWORD_UPDATE(x, 7, 6)
79
-#define PIN4_SEL_MASK			HIWORD_MASK(9, 8)
80
-#define PIN4_SEL(x)			HIWORD_UPDATE(x, 9, 8)
81
-#define PIN5_SEL_MASK			HIWORD_MASK(11, 10)
82
-#define PIN5_SEL(x)			HIWORD_UPDATE(x, 11, 10)
83
-#define PIN6_SEL_MASK			HIWORD_MASK(13, 12)
84
-#define PIN6_SEL(x)			HIWORD_UPDATE(x, 13, 12)
85
-#define PIN7_SEL_MASK			HIWORD_MASK(15, 14)
86
-#define PIN7_SEL(x)			HIWORD_UPDATE(x, 15, 14)
8787 #define PLUMAGE_GRF_GPIO0A_P		GRF_REG(0x0080)
8888 #define PLUMAGE_GRF_GPIO0B_P		GRF_REG(0x0084)
8989 #define PLUMAGE_GRF_GPIO0C_P		GRF_REG(0x0088)
....@@ -110,8 +110,6 @@
110110 #define PLUMAGE_GRF_SOC_CON1		GRF_REG(0x0404)
111111 #define PLUMAGE_GRF_SOC_CON2		GRF_REG(0x0408)
112112 #define PLUMAGE_GRF_SOC_CON3		GRF_REG(0x040C)
113
-#define DCLK_UPSAMPLE_2X4X_MASK		HIWORD_MASK(15, 15)
114
-#define DCLK_UPSAMPLE_2X4X(x)		HIWORD_UPDATE(x, 15, 15)
115113 #define VDAC_ENVBG_MASK			HIWORD_MASK(12, 12)
116114 #define VDAC_ENVBG(x)			HIWORD_UPDATE(x, 12, 12)
117115 #define VDAC_ENSC0_MASK			HIWORD_MASK(11, 11)
....@@ -164,12 +162,6 @@
164162 #define CRU_CLKSEL_CON2			CRU_REG(0x0038)
165163 #define CRU_CLKSEL_CON3			CRU_REG(0x003c)
166164 #define CRU_GATE_CON0			CRU_REG(0x0040)
167
-#define PCLK_EFUSE_EN_MASK		BIT(14 + 16)
168
-#define PCLK_EFUSE_DISABLE		BIT(14)
169
-#define DCLK_CVBS_1X_PLL_CLK_GATE_MASK	HIWORD_MASK(12, 12)
170
-#define DCLK_CVBS_1X_PLL_CLK_GATE(x)	HIWORD_UPDATE(x, 12, 12)
171
-#define DCLK_CVBS_4X_PLL_CLK_GATE_MASK	HIWORD_MASK(11, 11)
172
-#define DCLK_CVBS_4X_PLL_CLK_GATE(x)	HIWORD_UPDATE(x, 11, 11)
173165 #define CRU_SOFTRST_CON0		CRU_REG(0x0050)
174166 #define DRESETN_CVBS_1X_MASK		HIWORD_MASK(10, 10)
175167 #define DRESETN_CVBS_1X(x)		HIWORD_UPDATE(x, 10, 10)
....@@ -180,35 +172,6 @@
180172 #define PRESETN_GRF_MASK		HIWORD_MASK(3, 3)
181173 #define PRESETN_GRF(x)			HIWORD_UPDATE(x, 3, 3)
182174 #define CRU_MAX_REGISTER		CRU_SOFTRST_CON0
183
-
184
-#define GPIO0_BASE			0x30000
185
-#define GPIO1_BASE			0x40000
186
-#define GPIO_SWPORT_DR_L		0x00
187
-#define GPIO_SWPORT_DR_H		0x04
188
-#define GPIO_SWPORT_DDR_L		0x08
189
-#define GPIO_SWPORT_DDR_H		0x0c
190
-#define GPIO_INT_EN_L			0x10
191
-#define GPIO_INT_EN_H			0x14
192
-#define GPIO_INT_MASK_L			0x18
193
-#define GPIO_INT_MASK_H			0x1c
194
-#define GPIO_INT_TYPE_L			0x20
195
-#define GPIO_INT_TYPE_H			0x24
196
-#define GPIO_INT_POLARITY_L		0x28
197
-#define GPIO_INT_POLARITY_H		0x2c
198
-#define GPIO_INT_BOTHEDGE_L		0x30
199
-#define GPIO_INT_BOTHEDGE_H		0x34
200
-#define GPIO_DEBOUNCE_L			0x38
201
-#define GPIO_DEBOUNCE_H			0x3c
202
-#define GPIO_DBCLK_DIV_EN_L		0x40
203
-#define GPIO_DBCLK_DIV_EN_H		0x44
204
-#define GPIO_DBCLK_DIV_CON		0x48
205
-#define GPIO_INT_STATUS			0x50
206
-#define GPIO_INT_RAWSTATUS		0x58
207
-#define GPIO_PORT_EOI_L			0x60
208
-#define GPIO_PORT_EOI_H			0x64
209
-#define GPIO_EXT_PORT			0x70
210
-#define GPIO_VER_ID			0x78
211
-#define GPIO_MAX_REGISTER		(GPIO1_BASE + GPIO_VER_ID)
212175 
213176 #define TVE_REG(x)			((x) + 0x10000)
214177 #define BT656_DECODER_CTRL		TVE_REG(0x3D00)
....@@ -258,27 +221,20 @@
258221 struct rk630 {
259222 	struct device *dev;
260223 	struct i2c_client *client;
261
-	struct clk *ref_clk;
262224 	struct regmap *grf;
263
-	struct regmap *pinctrl;
264225 	struct regmap *cru;
265226 	struct regmap *tve;
266227 	struct regmap *rtc;
267
-	struct regmap *efuse;
268
-	struct regmap *codec;
269228 	struct gpio_desc *reset_gpio;
270229 	int irq;
271230 	struct regmap_irq_chip_data *irq_data;
272231 	const struct regmap_irq_chip *regmap_irq_chip;
273232 };
274233 
275
-extern const struct regmap_config rk630_efuse_regmap_config;
276234 extern const struct regmap_config rk630_rtc_regmap_config;
277235 extern const struct regmap_config rk630_grf_regmap_config;
278
-extern const struct regmap_config rk630_pinctrl_regmap_config;
279236 extern const struct regmap_config rk630_cru_regmap_config;
280237 extern const struct regmap_config rk630_tve_regmap_config;
281
-extern const struct regmap_config rk630_codec_regmap_config;
282238 
283239 int rk630_core_probe(struct rk630 *rk630);
284240 int rk630_core_remove(struct rk630 *rk630);