| .. | .. |
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| 6 | 6 | #include <linux/string.h> |
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| 7 | 7 | #include <linux/device.h> |
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| 8 | 8 | #include <linux/err.h> |
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| 9 | | -#include <linux/dma-debug.h> |
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| 10 | 9 | #include <linux/dma-direction.h> |
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| 11 | 10 | #include <linux/scatterlist.h> |
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| 12 | 11 | #include <linux/bug.h> |
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| 13 | 12 | #include <linux/mem_encrypt.h> |
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| 14 | | -#include <linux/android_kabi.h> |
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| 15 | 13 | |
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| 16 | 14 | /** |
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| 17 | 15 | * List of possible attributes associated with a DMA mapping. The semantics |
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| 18 | | - * of each attribute should be defined in Documentation/DMA-attributes.txt. |
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| 19 | | - * |
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| 20 | | - * DMA_ATTR_WRITE_BARRIER: DMA to a memory region with this attribute |
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| 21 | | - * forces all pending DMA writes to complete. |
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| 16 | + * of each attribute should be defined in Documentation/core-api/dma-attributes.rst. |
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| 22 | 17 | */ |
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| 23 | | -#define DMA_ATTR_WRITE_BARRIER (1UL << 0) |
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| 18 | + |
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| 24 | 19 | /* |
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| 25 | 20 | * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping |
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| 26 | 21 | * may be weakly ordered, that is that reads and writes may pass each other. |
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| .. | .. |
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| 31 | 26 | * buffered to improve performance. |
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| 32 | 27 | */ |
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| 33 | 28 | #define DMA_ATTR_WRITE_COMBINE (1UL << 2) |
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| 34 | | -/* |
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| 35 | | - * DMA_ATTR_NON_CONSISTENT: Lets the platform to choose to return either |
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| 36 | | - * consistent or non-consistent memory as it sees fit. |
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| 37 | | - */ |
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| 38 | | -#define DMA_ATTR_NON_CONSISTENT (1UL << 3) |
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| 39 | 29 | /* |
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| 40 | 30 | * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel |
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| 41 | 31 | * virtual mapping for the allocated buffer. |
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| .. | .. |
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| 72 | 62 | #define DMA_ATTR_PRIVILEGED (1UL << 9) |
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| 73 | 63 | |
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| 74 | 64 | /* |
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| 75 | | - * DMA_ATTR_STRONGLY_ORDERED: Specifies that accesses to the mapping must |
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| 76 | | - * not be buffered, reordered, merged with other accesses, or unaligned. |
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| 77 | | - * No speculative access may occur in this mapping. |
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| 65 | + * DMA_ATTR_SYS_CACHE_ONLY: used to indicate that the buffer should be mapped |
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| 66 | + * with the correct memory attributes so that it can be cached in the system |
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| 67 | + * or last level cache. This is useful for buffers that are being mapped for |
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| 68 | + * devices that are non-coherent, but can use the system cache. |
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| 78 | 69 | */ |
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| 79 | | -#define DMA_ATTR_STRONGLY_ORDERED (1UL << 10) |
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| 80 | | -/* |
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| 81 | | - * DMA_ATTR_SKIP_ZEROING: Do not zero mapping. |
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| 82 | | - */ |
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| 83 | | -#define DMA_ATTR_SKIP_ZEROING (1UL << 11) |
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| 84 | | -/* |
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| 85 | | - * DMA_ATTR_NO_DELAYED_UNMAP: Used by msm specific lazy mapping to indicate |
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| 86 | | - * that the mapping can be freed on unmap, rather than when the ion_buffer |
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| 87 | | - * is freed. |
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| 88 | | - */ |
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| 89 | | -#define DMA_ATTR_NO_DELAYED_UNMAP (1UL << 12) |
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| 90 | | -/* |
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| 91 | | - * DMA_ATTR_EXEC_MAPPING: The mapping has executable permissions. |
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| 92 | | - */ |
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| 93 | | -#define DMA_ATTR_EXEC_MAPPING (1UL << 13) |
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| 94 | | -/* |
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| 95 | | - * DMA_ATTR_IOMMU_USE_UPSTREAM_HINT: Normally an smmu will override any bus |
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| 96 | | - * attributes (i.e cacheablilty) provided by the client device. Some hardware |
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| 97 | | - * may be designed to use the original attributes instead. |
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| 98 | | - */ |
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| 99 | | -#define DMA_ATTR_IOMMU_USE_UPSTREAM_HINT (1UL << 14) |
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| 100 | | -/* |
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| 101 | | - * When passed to a DMA map call the DMA_ATTR_FORCE_COHERENT DMA |
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| 102 | | - * attribute can be used to force a buffer to be mapped as IO coherent. |
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| 103 | | - */ |
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| 104 | | -#define DMA_ATTR_FORCE_COHERENT (1UL << 15) |
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| 105 | | -/* |
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| 106 | | - * When passed to a DMA map call the DMA_ATTR_FORCE_NON_COHERENT DMA |
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| 107 | | - * attribute can be used to force a buffer to not be mapped as IO |
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| 108 | | - * coherent. |
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| 109 | | - */ |
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| 110 | | -#define DMA_ATTR_FORCE_NON_COHERENT (1UL << 16) |
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| 111 | | -/* |
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| 112 | | - * DMA_ATTR_DELAYED_UNMAP: Used by ION, it will ensure that mappings are not |
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| 113 | | - * removed on unmap but instead are removed when the ion_buffer is freed. |
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| 114 | | - */ |
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| 115 | | -#define DMA_ATTR_DELAYED_UNMAP (1UL << 17) |
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| 70 | +#define DMA_ATTR_SYS_CACHE_ONLY (1UL << 14) |
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| 116 | 71 | |
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| 117 | 72 | /* |
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| 118 | | - * DMA_ATTR_IOMMU_USE_LLC_NWA: Overrides the bus attributes to use the System |
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| 119 | | - * Cache(LLC) with allocation policy as Inner Non-Cacheable, Outer Cacheable: |
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| 120 | | - * Write-Back, Read-Allocate, No Write-Allocate policy. |
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| 73 | + * DMA_ATTR_SYS_CACHE_ONLY_NWA: used to indicate that the buffer should be |
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| 74 | + * mapped with the correct memory attributes so that it can be cached in the |
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| 75 | + * system or last level cache, with a no write allocate cache policy. This is |
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| 76 | + * useful for buffers that are being mapped for devices that are non-coherent, |
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| 77 | + * but can use the system cache. |
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| 121 | 78 | */ |
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| 122 | | -#define DMA_ATTR_IOMMU_USE_LLC_NWA (1UL << 18) |
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| 123 | | - |
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| 124 | | -#define DMA_ERROR_CODE (~(dma_addr_t)0) |
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| 79 | +#define DMA_ATTR_SYS_CACHE_ONLY_NWA (1UL << 15) |
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| 125 | 80 | |
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| 126 | 81 | /* |
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| 127 | | - * A dma_addr_t can hold any valid DMA or bus address for the platform. |
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| 128 | | - * It can be given to a device to use as a DMA source or target. A CPU cannot |
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| 129 | | - * reference a dma_addr_t directly because there may be translation between |
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| 130 | | - * its physical address space and the bus address space. |
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| 82 | + * A dma_addr_t can hold any valid DMA or bus address for the platform. It can |
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| 83 | + * be given to a device to use as a DMA source or target. It is specific to a |
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| 84 | + * given device and there may be a translation between the CPU physical address |
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| 85 | + * space and the bus address space. |
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| 86 | + * |
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| 87 | + * DMA_MAPPING_ERROR is the magic error code if a mapping failed. It should not |
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| 88 | + * be used directly in drivers, but checked for using dma_mapping_error() |
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| 89 | + * instead. |
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| 131 | 90 | */ |
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| 132 | | -struct dma_map_ops { |
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| 133 | | - void* (*alloc)(struct device *dev, size_t size, |
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| 134 | | - dma_addr_t *dma_handle, gfp_t gfp, |
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| 135 | | - unsigned long attrs); |
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| 136 | | - void (*free)(struct device *dev, size_t size, |
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| 137 | | - void *vaddr, dma_addr_t dma_handle, |
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| 138 | | - unsigned long attrs); |
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| 139 | | - int (*mmap)(struct device *, struct vm_area_struct *, |
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| 140 | | - void *, dma_addr_t, size_t, |
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| 141 | | - unsigned long attrs); |
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| 142 | | - |
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| 143 | | - int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *, |
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| 144 | | - dma_addr_t, size_t, unsigned long attrs); |
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| 145 | | - |
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| 146 | | - dma_addr_t (*map_page)(struct device *dev, struct page *page, |
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| 147 | | - unsigned long offset, size_t size, |
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| 148 | | - enum dma_data_direction dir, |
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| 149 | | - unsigned long attrs); |
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| 150 | | - void (*unmap_page)(struct device *dev, dma_addr_t dma_handle, |
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| 151 | | - size_t size, enum dma_data_direction dir, |
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| 152 | | - unsigned long attrs); |
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| 153 | | - /* |
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| 154 | | - * map_sg returns 0 on error and a value > 0 on success. |
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| 155 | | - * It should never return a value < 0. |
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| 156 | | - */ |
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| 157 | | - int (*map_sg)(struct device *dev, struct scatterlist *sg, |
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| 158 | | - int nents, enum dma_data_direction dir, |
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| 159 | | - unsigned long attrs); |
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| 160 | | - void (*unmap_sg)(struct device *dev, |
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| 161 | | - struct scatterlist *sg, int nents, |
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| 162 | | - enum dma_data_direction dir, |
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| 163 | | - unsigned long attrs); |
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| 164 | | - dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr, |
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| 165 | | - size_t size, enum dma_data_direction dir, |
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| 166 | | - unsigned long attrs); |
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| 167 | | - void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle, |
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| 168 | | - size_t size, enum dma_data_direction dir, |
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| 169 | | - unsigned long attrs); |
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| 170 | | - void (*sync_single_for_cpu)(struct device *dev, |
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| 171 | | - dma_addr_t dma_handle, size_t size, |
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| 172 | | - enum dma_data_direction dir); |
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| 173 | | - void (*sync_single_for_device)(struct device *dev, |
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| 174 | | - dma_addr_t dma_handle, size_t size, |
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| 175 | | - enum dma_data_direction dir); |
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| 176 | | - void (*sync_sg_for_cpu)(struct device *dev, |
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| 177 | | - struct scatterlist *sg, int nents, |
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| 178 | | - enum dma_data_direction dir); |
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| 179 | | - void (*sync_sg_for_device)(struct device *dev, |
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| 180 | | - struct scatterlist *sg, int nents, |
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| 181 | | - enum dma_data_direction dir); |
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| 182 | | - void (*cache_sync)(struct device *dev, void *vaddr, size_t size, |
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| 183 | | - enum dma_data_direction direction); |
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| 184 | | - int (*mapping_error)(struct device *dev, dma_addr_t dma_addr); |
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| 185 | | - int (*dma_supported)(struct device *dev, u64 mask); |
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| 186 | | - int (*set_dma_mask)(struct device *dev, u64 mask); |
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| 187 | | - void *(*remap)(struct device *dev, void *cpu_addr, dma_addr_t handle, |
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| 188 | | - size_t size, unsigned long attrs); |
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| 189 | | - void (*unremap)(struct device *dev, void *remapped_address, |
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| 190 | | - size_t size); |
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| 191 | | -#ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK |
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| 192 | | - u64 (*get_required_mask)(struct device *dev); |
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| 193 | | -#endif |
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| 194 | | - |
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| 195 | | - ANDROID_KABI_RESERVE(1); |
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| 196 | | - ANDROID_KABI_RESERVE(2); |
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| 197 | | - ANDROID_KABI_RESERVE(3); |
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| 198 | | - ANDROID_KABI_RESERVE(4); |
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| 199 | | -}; |
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| 200 | | - |
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| 201 | | -extern const struct dma_map_ops dma_direct_ops; |
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| 202 | | -extern const struct dma_map_ops dma_noncoherent_ops; |
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| 203 | | -extern const struct dma_map_ops dma_virt_ops; |
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| 91 | +#define DMA_MAPPING_ERROR (~(dma_addr_t)0) |
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| 204 | 92 | |
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| 205 | 93 | #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) |
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| 206 | 94 | |
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| 207 | | -#define DMA_MASK_NONE 0x0ULL |
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| 208 | | - |
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| 209 | | -static inline int valid_dma_direction(int dma_direction) |
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| 210 | | -{ |
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| 211 | | - return ((dma_direction == DMA_BIDIRECTIONAL) || |
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| 212 | | - (dma_direction == DMA_TO_DEVICE) || |
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| 213 | | - (dma_direction == DMA_FROM_DEVICE)); |
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| 214 | | -} |
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| 215 | | - |
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| 216 | | -static inline int is_device_dma_capable(struct device *dev) |
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| 217 | | -{ |
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| 218 | | - return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE; |
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| 219 | | -} |
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| 220 | | - |
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| 221 | | -#ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT |
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| 222 | | -/* |
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| 223 | | - * These three functions are only for dma allocator. |
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| 224 | | - * Don't use them in device drivers. |
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| 225 | | - */ |
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| 226 | | -int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size, |
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| 227 | | - dma_addr_t *dma_handle, void **ret); |
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| 228 | | -int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr); |
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| 229 | | - |
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| 230 | | -int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma, |
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| 231 | | - void *cpu_addr, size_t size, int *ret); |
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| 232 | | - |
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| 233 | | -void *dma_alloc_from_global_coherent(ssize_t size, dma_addr_t *dma_handle); |
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| 234 | | -int dma_release_from_global_coherent(int order, void *vaddr); |
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| 235 | | -int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr, |
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| 236 | | - size_t size, int *ret); |
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| 237 | | - |
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| 95 | +#ifdef CONFIG_DMA_API_DEBUG |
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| 96 | +void debug_dma_mapping_error(struct device *dev, dma_addr_t dma_addr); |
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| 97 | +void debug_dma_map_single(struct device *dev, const void *addr, |
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| 98 | + unsigned long len); |
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| 238 | 99 | #else |
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| 239 | | -#define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0) |
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| 240 | | -#define dma_release_from_dev_coherent(dev, order, vaddr) (0) |
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| 241 | | -#define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0) |
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| 242 | | - |
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| 243 | | -static inline void *dma_alloc_from_global_coherent(ssize_t size, |
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| 244 | | - dma_addr_t *dma_handle) |
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| 100 | +static inline void debug_dma_mapping_error(struct device *dev, |
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| 101 | + dma_addr_t dma_addr) |
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| 245 | 102 | { |
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| 246 | | - return NULL; |
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| 247 | 103 | } |
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| 248 | | - |
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| 249 | | -static inline int dma_release_from_global_coherent(int order, void *vaddr) |
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| 104 | +static inline void debug_dma_map_single(struct device *dev, const void *addr, |
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| 105 | + unsigned long len) |
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| 250 | 106 | { |
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| 251 | | - return 0; |
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| 252 | 107 | } |
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| 253 | | - |
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| 254 | | -static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma, |
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| 255 | | - void *cpu_addr, size_t size, |
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| 256 | | - int *ret) |
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| 257 | | -{ |
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| 258 | | - return 0; |
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| 259 | | -} |
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| 260 | | -#endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ |
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| 108 | +#endif /* CONFIG_DMA_API_DEBUG */ |
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| 261 | 109 | |
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| 262 | 110 | #ifdef CONFIG_HAS_DMA |
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| 263 | | -#include <asm/dma-mapping.h> |
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| 264 | | -static inline const struct dma_map_ops *get_dma_ops(struct device *dev) |
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| 111 | +static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) |
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| 265 | 112 | { |
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| 266 | | - if (dev && dev->dma_ops) |
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| 267 | | - return dev->dma_ops; |
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| 268 | | - return get_arch_dma_ops(dev ? dev->bus : NULL); |
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| 113 | + debug_dma_mapping_error(dev, dma_addr); |
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| 114 | + |
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| 115 | + if (dma_addr == DMA_MAPPING_ERROR) |
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| 116 | + return -ENOMEM; |
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| 117 | + return 0; |
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| 269 | 118 | } |
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| 270 | 119 | |
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| 271 | | -static inline void set_dma_ops(struct device *dev, |
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| 272 | | - const struct dma_map_ops *dma_ops) |
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| 120 | +dma_addr_t dma_map_page_attrs(struct device *dev, struct page *page, |
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| 121 | + size_t offset, size_t size, enum dma_data_direction dir, |
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| 122 | + unsigned long attrs); |
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| 123 | +void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, size_t size, |
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| 124 | + enum dma_data_direction dir, unsigned long attrs); |
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| 125 | +int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, int nents, |
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| 126 | + enum dma_data_direction dir, unsigned long attrs); |
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| 127 | +void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, |
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| 128 | + int nents, enum dma_data_direction dir, |
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| 129 | + unsigned long attrs); |
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| 130 | +dma_addr_t dma_map_resource(struct device *dev, phys_addr_t phys_addr, |
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| 131 | + size_t size, enum dma_data_direction dir, unsigned long attrs); |
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| 132 | +void dma_unmap_resource(struct device *dev, dma_addr_t addr, size_t size, |
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| 133 | + enum dma_data_direction dir, unsigned long attrs); |
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| 134 | +void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, size_t size, |
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| 135 | + enum dma_data_direction dir); |
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| 136 | +void dma_sync_single_for_device(struct device *dev, dma_addr_t addr, |
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| 137 | + size_t size, enum dma_data_direction dir); |
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| 138 | +void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, |
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| 139 | + int nelems, enum dma_data_direction dir); |
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| 140 | +void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, |
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| 141 | + int nelems, enum dma_data_direction dir); |
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| 142 | +void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, |
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| 143 | + gfp_t flag, unsigned long attrs); |
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| 144 | +void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, |
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| 145 | + dma_addr_t dma_handle, unsigned long attrs); |
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| 146 | +void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, |
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| 147 | + gfp_t gfp, unsigned long attrs); |
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| 148 | +void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, |
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| 149 | + dma_addr_t dma_handle); |
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| 150 | +int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, |
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| 151 | + void *cpu_addr, dma_addr_t dma_addr, size_t size, |
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| 152 | + unsigned long attrs); |
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| 153 | +int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, |
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| 154 | + void *cpu_addr, dma_addr_t dma_addr, size_t size, |
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| 155 | + unsigned long attrs); |
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| 156 | +bool dma_can_mmap(struct device *dev); |
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| 157 | +int dma_supported(struct device *dev, u64 mask); |
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| 158 | +int dma_set_mask(struct device *dev, u64 mask); |
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| 159 | +int dma_set_coherent_mask(struct device *dev, u64 mask); |
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| 160 | +u64 dma_get_required_mask(struct device *dev); |
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| 161 | +size_t dma_max_mapping_size(struct device *dev); |
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| 162 | +bool dma_need_sync(struct device *dev, dma_addr_t dma_addr); |
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| 163 | +unsigned long dma_get_merge_boundary(struct device *dev); |
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| 164 | +#else /* CONFIG_HAS_DMA */ |
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| 165 | +static inline dma_addr_t dma_map_page_attrs(struct device *dev, |
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| 166 | + struct page *page, size_t offset, size_t size, |
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| 167 | + enum dma_data_direction dir, unsigned long attrs) |
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| 273 | 168 | { |
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| 274 | | - dev->dma_ops = dma_ops; |
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| 169 | + return DMA_MAPPING_ERROR; |
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| 275 | 170 | } |
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| 276 | | -#else |
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| 277 | | -/* |
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| 278 | | - * Define the dma api to allow compilation of dma dependent code. |
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| 279 | | - * Code that depends on the dma-mapping API needs to set 'depends on HAS_DMA' |
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| 280 | | - * in its Kconfig, unless it already depends on <something> || COMPILE_TEST, |
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| 281 | | - * where <something> guarantuees the availability of the dma-mapping API. |
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| 282 | | - */ |
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| 283 | | -static inline const struct dma_map_ops *get_dma_ops(struct device *dev) |
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| 171 | +static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, |
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| 172 | + size_t size, enum dma_data_direction dir, unsigned long attrs) |
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| 173 | +{ |
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| 174 | +} |
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| 175 | +static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, |
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| 176 | + int nents, enum dma_data_direction dir, unsigned long attrs) |
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| 177 | +{ |
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| 178 | + return 0; |
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| 179 | +} |
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| 180 | +static inline void dma_unmap_sg_attrs(struct device *dev, |
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| 181 | + struct scatterlist *sg, int nents, enum dma_data_direction dir, |
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| 182 | + unsigned long attrs) |
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| 183 | +{ |
|---|
| 184 | +} |
|---|
| 185 | +static inline dma_addr_t dma_map_resource(struct device *dev, |
|---|
| 186 | + phys_addr_t phys_addr, size_t size, enum dma_data_direction dir, |
|---|
| 187 | + unsigned long attrs) |
|---|
| 188 | +{ |
|---|
| 189 | + return DMA_MAPPING_ERROR; |
|---|
| 190 | +} |
|---|
| 191 | +static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr, |
|---|
| 192 | + size_t size, enum dma_data_direction dir, unsigned long attrs) |
|---|
| 193 | +{ |
|---|
| 194 | +} |
|---|
| 195 | +static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, |
|---|
| 196 | + size_t size, enum dma_data_direction dir) |
|---|
| 197 | +{ |
|---|
| 198 | +} |
|---|
| 199 | +static inline void dma_sync_single_for_device(struct device *dev, |
|---|
| 200 | + dma_addr_t addr, size_t size, enum dma_data_direction dir) |
|---|
| 201 | +{ |
|---|
| 202 | +} |
|---|
| 203 | +static inline void dma_sync_sg_for_cpu(struct device *dev, |
|---|
| 204 | + struct scatterlist *sg, int nelems, enum dma_data_direction dir) |
|---|
| 205 | +{ |
|---|
| 206 | +} |
|---|
| 207 | +static inline void dma_sync_sg_for_device(struct device *dev, |
|---|
| 208 | + struct scatterlist *sg, int nelems, enum dma_data_direction dir) |
|---|
| 209 | +{ |
|---|
| 210 | +} |
|---|
| 211 | +static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) |
|---|
| 212 | +{ |
|---|
| 213 | + return -ENOMEM; |
|---|
| 214 | +} |
|---|
| 215 | +static inline void *dma_alloc_attrs(struct device *dev, size_t size, |
|---|
| 216 | + dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs) |
|---|
| 284 | 217 | { |
|---|
| 285 | 218 | return NULL; |
|---|
| 286 | 219 | } |
|---|
| 287 | | -#endif |
|---|
| 220 | +static void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, |
|---|
| 221 | + dma_addr_t dma_handle, unsigned long attrs) |
|---|
| 222 | +{ |
|---|
| 223 | +} |
|---|
| 224 | +static inline void *dmam_alloc_attrs(struct device *dev, size_t size, |
|---|
| 225 | + dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs) |
|---|
| 226 | +{ |
|---|
| 227 | + return NULL; |
|---|
| 228 | +} |
|---|
| 229 | +static inline void dmam_free_coherent(struct device *dev, size_t size, |
|---|
| 230 | + void *vaddr, dma_addr_t dma_handle) |
|---|
| 231 | +{ |
|---|
| 232 | +} |
|---|
| 233 | +static inline int dma_get_sgtable_attrs(struct device *dev, |
|---|
| 234 | + struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr, |
|---|
| 235 | + size_t size, unsigned long attrs) |
|---|
| 236 | +{ |
|---|
| 237 | + return -ENXIO; |
|---|
| 238 | +} |
|---|
| 239 | +static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, |
|---|
| 240 | + void *cpu_addr, dma_addr_t dma_addr, size_t size, |
|---|
| 241 | + unsigned long attrs) |
|---|
| 242 | +{ |
|---|
| 243 | + return -ENXIO; |
|---|
| 244 | +} |
|---|
| 245 | +static inline bool dma_can_mmap(struct device *dev) |
|---|
| 246 | +{ |
|---|
| 247 | + return false; |
|---|
| 248 | +} |
|---|
| 249 | +static inline int dma_supported(struct device *dev, u64 mask) |
|---|
| 250 | +{ |
|---|
| 251 | + return 0; |
|---|
| 252 | +} |
|---|
| 253 | +static inline int dma_set_mask(struct device *dev, u64 mask) |
|---|
| 254 | +{ |
|---|
| 255 | + return -EIO; |
|---|
| 256 | +} |
|---|
| 257 | +static inline int dma_set_coherent_mask(struct device *dev, u64 mask) |
|---|
| 258 | +{ |
|---|
| 259 | + return -EIO; |
|---|
| 260 | +} |
|---|
| 261 | +static inline u64 dma_get_required_mask(struct device *dev) |
|---|
| 262 | +{ |
|---|
| 263 | + return 0; |
|---|
| 264 | +} |
|---|
| 265 | +static inline size_t dma_max_mapping_size(struct device *dev) |
|---|
| 266 | +{ |
|---|
| 267 | + return 0; |
|---|
| 268 | +} |
|---|
| 269 | +static inline bool dma_need_sync(struct device *dev, dma_addr_t dma_addr) |
|---|
| 270 | +{ |
|---|
| 271 | + return false; |
|---|
| 272 | +} |
|---|
| 273 | +static inline unsigned long dma_get_merge_boundary(struct device *dev) |
|---|
| 274 | +{ |
|---|
| 275 | + return 0; |
|---|
| 276 | +} |
|---|
| 277 | +#endif /* CONFIG_HAS_DMA */ |
|---|
| 278 | + |
|---|
| 279 | +struct page *dma_alloc_pages(struct device *dev, size_t size, |
|---|
| 280 | + dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp); |
|---|
| 281 | +void dma_free_pages(struct device *dev, size_t size, struct page *page, |
|---|
| 282 | + dma_addr_t dma_handle, enum dma_data_direction dir); |
|---|
| 283 | +void *dma_alloc_noncoherent(struct device *dev, size_t size, |
|---|
| 284 | + dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp); |
|---|
| 285 | +void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr, |
|---|
| 286 | + dma_addr_t dma_handle, enum dma_data_direction dir); |
|---|
| 288 | 287 | |
|---|
| 289 | 288 | static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr, |
|---|
| 290 | | - size_t size, |
|---|
| 291 | | - enum dma_data_direction dir, |
|---|
| 292 | | - unsigned long attrs) |
|---|
| 289 | + size_t size, enum dma_data_direction dir, unsigned long attrs) |
|---|
| 293 | 290 | { |
|---|
| 294 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 295 | | - dma_addr_t addr; |
|---|
| 296 | | - |
|---|
| 297 | | - BUG_ON(!valid_dma_direction(dir)); |
|---|
| 298 | | - addr = ops->map_page(dev, virt_to_page(ptr), |
|---|
| 299 | | - offset_in_page(ptr), size, |
|---|
| 300 | | - dir, attrs); |
|---|
| 301 | | - debug_dma_map_page(dev, virt_to_page(ptr), |
|---|
| 302 | | - offset_in_page(ptr), size, |
|---|
| 303 | | - dir, addr, true); |
|---|
| 304 | | - return addr; |
|---|
| 291 | + /* DMA must never operate on areas that might be remapped. */ |
|---|
| 292 | + if (dev_WARN_ONCE(dev, is_vmalloc_addr(ptr), |
|---|
| 293 | + "rejecting DMA map of vmalloc memory\n")) |
|---|
| 294 | + return DMA_MAPPING_ERROR; |
|---|
| 295 | + debug_dma_map_single(dev, ptr, size); |
|---|
| 296 | + return dma_map_page_attrs(dev, virt_to_page(ptr), offset_in_page(ptr), |
|---|
| 297 | + size, dir, attrs); |
|---|
| 305 | 298 | } |
|---|
| 306 | 299 | |
|---|
| 307 | 300 | static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr, |
|---|
| 308 | | - size_t size, |
|---|
| 309 | | - enum dma_data_direction dir, |
|---|
| 310 | | - unsigned long attrs) |
|---|
| 301 | + size_t size, enum dma_data_direction dir, unsigned long attrs) |
|---|
| 311 | 302 | { |
|---|
| 312 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 313 | | - |
|---|
| 314 | | - BUG_ON(!valid_dma_direction(dir)); |
|---|
| 315 | | - if (ops->unmap_page) |
|---|
| 316 | | - ops->unmap_page(dev, addr, size, dir, attrs); |
|---|
| 317 | | - debug_dma_unmap_page(dev, addr, size, dir, true); |
|---|
| 318 | | -} |
|---|
| 319 | | - |
|---|
| 320 | | -/* |
|---|
| 321 | | - * dma_maps_sg_attrs returns 0 on error and > 0 on success. |
|---|
| 322 | | - * It should never return a value < 0. |
|---|
| 323 | | - */ |
|---|
| 324 | | -static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, |
|---|
| 325 | | - int nents, enum dma_data_direction dir, |
|---|
| 326 | | - unsigned long attrs) |
|---|
| 327 | | -{ |
|---|
| 328 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 329 | | - int ents; |
|---|
| 330 | | - |
|---|
| 331 | | - BUG_ON(!valid_dma_direction(dir)); |
|---|
| 332 | | - ents = ops->map_sg(dev, sg, nents, dir, attrs); |
|---|
| 333 | | - BUG_ON(ents < 0); |
|---|
| 334 | | - debug_dma_map_sg(dev, sg, nents, ents, dir); |
|---|
| 335 | | - |
|---|
| 336 | | - return ents; |
|---|
| 337 | | -} |
|---|
| 338 | | - |
|---|
| 339 | | -static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, |
|---|
| 340 | | - int nents, enum dma_data_direction dir, |
|---|
| 341 | | - unsigned long attrs) |
|---|
| 342 | | -{ |
|---|
| 343 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 344 | | - |
|---|
| 345 | | - BUG_ON(!valid_dma_direction(dir)); |
|---|
| 346 | | - debug_dma_unmap_sg(dev, sg, nents, dir); |
|---|
| 347 | | - if (ops->unmap_sg) |
|---|
| 348 | | - ops->unmap_sg(dev, sg, nents, dir, attrs); |
|---|
| 349 | | -} |
|---|
| 350 | | - |
|---|
| 351 | | -static inline dma_addr_t dma_map_page_attrs(struct device *dev, |
|---|
| 352 | | - struct page *page, |
|---|
| 353 | | - size_t offset, size_t size, |
|---|
| 354 | | - enum dma_data_direction dir, |
|---|
| 355 | | - unsigned long attrs) |
|---|
| 356 | | -{ |
|---|
| 357 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 358 | | - dma_addr_t addr; |
|---|
| 359 | | - |
|---|
| 360 | | - BUG_ON(!valid_dma_direction(dir)); |
|---|
| 361 | | - addr = ops->map_page(dev, page, offset, size, dir, attrs); |
|---|
| 362 | | - debug_dma_map_page(dev, page, offset, size, dir, addr, false); |
|---|
| 363 | | - |
|---|
| 364 | | - return addr; |
|---|
| 365 | | -} |
|---|
| 366 | | - |
|---|
| 367 | | -static inline void dma_unmap_page_attrs(struct device *dev, |
|---|
| 368 | | - dma_addr_t addr, size_t size, |
|---|
| 369 | | - enum dma_data_direction dir, |
|---|
| 370 | | - unsigned long attrs) |
|---|
| 371 | | -{ |
|---|
| 372 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 373 | | - |
|---|
| 374 | | - BUG_ON(!valid_dma_direction(dir)); |
|---|
| 375 | | - if (ops->unmap_page) |
|---|
| 376 | | - ops->unmap_page(dev, addr, size, dir, attrs); |
|---|
| 377 | | - debug_dma_unmap_page(dev, addr, size, dir, false); |
|---|
| 378 | | -} |
|---|
| 379 | | - |
|---|
| 380 | | -static inline dma_addr_t dma_map_resource(struct device *dev, |
|---|
| 381 | | - phys_addr_t phys_addr, |
|---|
| 382 | | - size_t size, |
|---|
| 383 | | - enum dma_data_direction dir, |
|---|
| 384 | | - unsigned long attrs) |
|---|
| 385 | | -{ |
|---|
| 386 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 387 | | - dma_addr_t addr; |
|---|
| 388 | | - |
|---|
| 389 | | - BUG_ON(!valid_dma_direction(dir)); |
|---|
| 390 | | - |
|---|
| 391 | | - /* Don't allow RAM to be mapped */ |
|---|
| 392 | | - BUG_ON(pfn_valid(PHYS_PFN(phys_addr))); |
|---|
| 393 | | - |
|---|
| 394 | | - addr = phys_addr; |
|---|
| 395 | | - if (ops->map_resource) |
|---|
| 396 | | - addr = ops->map_resource(dev, phys_addr, size, dir, attrs); |
|---|
| 397 | | - |
|---|
| 398 | | - debug_dma_map_resource(dev, phys_addr, size, dir, addr); |
|---|
| 399 | | - |
|---|
| 400 | | - return addr; |
|---|
| 401 | | -} |
|---|
| 402 | | - |
|---|
| 403 | | -static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr, |
|---|
| 404 | | - size_t size, enum dma_data_direction dir, |
|---|
| 405 | | - unsigned long attrs) |
|---|
| 406 | | -{ |
|---|
| 407 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 408 | | - |
|---|
| 409 | | - BUG_ON(!valid_dma_direction(dir)); |
|---|
| 410 | | - if (ops->unmap_resource) |
|---|
| 411 | | - ops->unmap_resource(dev, addr, size, dir, attrs); |
|---|
| 412 | | - debug_dma_unmap_resource(dev, addr, size, dir); |
|---|
| 413 | | -} |
|---|
| 414 | | - |
|---|
| 415 | | -static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, |
|---|
| 416 | | - size_t size, |
|---|
| 417 | | - enum dma_data_direction dir) |
|---|
| 418 | | -{ |
|---|
| 419 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 420 | | - |
|---|
| 421 | | - BUG_ON(!valid_dma_direction(dir)); |
|---|
| 422 | | - if (ops->sync_single_for_cpu) |
|---|
| 423 | | - ops->sync_single_for_cpu(dev, addr, size, dir); |
|---|
| 424 | | - debug_dma_sync_single_for_cpu(dev, addr, size, dir); |
|---|
| 425 | | -} |
|---|
| 426 | | - |
|---|
| 427 | | -static inline void dma_sync_single_for_device(struct device *dev, |
|---|
| 428 | | - dma_addr_t addr, size_t size, |
|---|
| 429 | | - enum dma_data_direction dir) |
|---|
| 430 | | -{ |
|---|
| 431 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 432 | | - |
|---|
| 433 | | - BUG_ON(!valid_dma_direction(dir)); |
|---|
| 434 | | - if (ops->sync_single_for_device) |
|---|
| 435 | | - ops->sync_single_for_device(dev, addr, size, dir); |
|---|
| 436 | | - debug_dma_sync_single_for_device(dev, addr, size, dir); |
|---|
| 303 | + return dma_unmap_page_attrs(dev, addr, size, dir, attrs); |
|---|
| 437 | 304 | } |
|---|
| 438 | 305 | |
|---|
| 439 | 306 | static inline void dma_sync_single_range_for_cpu(struct device *dev, |
|---|
| 440 | | - dma_addr_t addr, |
|---|
| 441 | | - unsigned long offset, |
|---|
| 442 | | - size_t size, |
|---|
| 443 | | - enum dma_data_direction dir) |
|---|
| 307 | + dma_addr_t addr, unsigned long offset, size_t size, |
|---|
| 308 | + enum dma_data_direction dir) |
|---|
| 444 | 309 | { |
|---|
| 445 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 446 | | - |
|---|
| 447 | | - BUG_ON(!valid_dma_direction(dir)); |
|---|
| 448 | | - if (ops->sync_single_for_cpu) |
|---|
| 449 | | - ops->sync_single_for_cpu(dev, addr + offset, size, dir); |
|---|
| 450 | | - debug_dma_sync_single_range_for_cpu(dev, addr, offset, size, dir); |
|---|
| 310 | + return dma_sync_single_for_cpu(dev, addr + offset, size, dir); |
|---|
| 451 | 311 | } |
|---|
| 452 | 312 | |
|---|
| 453 | 313 | static inline void dma_sync_single_range_for_device(struct device *dev, |
|---|
| 454 | | - dma_addr_t addr, |
|---|
| 455 | | - unsigned long offset, |
|---|
| 456 | | - size_t size, |
|---|
| 457 | | - enum dma_data_direction dir) |
|---|
| 458 | | -{ |
|---|
| 459 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 460 | | - |
|---|
| 461 | | - BUG_ON(!valid_dma_direction(dir)); |
|---|
| 462 | | - if (ops->sync_single_for_device) |
|---|
| 463 | | - ops->sync_single_for_device(dev, addr + offset, size, dir); |
|---|
| 464 | | - debug_dma_sync_single_range_for_device(dev, addr, offset, size, dir); |
|---|
| 465 | | -} |
|---|
| 466 | | - |
|---|
| 467 | | -static inline void |
|---|
| 468 | | -dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, |
|---|
| 469 | | - int nelems, enum dma_data_direction dir) |
|---|
| 470 | | -{ |
|---|
| 471 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 472 | | - |
|---|
| 473 | | - BUG_ON(!valid_dma_direction(dir)); |
|---|
| 474 | | - if (ops->sync_sg_for_cpu) |
|---|
| 475 | | - ops->sync_sg_for_cpu(dev, sg, nelems, dir); |
|---|
| 476 | | - debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir); |
|---|
| 477 | | -} |
|---|
| 478 | | - |
|---|
| 479 | | -static inline void |
|---|
| 480 | | -dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, |
|---|
| 481 | | - int nelems, enum dma_data_direction dir) |
|---|
| 482 | | -{ |
|---|
| 483 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 484 | | - |
|---|
| 485 | | - BUG_ON(!valid_dma_direction(dir)); |
|---|
| 486 | | - if (ops->sync_sg_for_device) |
|---|
| 487 | | - ops->sync_sg_for_device(dev, sg, nelems, dir); |
|---|
| 488 | | - debug_dma_sync_sg_for_device(dev, sg, nelems, dir); |
|---|
| 489 | | - |
|---|
| 490 | | -} |
|---|
| 491 | | - |
|---|
| 492 | | -#define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0) |
|---|
| 493 | | -#define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0) |
|---|
| 494 | | -#define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0) |
|---|
| 495 | | -#define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0) |
|---|
| 496 | | -#define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0) |
|---|
| 497 | | -#define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0) |
|---|
| 498 | | - |
|---|
| 499 | | -static inline void |
|---|
| 500 | | -dma_cache_sync(struct device *dev, void *vaddr, size_t size, |
|---|
| 314 | + dma_addr_t addr, unsigned long offset, size_t size, |
|---|
| 501 | 315 | enum dma_data_direction dir) |
|---|
| 502 | 316 | { |
|---|
| 503 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 504 | | - |
|---|
| 505 | | - BUG_ON(!valid_dma_direction(dir)); |
|---|
| 506 | | - if (ops->cache_sync) |
|---|
| 507 | | - ops->cache_sync(dev, vaddr, size, dir); |
|---|
| 317 | + return dma_sync_single_for_device(dev, addr + offset, size, dir); |
|---|
| 508 | 318 | } |
|---|
| 509 | | - |
|---|
| 510 | | -extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma, |
|---|
| 511 | | - void *cpu_addr, dma_addr_t dma_addr, size_t size); |
|---|
| 512 | | - |
|---|
| 513 | | -void *dma_common_contiguous_remap(struct page *page, size_t size, |
|---|
| 514 | | - unsigned long vm_flags, |
|---|
| 515 | | - pgprot_t prot, const void *caller); |
|---|
| 516 | | - |
|---|
| 517 | | -void *dma_common_pages_remap(struct page **pages, size_t size, |
|---|
| 518 | | - unsigned long vm_flags, pgprot_t prot, |
|---|
| 519 | | - const void *caller); |
|---|
| 520 | | -void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags, |
|---|
| 521 | | - bool nowarn); |
|---|
| 522 | | - |
|---|
| 523 | | -/** |
|---|
| 524 | | - * dma_mmap_attrs - map a coherent DMA allocation into user space |
|---|
| 525 | | - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices |
|---|
| 526 | | - * @vma: vm_area_struct describing requested user mapping |
|---|
| 527 | | - * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs |
|---|
| 528 | | - * @handle: device-view address returned from dma_alloc_attrs |
|---|
| 529 | | - * @size: size of memory originally requested in dma_alloc_attrs |
|---|
| 530 | | - * @attrs: attributes of mapping properties requested in dma_alloc_attrs |
|---|
| 531 | | - * |
|---|
| 532 | | - * Map a coherent DMA buffer previously allocated by dma_alloc_attrs |
|---|
| 533 | | - * into user space. The coherent DMA buffer must not be freed by the |
|---|
| 534 | | - * driver until the user space mapping has been released. |
|---|
| 535 | | - */ |
|---|
| 536 | | -static inline int |
|---|
| 537 | | -dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr, |
|---|
| 538 | | - dma_addr_t dma_addr, size_t size, unsigned long attrs) |
|---|
| 539 | | -{ |
|---|
| 540 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 541 | | - BUG_ON(!ops); |
|---|
| 542 | | - if (ops->mmap) |
|---|
| 543 | | - return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs); |
|---|
| 544 | | - return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size); |
|---|
| 545 | | -} |
|---|
| 546 | | - |
|---|
| 547 | | -#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0) |
|---|
| 548 | | - |
|---|
| 549 | | -int |
|---|
| 550 | | -dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, |
|---|
| 551 | | - void *cpu_addr, dma_addr_t dma_addr, size_t size); |
|---|
| 552 | | - |
|---|
| 553 | | -static inline int |
|---|
| 554 | | -dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr, |
|---|
| 555 | | - dma_addr_t dma_addr, size_t size, |
|---|
| 556 | | - unsigned long attrs) |
|---|
| 557 | | -{ |
|---|
| 558 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 559 | | - BUG_ON(!ops); |
|---|
| 560 | | - if (ops->get_sgtable) |
|---|
| 561 | | - return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size, |
|---|
| 562 | | - attrs); |
|---|
| 563 | | - return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size); |
|---|
| 564 | | -} |
|---|
| 565 | | - |
|---|
| 566 | | -#define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0) |
|---|
| 567 | | - |
|---|
| 568 | | -#ifndef arch_dma_alloc_attrs |
|---|
| 569 | | -#define arch_dma_alloc_attrs(dev) (true) |
|---|
| 570 | | -#endif |
|---|
| 571 | | - |
|---|
| 572 | | -static inline void *dma_alloc_attrs(struct device *dev, size_t size, |
|---|
| 573 | | - dma_addr_t *dma_handle, gfp_t flag, |
|---|
| 574 | | - unsigned long attrs) |
|---|
| 575 | | -{ |
|---|
| 576 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 577 | | - void *cpu_addr; |
|---|
| 578 | | - |
|---|
| 579 | | - BUG_ON(!ops); |
|---|
| 580 | | - WARN_ON_ONCE(dev && !dev->coherent_dma_mask); |
|---|
| 581 | | - |
|---|
| 582 | | - if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr)) |
|---|
| 583 | | - return cpu_addr; |
|---|
| 584 | | - |
|---|
| 585 | | - /* let the implementation decide on the zone to allocate from: */ |
|---|
| 586 | | - flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM); |
|---|
| 587 | | - |
|---|
| 588 | | - if (!arch_dma_alloc_attrs(&dev)) |
|---|
| 589 | | - return NULL; |
|---|
| 590 | | - if (!ops->alloc) |
|---|
| 591 | | - return NULL; |
|---|
| 592 | | - |
|---|
| 593 | | - cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs); |
|---|
| 594 | | - debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr); |
|---|
| 595 | | - return cpu_addr; |
|---|
| 596 | | -} |
|---|
| 597 | | - |
|---|
| 598 | | -static inline void dma_free_attrs(struct device *dev, size_t size, |
|---|
| 599 | | - void *cpu_addr, dma_addr_t dma_handle, |
|---|
| 600 | | - unsigned long attrs) |
|---|
| 601 | | -{ |
|---|
| 602 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 603 | | - |
|---|
| 604 | | - BUG_ON(!ops); |
|---|
| 605 | | - |
|---|
| 606 | | - if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr)) |
|---|
| 607 | | - return; |
|---|
| 608 | | - /* |
|---|
| 609 | | - * On non-coherent platforms which implement DMA-coherent buffers via |
|---|
| 610 | | - * non-cacheable remaps, ops->free() may call vunmap(). Thus getting |
|---|
| 611 | | - * this far in IRQ context is a) at risk of a BUG_ON() or trying to |
|---|
| 612 | | - * sleep on some machines, and b) an indication that the driver is |
|---|
| 613 | | - * probably misusing the coherent API anyway. |
|---|
| 614 | | - */ |
|---|
| 615 | | - WARN_ON(irqs_disabled()); |
|---|
| 616 | | - |
|---|
| 617 | | - if (!ops->free || !cpu_addr) |
|---|
| 618 | | - return; |
|---|
| 619 | | - |
|---|
| 620 | | - debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); |
|---|
| 621 | | - ops->free(dev, size, cpu_addr, dma_handle, attrs); |
|---|
| 622 | | -} |
|---|
| 623 | | - |
|---|
| 624 | | -static inline void *dma_alloc_coherent(struct device *dev, size_t size, |
|---|
| 625 | | - dma_addr_t *dma_handle, gfp_t flag) |
|---|
| 626 | | -{ |
|---|
| 627 | | - return dma_alloc_attrs(dev, size, dma_handle, flag, 0); |
|---|
| 628 | | -} |
|---|
| 629 | | - |
|---|
| 630 | | -static inline void dma_free_coherent(struct device *dev, size_t size, |
|---|
| 631 | | - void *cpu_addr, dma_addr_t dma_handle) |
|---|
| 632 | | -{ |
|---|
| 633 | | - return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0); |
|---|
| 634 | | -} |
|---|
| 635 | | - |
|---|
| 636 | | -static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) |
|---|
| 637 | | -{ |
|---|
| 638 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 639 | | - |
|---|
| 640 | | - debug_dma_mapping_error(dev, dma_addr); |
|---|
| 641 | | - if (ops->mapping_error) |
|---|
| 642 | | - return ops->mapping_error(dev, dma_addr); |
|---|
| 643 | | - return 0; |
|---|
| 644 | | -} |
|---|
| 645 | | - |
|---|
| 646 | | -static inline void dma_check_mask(struct device *dev, u64 mask) |
|---|
| 647 | | -{ |
|---|
| 648 | | - if (sme_active() && (mask < (((u64)sme_get_me_mask() << 1) - 1))) |
|---|
| 649 | | - dev_warn(dev, "SME is active, device will require DMA bounce buffers\n"); |
|---|
| 650 | | -} |
|---|
| 651 | | - |
|---|
| 652 | | -static inline int dma_supported(struct device *dev, u64 mask) |
|---|
| 653 | | -{ |
|---|
| 654 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 655 | | - |
|---|
| 656 | | - if (!ops) |
|---|
| 657 | | - return 0; |
|---|
| 658 | | - if (!ops->dma_supported) |
|---|
| 659 | | - return 1; |
|---|
| 660 | | - return ops->dma_supported(dev, mask); |
|---|
| 661 | | -} |
|---|
| 662 | | - |
|---|
| 663 | | -#ifndef HAVE_ARCH_DMA_SET_MASK |
|---|
| 664 | | -static inline int dma_set_mask(struct device *dev, u64 mask) |
|---|
| 665 | | -{ |
|---|
| 666 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 667 | | - |
|---|
| 668 | | - if (ops->set_dma_mask) |
|---|
| 669 | | - return ops->set_dma_mask(dev, mask); |
|---|
| 670 | | - |
|---|
| 671 | | - if (!dev->dma_mask || !dma_supported(dev, mask)) |
|---|
| 672 | | - return -EIO; |
|---|
| 673 | | - |
|---|
| 674 | | - dma_check_mask(dev, mask); |
|---|
| 675 | | - |
|---|
| 676 | | - *dev->dma_mask = mask; |
|---|
| 677 | | - return 0; |
|---|
| 678 | | -} |
|---|
| 679 | | -#endif |
|---|
| 680 | 319 | |
|---|
| 681 | 320 | /** |
|---|
| 682 | 321 | * dma_map_sgtable - Map the given buffer for DMA |
|---|
| .. | .. |
|---|
| 758 | 397 | dma_sync_sg_for_device(dev, sgt->sgl, sgt->orig_nents, dir); |
|---|
| 759 | 398 | } |
|---|
| 760 | 399 | |
|---|
| 761 | | -static inline void *dma_remap(struct device *dev, void *cpu_addr, |
|---|
| 762 | | - dma_addr_t dma_handle, size_t size, unsigned long attrs) |
|---|
| 400 | +#define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0) |
|---|
| 401 | +#define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0) |
|---|
| 402 | +#define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0) |
|---|
| 403 | +#define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0) |
|---|
| 404 | +#define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0) |
|---|
| 405 | +#define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0) |
|---|
| 406 | +#define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0) |
|---|
| 407 | +#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0) |
|---|
| 408 | + |
|---|
| 409 | +static inline void *dma_alloc_coherent(struct device *dev, size_t size, |
|---|
| 410 | + dma_addr_t *dma_handle, gfp_t gfp) |
|---|
| 763 | 411 | { |
|---|
| 764 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 765 | 412 | |
|---|
| 766 | | - if (!ops->remap) { |
|---|
| 767 | | - WARN_ONCE(1, "Remap function not implemented for %pS\n", |
|---|
| 768 | | - ops->remap); |
|---|
| 769 | | - return NULL; |
|---|
| 770 | | - } |
|---|
| 771 | | - |
|---|
| 772 | | - return ops->remap(dev, cpu_addr, dma_handle, size, attrs); |
|---|
| 413 | + return dma_alloc_attrs(dev, size, dma_handle, gfp, |
|---|
| 414 | + (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); |
|---|
| 773 | 415 | } |
|---|
| 774 | 416 | |
|---|
| 775 | | - |
|---|
| 776 | | -static inline void dma_unremap(struct device *dev, void *remapped_addr, |
|---|
| 777 | | - size_t size) |
|---|
| 417 | +static inline void dma_free_coherent(struct device *dev, size_t size, |
|---|
| 418 | + void *cpu_addr, dma_addr_t dma_handle) |
|---|
| 778 | 419 | { |
|---|
| 779 | | - const struct dma_map_ops *ops = get_dma_ops(dev); |
|---|
| 780 | | - |
|---|
| 781 | | - if (!ops->unremap) { |
|---|
| 782 | | - WARN_ONCE(1, "unremap function not implemented for %pS\n", |
|---|
| 783 | | - ops->unremap); |
|---|
| 784 | | - return; |
|---|
| 785 | | - } |
|---|
| 786 | | - |
|---|
| 787 | | - return ops->unremap(dev, remapped_addr, size); |
|---|
| 420 | + return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0); |
|---|
| 788 | 421 | } |
|---|
| 789 | 422 | |
|---|
| 790 | 423 | |
|---|
| 791 | 424 | static inline u64 dma_get_mask(struct device *dev) |
|---|
| 792 | 425 | { |
|---|
| 793 | | - if (dev && dev->dma_mask && *dev->dma_mask) |
|---|
| 426 | + if (dev->dma_mask && *dev->dma_mask) |
|---|
| 794 | 427 | return *dev->dma_mask; |
|---|
| 795 | 428 | return DMA_BIT_MASK(32); |
|---|
| 796 | 429 | } |
|---|
| 797 | | - |
|---|
| 798 | | -#ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK |
|---|
| 799 | | -int dma_set_coherent_mask(struct device *dev, u64 mask); |
|---|
| 800 | | -#else |
|---|
| 801 | | -static inline int dma_set_coherent_mask(struct device *dev, u64 mask) |
|---|
| 802 | | -{ |
|---|
| 803 | | - if (!dma_supported(dev, mask)) |
|---|
| 804 | | - return -EIO; |
|---|
| 805 | | - |
|---|
| 806 | | - dma_check_mask(dev, mask); |
|---|
| 807 | | - |
|---|
| 808 | | - dev->coherent_dma_mask = mask; |
|---|
| 809 | | - return 0; |
|---|
| 810 | | -} |
|---|
| 811 | | -#endif |
|---|
| 812 | 430 | |
|---|
| 813 | 431 | /* |
|---|
| 814 | 432 | * Set both the DMA mask and the coherent DMA mask to the same thing. |
|---|
| .. | .. |
|---|
| 834 | 452 | return dma_set_mask_and_coherent(dev, mask); |
|---|
| 835 | 453 | } |
|---|
| 836 | 454 | |
|---|
| 837 | | -extern u64 dma_get_required_mask(struct device *dev); |
|---|
| 838 | | - |
|---|
| 839 | | -#ifndef arch_setup_dma_ops |
|---|
| 840 | | -static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base, |
|---|
| 841 | | - u64 size, const struct iommu_ops *iommu, |
|---|
| 842 | | - bool coherent) { } |
|---|
| 843 | | -#endif |
|---|
| 844 | | - |
|---|
| 845 | | -#ifndef arch_teardown_dma_ops |
|---|
| 846 | | -static inline void arch_teardown_dma_ops(struct device *dev) { } |
|---|
| 847 | | -#endif |
|---|
| 455 | +/** |
|---|
| 456 | + * dma_addressing_limited - return if the device is addressing limited |
|---|
| 457 | + * @dev: device to check |
|---|
| 458 | + * |
|---|
| 459 | + * Return %true if the devices DMA mask is too small to address all memory in |
|---|
| 460 | + * the system, else %false. Lack of addressing bits is the prime reason for |
|---|
| 461 | + * bounce buffering, but might not be the only one. |
|---|
| 462 | + */ |
|---|
| 463 | +static inline bool dma_addressing_limited(struct device *dev) |
|---|
| 464 | +{ |
|---|
| 465 | + return min_not_zero(dma_get_mask(dev), dev->bus_dma_limit) < |
|---|
| 466 | + dma_get_required_mask(dev); |
|---|
| 467 | +} |
|---|
| 848 | 468 | |
|---|
| 849 | 469 | static inline unsigned int dma_get_max_seg_size(struct device *dev) |
|---|
| 850 | 470 | { |
|---|
| .. | .. |
|---|
| 866 | 486 | { |
|---|
| 867 | 487 | if (dev->dma_parms && dev->dma_parms->segment_boundary_mask) |
|---|
| 868 | 488 | return dev->dma_parms->segment_boundary_mask; |
|---|
| 869 | | - return DMA_BIT_MASK(32); |
|---|
| 489 | + return ULONG_MAX; |
|---|
| 490 | +} |
|---|
| 491 | + |
|---|
| 492 | +/** |
|---|
| 493 | + * dma_get_seg_boundary_nr_pages - return the segment boundary in "page" units |
|---|
| 494 | + * @dev: device to guery the boundary for |
|---|
| 495 | + * @page_shift: ilog() of the IOMMU page size |
|---|
| 496 | + * |
|---|
| 497 | + * Return the segment boundary in IOMMU page units (which may be different from |
|---|
| 498 | + * the CPU page size) for the passed in device. |
|---|
| 499 | + * |
|---|
| 500 | + * If @dev is NULL a boundary of U32_MAX is assumed, this case is just for |
|---|
| 501 | + * non-DMA API callers. |
|---|
| 502 | + */ |
|---|
| 503 | +static inline unsigned long dma_get_seg_boundary_nr_pages(struct device *dev, |
|---|
| 504 | + unsigned int page_shift) |
|---|
| 505 | +{ |
|---|
| 506 | + if (!dev) |
|---|
| 507 | + return (U32_MAX >> page_shift) + 1; |
|---|
| 508 | + return (dma_get_seg_boundary(dev) >> page_shift) + 1; |
|---|
| 870 | 509 | } |
|---|
| 871 | 510 | |
|---|
| 872 | 511 | static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) |
|---|
| .. | .. |
|---|
| 878 | 517 | return -EIO; |
|---|
| 879 | 518 | } |
|---|
| 880 | 519 | |
|---|
| 881 | | -#ifndef dma_max_pfn |
|---|
| 882 | | -static inline unsigned long dma_max_pfn(struct device *dev) |
|---|
| 520 | +static inline unsigned int dma_get_min_align_mask(struct device *dev) |
|---|
| 883 | 521 | { |
|---|
| 884 | | - return (*dev->dma_mask >> PAGE_SHIFT) + dev->dma_pfn_offset; |
|---|
| 522 | + if (dev->dma_parms) |
|---|
| 523 | + return dev->dma_parms->min_align_mask; |
|---|
| 524 | + return 0; |
|---|
| 885 | 525 | } |
|---|
| 886 | | -#endif |
|---|
| 887 | 526 | |
|---|
| 888 | | -static inline void *dma_zalloc_coherent(struct device *dev, size_t size, |
|---|
| 889 | | - dma_addr_t *dma_handle, gfp_t flag) |
|---|
| 527 | +static inline int dma_set_min_align_mask(struct device *dev, |
|---|
| 528 | + unsigned int min_align_mask) |
|---|
| 890 | 529 | { |
|---|
| 891 | | - void *ret = dma_alloc_coherent(dev, size, dma_handle, |
|---|
| 892 | | - flag | __GFP_ZERO); |
|---|
| 893 | | - return ret; |
|---|
| 530 | + if (WARN_ON_ONCE(!dev->dma_parms)) |
|---|
| 531 | + return -EIO; |
|---|
| 532 | + dev->dma_parms->min_align_mask = min_align_mask; |
|---|
| 533 | + return 0; |
|---|
| 894 | 534 | } |
|---|
| 895 | 535 | |
|---|
| 896 | 536 | static inline int dma_get_cache_alignment(void) |
|---|
| .. | .. |
|---|
| 901 | 541 | return 1; |
|---|
| 902 | 542 | } |
|---|
| 903 | 543 | |
|---|
| 904 | | -/* flags for the coherent memory api */ |
|---|
| 905 | | -#define DMA_MEMORY_EXCLUSIVE 0x01 |
|---|
| 906 | | - |
|---|
| 907 | | -#ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT |
|---|
| 908 | | -int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, |
|---|
| 909 | | - dma_addr_t device_addr, size_t size, int flags); |
|---|
| 910 | | -void dma_release_declared_memory(struct device *dev); |
|---|
| 911 | | -void *dma_mark_declared_memory_occupied(struct device *dev, |
|---|
| 912 | | - dma_addr_t device_addr, size_t size); |
|---|
| 913 | | -dma_addr_t dma_get_device_base(struct device *dev, |
|---|
| 914 | | - struct dma_coherent_mem *mem); |
|---|
| 915 | | -unsigned long dma_get_size(struct dma_coherent_mem *mem); |
|---|
| 916 | | - |
|---|
| 917 | | -#else |
|---|
| 918 | | -static inline int |
|---|
| 919 | | -dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, |
|---|
| 920 | | - dma_addr_t device_addr, size_t size, int flags) |
|---|
| 921 | | -{ |
|---|
| 922 | | - return -ENOSYS; |
|---|
| 923 | | -} |
|---|
| 924 | | - |
|---|
| 925 | | -static inline void |
|---|
| 926 | | -dma_release_declared_memory(struct device *dev) |
|---|
| 927 | | -{ |
|---|
| 928 | | -} |
|---|
| 929 | | - |
|---|
| 930 | | -static inline void * |
|---|
| 931 | | -dma_mark_declared_memory_occupied(struct device *dev, |
|---|
| 932 | | - dma_addr_t device_addr, size_t size) |
|---|
| 933 | | -{ |
|---|
| 934 | | - return ERR_PTR(-EBUSY); |
|---|
| 935 | | -} |
|---|
| 936 | | -static inline dma_addr_t |
|---|
| 937 | | -dma_get_device_base(struct device *dev, struct dma_coherent_mem *mem) |
|---|
| 938 | | -{ |
|---|
| 939 | | - return 0; |
|---|
| 940 | | -} |
|---|
| 941 | | - |
|---|
| 942 | | -static inline unsigned long dma_get_size(struct dma_coherent_mem *mem) |
|---|
| 943 | | -{ |
|---|
| 944 | | - return 0; |
|---|
| 945 | | -} |
|---|
| 946 | | - |
|---|
| 947 | | -#endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ |
|---|
| 948 | | - |
|---|
| 949 | | -#ifdef CONFIG_HAS_DMA |
|---|
| 950 | | -int dma_configure(struct device *dev); |
|---|
| 951 | | -void dma_deconfigure(struct device *dev); |
|---|
| 952 | | -#else |
|---|
| 953 | | -static inline int dma_configure(struct device *dev) |
|---|
| 954 | | -{ |
|---|
| 955 | | - return 0; |
|---|
| 956 | | -} |
|---|
| 957 | | - |
|---|
| 958 | | -static inline void dma_deconfigure(struct device *dev) {} |
|---|
| 959 | | -#endif |
|---|
| 960 | | - |
|---|
| 961 | | -/* |
|---|
| 962 | | - * Managed DMA API |
|---|
| 963 | | - */ |
|---|
| 964 | | -#ifdef CONFIG_HAS_DMA |
|---|
| 965 | | -extern void *dmam_alloc_coherent(struct device *dev, size_t size, |
|---|
| 966 | | - dma_addr_t *dma_handle, gfp_t gfp); |
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| 967 | | -extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, |
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| 968 | | - dma_addr_t dma_handle); |
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| 969 | | -#else /* !CONFIG_HAS_DMA */ |
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| 970 | 544 | static inline void *dmam_alloc_coherent(struct device *dev, size_t size, |
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| 971 | | - dma_addr_t *dma_handle, gfp_t gfp) |
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| 972 | | -{ return NULL; } |
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| 973 | | -static inline void dmam_free_coherent(struct device *dev, size_t size, |
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| 974 | | - void *vaddr, dma_addr_t dma_handle) { } |
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| 975 | | -#endif /* !CONFIG_HAS_DMA */ |
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| 976 | | - |
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| 977 | | -extern void *dmam_alloc_attrs(struct device *dev, size_t size, |
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| 978 | | - dma_addr_t *dma_handle, gfp_t gfp, |
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| 979 | | - unsigned long attrs); |
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| 980 | | -#ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT |
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| 981 | | -extern int dmam_declare_coherent_memory(struct device *dev, |
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| 982 | | - phys_addr_t phys_addr, |
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| 983 | | - dma_addr_t device_addr, size_t size, |
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| 984 | | - int flags); |
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| 985 | | -extern void dmam_release_declared_memory(struct device *dev); |
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| 986 | | -#else /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ |
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| 987 | | -static inline int dmam_declare_coherent_memory(struct device *dev, |
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| 988 | | - phys_addr_t phys_addr, dma_addr_t device_addr, |
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| 989 | | - size_t size, gfp_t gfp) |
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| 545 | + dma_addr_t *dma_handle, gfp_t gfp) |
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| 990 | 546 | { |
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| 991 | | - return 0; |
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| 547 | + return dmam_alloc_attrs(dev, size, dma_handle, gfp, |
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| 548 | + (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); |
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| 992 | 549 | } |
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| 993 | | - |
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| 994 | | -static inline void dmam_release_declared_memory(struct device *dev) |
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| 995 | | -{ |
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| 996 | | -} |
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| 997 | | -#endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ |
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| 998 | 550 | |
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| 999 | 551 | static inline void *dma_alloc_wc(struct device *dev, size_t size, |
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| 1000 | 552 | dma_addr_t *dma_addr, gfp_t gfp) |
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| 1001 | 553 | { |
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| 1002 | | - return dma_alloc_attrs(dev, size, dma_addr, gfp, |
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| 1003 | | - DMA_ATTR_WRITE_COMBINE); |
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| 554 | + unsigned long attrs = DMA_ATTR_WRITE_COMBINE; |
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| 555 | + |
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| 556 | + if (gfp & __GFP_NOWARN) |
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| 557 | + attrs |= DMA_ATTR_NO_WARN; |
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| 558 | + |
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| 559 | + return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs); |
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| 1004 | 560 | } |
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| 1005 | | -#ifndef dma_alloc_writecombine |
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| 1006 | | -#define dma_alloc_writecombine dma_alloc_wc |
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| 1007 | | -#endif |
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| 1008 | 561 | |
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| 1009 | 562 | static inline void dma_free_wc(struct device *dev, size_t size, |
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| 1010 | 563 | void *cpu_addr, dma_addr_t dma_addr) |
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| .. | .. |
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| 1012 | 565 | return dma_free_attrs(dev, size, cpu_addr, dma_addr, |
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| 1013 | 566 | DMA_ATTR_WRITE_COMBINE); |
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| 1014 | 567 | } |
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| 1015 | | -#ifndef dma_free_writecombine |
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| 1016 | | -#define dma_free_writecombine dma_free_wc |
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| 1017 | | -#endif |
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| 1018 | 568 | |
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| 1019 | 569 | static inline int dma_mmap_wc(struct device *dev, |
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| 1020 | 570 | struct vm_area_struct *vma, |
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| .. | .. |
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| 1024 | 574 | return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, |
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| 1025 | 575 | DMA_ATTR_WRITE_COMBINE); |
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| 1026 | 576 | } |
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| 1027 | | -#ifndef dma_mmap_writecombine |
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| 1028 | | -#define dma_mmap_writecombine dma_mmap_wc |
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| 1029 | | -#endif |
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| 1030 | 577 | |
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| 1031 | 578 | #ifdef CONFIG_NEED_DMA_MAP_STATE |
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| 1032 | 579 | #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME |
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| .. | .. |
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| 1044 | 591 | #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) |
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| 1045 | 592 | #endif |
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| 1046 | 593 | |
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| 1047 | | -#endif |
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| 594 | +/* |
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| 595 | + * Legacy interface to set up the dma offset map. Drivers really should not |
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| 596 | + * actually use it, but we have a few legacy cases left. |
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| 597 | + */ |
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| 598 | +int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start, |
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| 599 | + dma_addr_t dma_start, u64 size); |
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| 600 | + |
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| 601 | +extern const struct dma_map_ops dma_virt_ops; |
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| 602 | + |
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| 603 | +#endif /* _LINUX_DMA_MAPPING_H */ |
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