disable kernel build waring

hc

2024-05-10 093a6c67005148ae32a5c9e4553491b9f5c2457b

 kernel/include/linux/coresight-pmu.h
..
..
@@ -10,17 +10,27 @@
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 #define CORESIGHT_ETM_PMU_NAME "cs_etm"
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 #define CORESIGHT_ETM_PMU_SEED  0x10
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-/* ETMv3.5/PTM's ETMCR config bit */
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-#define ETM_OPT_CYCACC  12
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-#define ETM_OPT_CTXTID	14
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-#define ETM_OPT_TS      28
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-#define ETM_OPT_RETSTK	29
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+/*
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+ * Below are the definition of bit offsets for perf option, and works as
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+ * arbitrary values for all ETM versions.
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+ *
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+ * Most of them are orignally from ETMv3.5/PTM's ETMCR config, therefore,
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+ * ETMv3.5/PTM doesn't define ETMCR config bits with prefix "ETM3_" and
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+ * directly use below macros as config bits.
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+ */
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+#define ETM_OPT_CYCACC		12
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+#define ETM_OPT_CTXTID		14
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+#define ETM_OPT_CTXTID2		15
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+#define ETM_OPT_TS		28
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+#define ETM_OPT_RETSTK		29
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 /* ETMv4 CONFIGR programming bits for the ETM OPTs */
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 #define ETM4_CFG_BIT_CYCACC	4
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 #define ETM4_CFG_BIT_CTXTID	6
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+#define ETM4_CFG_BIT_VMID	7
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 #define ETM4_CFG_BIT_TS		11
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 #define ETM4_CFG_BIT_RETSTK	12
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+#define ETM4_CFG_BIT_VMID_OPT	15
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 static inline int coresight_get_trace_id(int cpu)
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 {