disable kernel build waring

hc

2024-05-10 093a6c67005148ae32a5c9e4553491b9f5c2457b

 kernel/drivers/net/ethernet/ibm/emac/core.h
..
..
@@ -1,3 +1,4 @@
1
+/* SPDX-License-Identifier: GPL-2.0-or-later */
1
2
 /*
2
3
  * drivers/net/ethernet/ibm/emac/core.h
3
4
  *
..
..
@@ -15,12 +16,6 @@
15
16
  *      Armin Kuster <akuster@mvista.com>
16
17
  * 	Johnnie Peters <jpeters@mvista.com>
17
18
  *      Copyright 2000, 2001 MontaVista Softare Inc.
18
- *
19
- * This program is free software; you can redistribute  it and/or modify it
20
- * under  the terms of  the GNU General  Public License as published by the
21
- * Free Software Foundation;  either version 2 of the  License, or (at your
22
- * option) any later version.
23
- *
24
19
  */
25
20
 #ifndef __IBM_NEWEMAC_CORE_H
26
21
 #define __IBM_NEWEMAC_CORE_H
..
..
@@ -68,22 +63,18 @@
68
63
 		return mal_rx_size(ETH_DATA_LEN + EMAC_MTU_OVERHEAD);
69
64
 }
70
65
 
71
-#define EMAC_DMA_ALIGN(x)		ALIGN((x), dma_get_cache_alignment())
72
-
73
-#define EMAC_RX_SKB_HEADROOM		\
74
-	EMAC_DMA_ALIGN(CONFIG_IBM_EMAC_RX_SKB_HEADROOM)
75
-
76
66
 /* Size of RX skb for the given MTU */
77
67
 static inline int emac_rx_skb_size(int mtu)
78
68
 {
79
69
 	int size = max(mtu + EMAC_MTU_OVERHEAD, emac_rx_size(mtu));
80
-	return EMAC_DMA_ALIGN(size + 2) + EMAC_RX_SKB_HEADROOM;
70
+
71
+	return SKB_DATA_ALIGN(size + NET_IP_ALIGN) + NET_SKB_PAD;
81
72
 }
82
73
 
83
74
 /* RX DMA sync size */
84
75
 static inline int emac_rx_sync_size(int mtu)
85
76
 {
86
-	return EMAC_DMA_ALIGN(emac_rx_size(mtu) + 2);
77
+	return SKB_DATA_ALIGN(emac_rx_size(mtu) + NET_IP_ALIGN);
87
78
 }
88
79
 
89
80
 /* Driver statistcs is split into two parts to make it more cache friendly:
..
..
@@ -180,7 +171,7 @@
180
171
 	struct mal_commac		commac;
181
172
 
182
173
 	/* PHY infos */
183
-	int				phy_mode;
174
+	phy_interface_t			phy_mode;
184
175
 	u32				phy_map;
185
176
 	u32				phy_address;
186
177
 	u32				phy_feat_exc;
..
..
@@ -390,6 +381,9 @@
390
381
 #define	EMAC4SYNC_XAHT_SLOTS_SHIFT	8
391
382
 #define	EMAC4SYNC_XAHT_WIDTH_SHIFT	5
392
383
 
384
+/* The largest span between slots and widths above is 3 */
385
+#define	EMAC_XAHT_MAX_REGS		(1 << 3)
386
+
393
387
 #define	EMAC_XAHT_SLOTS(dev)         	(1 << (dev)->xaht_slots_shift)
394
388
 #define	EMAC_XAHT_WIDTH(dev)         	(1 << (dev)->xaht_width_shift)
395
389
 #define	EMAC_XAHT_REGS(dev)          	(1 << ((dev)->xaht_slots_shift - \