~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,20 +1,12 @@
	1	+// SPDX-License-Identifier: GPL-2.0-only
1	2	/*
2	3	* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
3	4	* Copyright (C) 2017 Linaro Ltd.
4		- *
5		- * This program is free software; you can redistribute it and/or modify
6		- * it under the terms of the GNU General Public License version 2 and
7		- * only version 2 as published by the Free Software Foundation.
8		- *
9		- * This program is distributed in the hope that it will be useful,
10		- * but WITHOUT ANY WARRANTY; without even the implied warranty of
11		- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12		- * GNU General Public License for more details.
13		- *
14	5	*/
15		-#include <linux/clk.h>
16	6	#include <linux/init.h>
	7	+#include <linux/interconnect.h>
17	8	#include <linux/ioctl.h>
	9	+#include <linux/delay.h>
18	10	#include <linux/list.h>
19	11	#include <linux/module.h>
20	12	#include <linux/of_device.h>
..	..	@@ -27,9 +19,9 @@
27	19	#include <media/v4l2-ioctl.h>
28	20
29	21	#include "core.h"
30		-#include "vdec.h"
31		-#include "venc.h"
32	22	#include "firmware.h"
	23	+#include "pm_helpers.h"
	24	+#include "hfi_venus_io.h"
33	25
34	26	static void venus_event_notify(struct venus_core *core, u32 event)
35	27	{
..	..	@@ -50,106 +42,96 @@
50	42	mutex_unlock(&core->lock);
51	43
52	44	disable_irq_nosync(core->irq);
53		-
54		- /*
55		- * Delay recovery to ensure venus has completed any pending cache
56		- * operations. Without this sleep, we see device reset when firmware is
57		- * unloaded after a system error.
58		- */
59		- schedule_delayed_work(&core->work, msecs_to_jiffies(100));
	45	+ schedule_delayed_work(&core->work, msecs_to_jiffies(10));
60	46	}
61	47
62	48	static const struct hfi_core_ops venus_core_ops = {
63	49	.event_notify = venus_event_notify,
64	50	};
65	51
	52	+#define RPM_WAIT_FOR_IDLE_MAX_ATTEMPTS 10
	53	+
66	54	static void venus_sys_error_handler(struct work_struct *work)
67	55	{
68	56	struct venus_core *core =
69	57	container_of(work, struct venus_core, work.work);
70		- int ret = 0;
	58	+ int ret, i, max_attempts = RPM_WAIT_FOR_IDLE_MAX_ATTEMPTS;
	59	+ const char *err_msg = "";
	60	+ bool failed = false;
71	61
72		- dev_warn(core->dev, "system error has occurred, starting recovery!\n");
73		-
74		- pm_runtime_get_sync(core->dev);
	62	+ ret = pm_runtime_get_sync(core->dev);
	63	+ if (ret < 0) {
	64	+ err_msg = "resume runtime PM";
	65	+ max_attempts = 0;
	66	+ failed = true;
	67	+ }
75	68
76	69	hfi_core_deinit(core, true);
77		- hfi_destroy(core);
	70	+
78	71	mutex_lock(&core->lock);
79		- venus_shutdown(core->dev);
	72	+
	73	+ for (i = 0; i < max_attempts; i++) {
	74	+ if (!pm_runtime_active(core->dev_dec) && !pm_runtime_active(core->dev_enc))
	75	+ break;
	76	+ msleep(10);
	77	+ }
	78	+
	79	+ venus_shutdown(core);
80	80
81	81	pm_runtime_put_sync(core->dev);
82	82
83		- ret \|= hfi_create(core, &venus_core_ops);
	83	+ for (i = 0; i < max_attempts; i++) {
	84	+ if (!core->pmdomains[0] \|\| !pm_runtime_active(core->pmdomains[0]))
	85	+ break;
	86	+ usleep_range(1000, 1500);
	87	+ }
84	88
85		- pm_runtime_get_sync(core->dev);
	89	+ hfi_reinit(core);
86	90
87		- ret \|= venus_boot(core->dev, core->res->fwname);
	91	+ ret = pm_runtime_get_sync(core->dev);
	92	+ if (ret < 0) {
	93	+ err_msg = "resume runtime PM";
	94	+ failed = true;
	95	+ }
88	96
89		- ret \|= hfi_core_resume(core, true);
	97	+ ret = venus_boot(core);
	98	+ if (ret && !failed) {
	99	+ err_msg = "boot Venus";
	100	+ failed = true;
	101	+ }
	102	+
	103	+ ret = hfi_core_resume(core, true);
	104	+ if (ret && !failed) {
	105	+ err_msg = "resume HFI";
	106	+ failed = true;
	107	+ }
90	108
91	109	enable_irq(core->irq);
92	110
93	111	mutex_unlock(&core->lock);
94	112
95		- ret \|= hfi_core_init(core);
	113	+ ret = hfi_core_init(core);
	114	+ if (ret && !failed) {
	115	+ err_msg = "init HFI";
	116	+ failed = true;
	117	+ }
96	118
97	119	pm_runtime_put_sync(core->dev);
98	120
99		- if (ret) {
	121	+ if (failed) {
100	122	disable_irq_nosync(core->irq);
101		- dev_warn(core->dev, "recovery failed (%d)\n", ret);
	123	+ dev_warn_ratelimited(core->dev,
	124	+ "System error has occurred, recovery failed to %s\n",
	125	+ err_msg);
102	126	schedule_delayed_work(&core->work, msecs_to_jiffies(10));
103	127	return;
104	128	}
105	129
	130	+ dev_warn(core->dev, "system error has occurred (recovered)\n");
	131	+
106	132	mutex_lock(&core->lock);
107	133	core->sys_error = false;
108	134	mutex_unlock(&core->lock);
109		-}
110		-
111		-static int venus_clks_get(struct venus_core *core)
112		-{
113		- const struct venus_resources *res = core->res;
114		- struct device *dev = core->dev;
115		- unsigned int i;
116		-
117		- for (i = 0; i < res->clks_num; i++) {
118		- core->clks[i] = devm_clk_get(dev, res->clks[i]);
119		- if (IS_ERR(core->clks[i]))
120		- return PTR_ERR(core->clks[i]);
121		- }
122		-
123		- return 0;
124		-}
125		-
126		-static int venus_clks_enable(struct venus_core *core)
127		-{
128		- const struct venus_resources *res = core->res;
129		- unsigned int i;
130		- int ret;
131		-
132		- for (i = 0; i < res->clks_num; i++) {
133		- ret = clk_prepare_enable(core->clks[i]);
134		- if (ret)
135		- goto err;
136		- }
137		-
138		- return 0;
139		-err:
140		- while (i--)
141		- clk_disable_unprepare(core->clks[i]);
142		-
143		- return ret;
144		-}
145		-
146		-static void venus_clks_disable(struct venus_core *core)
147		-{
148		- const struct venus_resources *res = core->res;
149		- unsigned int i = res->clks_num;
150		-
151		- while (i--)
152		- clk_disable_unprepare(core->clks[i]);
153	135	}
154	136
155	137	static u32 to_v4l2_codec_type(u32 codec)
..	..	@@ -207,7 +189,7 @@
207	189	goto err;
208	190
209	191	for (i = 0; i < MAX_CODEC_NUM; i++) {
210		- codec = (1 << i) & codecs;
	192	+ codec = (1UL << i) & codecs;
211	193	if (!codec)
212	194	continue;
213	195
..	..	@@ -229,6 +211,15 @@
229	211	return ret;
230	212	}
231	213
	214	+static void venus_assign_register_offsets(struct venus_core *core)
	215	+{
	216	+ core->vbif_base = core->base + VBIF_BASE;
	217	+ core->cpu_base = core->base + CPU_BASE;
	218	+ core->cpu_cs_base = core->base + CPU_CS_BASE;
	219	+ core->cpu_ic_base = core->base + CPU_IC_BASE;
	220	+ core->wrapper_base = core->base + WRAPPER_BASE;
	221	+}
	222	+
232	223	static int venus_probe(struct platform_device *pdev)
233	224	{
234	225	struct device *dev = &pdev->dev;
..	..	@@ -241,12 +232,19 @@
241	232	return -ENOMEM;
242	233
243	234	core->dev = dev;
244		- platform_set_drvdata(pdev, core);
245	235
246	236	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
247	237	core->base = devm_ioremap_resource(dev, r);
248	238	if (IS_ERR(core->base))
249	239	return PTR_ERR(core->base);
	240	+
	241	+ core->video_path = devm_of_icc_get(dev, "video-mem");
	242	+ if (IS_ERR(core->video_path))
	243	+ return PTR_ERR(core->video_path);
	244	+
	245	+ core->cpucfg_path = devm_of_icc_get(dev, "cpu-cfg");
	246	+ if (IS_ERR(core->cpucfg_path))
	247	+ return PTR_ERR(core->cpucfg_path);
250	248
251	249	core->irq = platform_get_irq(pdev, 0);
252	250	if (core->irq < 0)
..	..	@@ -256,21 +254,23 @@
256	254	if (!core->res)
257	255	return -ENODEV;
258	256
259		- ret = venus_clks_get(core);
260		- if (ret)
261		- return ret;
	257	+ mutex_init(&core->pm_lock);
	258	+
	259	+ core->pm_ops = venus_pm_get(core->res->hfi_version);
	260	+ if (!core->pm_ops)
	261	+ return -ENODEV;
	262	+
	263	+ if (core->pm_ops->core_get) {
	264	+ ret = core->pm_ops->core_get(core);
	265	+ if (ret)
	266	+ return ret;
	267	+ }
262	268
263	269	ret = dma_set_mask_and_coherent(dev, core->res->dma_mask);
264	270	if (ret)
265		- return ret;
	271	+ goto err_core_put;
266	272
267		- if (!dev->dma_parms) {
268		- dev->dma_parms = devm_kzalloc(dev, sizeof(*dev->dma_parms),
269		- GFP_KERNEL);
270		- if (!dev->dma_parms)
271		- return -ENOMEM;
272		- }
273		- dma_set_max_seg_size(dev, DMA_BIT_MASK(32));
	273	+ dma_set_max_seg_size(dev, UINT_MAX);
274	274
275	275	INIT_LIST_HEAD(&core->instances);
276	276	mutex_init(&core->lock);
..	..	@@ -280,11 +280,19 @@
280	280	IRQF_TRIGGER_HIGH \| IRQF_ONESHOT,
281	281	"venus", core);
282	282	if (ret)
283		- return ret;
	283	+ goto err_core_put;
284	284
285	285	ret = hfi_create(core, &venus_core_ops);
286	286	if (ret)
287		- return ret;
	287	+ goto err_core_put;
	288	+
	289	+ venus_assign_register_offsets(core);
	290	+
	291	+ ret = v4l2_device_register(dev, &core->v4l2_dev);
	292	+ if (ret)
	293	+ goto err_core_deinit;
	294	+
	295	+ platform_set_drvdata(pdev, core);
288	296
289	297	pm_runtime_enable(dev);
290	298
..	..	@@ -292,9 +300,17 @@
292	300	if (ret < 0)
293	301	goto err_runtime_disable;
294	302
295		- ret = venus_boot(dev, core->res->fwname);
	303	+ ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
296	304	if (ret)
297	305	goto err_runtime_disable;
	306	+
	307	+ ret = venus_firmware_init(core);
	308	+ if (ret)
	309	+ goto err_of_depopulate;
	310	+
	311	+ ret = venus_boot(core);
	312	+ if (ret)
	313	+ goto err_firmware_deinit;
298	314
299	315	ret = hfi_core_resume(core, true);
300	316	if (ret)
..	..	@@ -312,39 +328,41 @@
312	328	if (ret)
313	329	goto err_venus_shutdown;
314	330
315		- ret = v4l2_device_register(dev, &core->v4l2_dev);
316		- if (ret)
317		- goto err_core_deinit;
318		-
319		- ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
320		- if (ret)
321		- goto err_dev_unregister;
322		-
323	331	ret = pm_runtime_put_sync(dev);
324	332	if (ret) {
325	333	pm_runtime_get_noresume(dev);
326	334	goto err_dev_unregister;
327	335	}
328	336
	337	+ venus_dbgfs_init(core);
	338	+
329	339	return 0;
330	340
331	341	err_dev_unregister:
332	342	v4l2_device_unregister(&core->v4l2_dev);
333		-err_core_deinit:
334		- hfi_core_deinit(core, false);
335	343	err_venus_shutdown:
336		- venus_shutdown(dev);
	344	+ venus_shutdown(core);
	345	+err_firmware_deinit:
	346	+ venus_firmware_deinit(core);
	347	+err_of_depopulate:
	348	+ of_platform_depopulate(dev);
337	349	err_runtime_disable:
338	350	pm_runtime_put_noidle(dev);
339	351	pm_runtime_set_suspended(dev);
340	352	pm_runtime_disable(dev);
341	353	hfi_destroy(core);
	354	+err_core_deinit:
	355	+ hfi_core_deinit(core, false);
	356	+err_core_put:
	357	+ if (core->pm_ops->core_put)
	358	+ core->pm_ops->core_put(core);
342	359	return ret;
343	360	}
344	361
345	362	static int venus_remove(struct platform_device *pdev)
346	363	{
347	364	struct venus_core *core = platform_get_drvdata(pdev);
	365	+ const struct venus_pm_ops *pm_ops = core->pm_ops;
348	366	struct device *dev = core->dev;
349	367	int ret;
350	368
..	..	@@ -354,14 +372,24 @@
354	372	ret = hfi_core_deinit(core, true);
355	373	WARN_ON(ret);
356	374
357		- hfi_destroy(core);
358		- venus_shutdown(dev);
	375	+ venus_shutdown(core);
359	376	of_platform_depopulate(dev);
	377	+
	378	+ venus_firmware_deinit(core);
360	379
361	380	pm_runtime_put_sync(dev);
362	381	pm_runtime_disable(dev);
363	382
	383	+ if (pm_ops->core_put)
	384	+ pm_ops->core_put(core);
	385	+
364	386	v4l2_device_unregister(&core->v4l2_dev);
	387	+
	388	+ hfi_destroy(core);
	389	+
	390	+ mutex_destroy(&core->pm_lock);
	391	+ mutex_destroy(&core->lock);
	392	+ venus_dbgfs_deinit(core);
365	393
366	394	return ret;
367	395	}
..	..	@@ -369,11 +397,34 @@
369	397	static __maybe_unused int venus_runtime_suspend(struct device *dev)
370	398	{
371	399	struct venus_core *core = dev_get_drvdata(dev);
	400	+ const struct venus_pm_ops *pm_ops = core->pm_ops;
372	401	int ret;
373	402
374	403	ret = hfi_core_suspend(core);
	404	+ if (ret)
	405	+ return ret;
375	406
376		- venus_clks_disable(core);
	407	+ if (pm_ops->core_power) {
	408	+ ret = pm_ops->core_power(core, POWER_OFF);
	409	+ if (ret)
	410	+ return ret;
	411	+ }
	412	+
	413	+ ret = icc_set_bw(core->cpucfg_path, 0, 0);
	414	+ if (ret)
	415	+ goto err_cpucfg_path;
	416	+
	417	+ ret = icc_set_bw(core->video_path, 0, 0);
	418	+ if (ret)
	419	+ goto err_video_path;
	420	+
	421	+ return ret;
	422	+
	423	+err_video_path:
	424	+ icc_set_bw(core->cpucfg_path, kbps_to_icc(1000), 0);
	425	+err_cpucfg_path:
	426	+ if (pm_ops->core_power)
	427	+ pm_ops->core_power(core, POWER_ON);
377	428
378	429	return ret;
379	430	}
..	..	@@ -381,21 +432,24 @@
381	432	static __maybe_unused int venus_runtime_resume(struct device *dev)
382	433	{
383	434	struct venus_core *core = dev_get_drvdata(dev);
	435	+ const struct venus_pm_ops *pm_ops = core->pm_ops;
384	436	int ret;
385	437
386		- ret = venus_clks_enable(core);
	438	+ ret = icc_set_bw(core->video_path, kbps_to_icc(20000), 0);
387	439	if (ret)
388	440	return ret;
389	441
390		- ret = hfi_core_resume(core, false);
	442	+ ret = icc_set_bw(core->cpucfg_path, kbps_to_icc(1000), 0);
391	443	if (ret)
392		- goto err_clks_disable;
	444	+ return ret;
393	445
394		- return 0;
	446	+ if (pm_ops->core_power) {
	447	+ ret = pm_ops->core_power(core, POWER_ON);
	448	+ if (ret)
	449	+ return ret;
	450	+ }
395	451
396		-err_clks_disable:
397		- venus_clks_disable(core);
398		- return ret;
	452	+ return hfi_core_resume(core, false);
399	453	}
400	454
401	455	static const struct dev_pm_ops venus_pm_ops = {
..	..	@@ -453,6 +507,9 @@
453	507	.reg_tbl_size = ARRAY_SIZE(msm8996_reg_preset),
454	508	.clks = {"core", "iface", "bus", "mbus" },
455	509	.clks_num = 4,
	510	+ .vcodec0_clks = { "core" },
	511	+ .vcodec1_clks = { "core" },
	512	+ .vcodec_clks_num = 1,
456	513	.max_load = 2563200,
457	514	.hfi_version = HFI_VERSION_3XX,
458	515	.vmem_id = VIDC_RESOURCE_NONE,
..	..	@@ -463,18 +520,54 @@
463	520	};
464	521
465	522	static const struct freq_tbl sdm845_freq_table[] = {
466		- { 1944000, 380000000 }, /* 4k UHD @ 60 */
467		- { 972000, 320000000 }, /* 4k UHD @ 30 */
468		- { 489600, 200000000 }, /* 1080p @ 60 */
469		- { 244800, 100000000 }, /* 1080p @ 30 */
	523	+ { 3110400, 533000000 }, /* 4096x2160@90 */
	524	+ { 2073600, 444000000 }, /* 4096x2160@60 */
	525	+ { 1944000, 404000000 }, /* 3840x2160@60 */
	526	+ { 972000, 330000000 }, /* 3840x2160@30 */
	527	+ { 489600, 200000000 }, /* 1920x1080@60 */
	528	+ { 244800, 100000000 }, /* 1920x1080@30 */
	529	+};
	530	+
	531	+static const struct codec_freq_data sdm845_codec_freq_data[] = {
	532	+ { V4L2_PIX_FMT_H264, VIDC_SESSION_TYPE_ENC, 675, 10 },
	533	+ { V4L2_PIX_FMT_HEVC, VIDC_SESSION_TYPE_ENC, 675, 10 },
	534	+ { V4L2_PIX_FMT_VP8, VIDC_SESSION_TYPE_ENC, 675, 10 },
	535	+ { V4L2_PIX_FMT_MPEG2, VIDC_SESSION_TYPE_DEC, 200, 10 },
	536	+ { V4L2_PIX_FMT_H264, VIDC_SESSION_TYPE_DEC, 200, 10 },
	537	+ { V4L2_PIX_FMT_HEVC, VIDC_SESSION_TYPE_DEC, 200, 10 },
	538	+ { V4L2_PIX_FMT_VP8, VIDC_SESSION_TYPE_DEC, 200, 10 },
	539	+ { V4L2_PIX_FMT_VP9, VIDC_SESSION_TYPE_DEC, 200, 10 },
	540	+};
	541	+
	542	+static const struct bw_tbl sdm845_bw_table_enc[] = {
	543	+ { 1944000, 1612000, 0, 2416000, 0 }, /* 3840x2160@60 */
	544	+ { 972000, 951000, 0, 1434000, 0 }, /* 3840x2160@30 */
	545	+ { 489600, 723000, 0, 973000, 0 }, /* 1920x1080@60 */
	546	+ { 244800, 370000, 0, 495000, 0 }, /* 1920x1080@30 */
	547	+};
	548	+
	549	+static const struct bw_tbl sdm845_bw_table_dec[] = {
	550	+ { 2073600, 3929000, 0, 5551000, 0 }, /* 4096x2160@60 */
	551	+ { 1036800, 1987000, 0, 2797000, 0 }, /* 4096x2160@30 */
	552	+ { 489600, 1040000, 0, 1298000, 0 }, /* 1920x1080@60 */
	553	+ { 244800, 530000, 0, 659000, 0 }, /* 1920x1080@30 */
470	554	};
471	555
472	556	static const struct venus_resources sdm845_res = {
473	557	.freq_tbl = sdm845_freq_table,
474	558	.freq_tbl_size = ARRAY_SIZE(sdm845_freq_table),
	559	+ .bw_tbl_enc = sdm845_bw_table_enc,
	560	+ .bw_tbl_enc_size = ARRAY_SIZE(sdm845_bw_table_enc),
	561	+ .bw_tbl_dec = sdm845_bw_table_dec,
	562	+ .bw_tbl_dec_size = ARRAY_SIZE(sdm845_bw_table_dec),
	563	+ .codec_freq_data = sdm845_codec_freq_data,
	564	+ .codec_freq_data_size = ARRAY_SIZE(sdm845_codec_freq_data),
475	565	.clks = {"core", "iface", "bus" },
476	566	.clks_num = 3,
477		- .max_load = 2563200,
	567	+ .vcodec0_clks = { "core", "bus" },
	568	+ .vcodec1_clks = { "core", "bus" },
	569	+ .vcodec_clks_num = 2,
	570	+ .max_load = 3110400, /* 4096x2160@90 */
478	571	.hfi_version = HFI_VERSION_4XX,
479	572	.vmem_id = VIDC_RESOURCE_NONE,
480	573	.vmem_size = 0,
..	..	@@ -483,10 +576,88 @@
483	576	.fwname = "qcom/venus-5.2/venus.mdt",
484	577	};
485	578
	579	+static const struct venus_resources sdm845_res_v2 = {
	580	+ .freq_tbl = sdm845_freq_table,
	581	+ .freq_tbl_size = ARRAY_SIZE(sdm845_freq_table),
	582	+ .bw_tbl_enc = sdm845_bw_table_enc,
	583	+ .bw_tbl_enc_size = ARRAY_SIZE(sdm845_bw_table_enc),
	584	+ .bw_tbl_dec = sdm845_bw_table_dec,
	585	+ .bw_tbl_dec_size = ARRAY_SIZE(sdm845_bw_table_dec),
	586	+ .codec_freq_data = sdm845_codec_freq_data,
	587	+ .codec_freq_data_size = ARRAY_SIZE(sdm845_codec_freq_data),
	588	+ .clks = {"core", "iface", "bus" },
	589	+ .clks_num = 3,
	590	+ .vcodec0_clks = { "vcodec0_core", "vcodec0_bus" },
	591	+ .vcodec1_clks = { "vcodec1_core", "vcodec1_bus" },
	592	+ .vcodec_clks_num = 2,
	593	+ .vcodec_pmdomains = { "venus", "vcodec0", "vcodec1" },
	594	+ .vcodec_pmdomains_num = 3,
	595	+ .opp_pmdomain = (const char *[]) { "cx", NULL },
	596	+ .vcodec_num = 2,
	597	+ .max_load = 3110400, /* 4096x2160@90 */
	598	+ .hfi_version = HFI_VERSION_4XX,
	599	+ .vmem_id = VIDC_RESOURCE_NONE,
	600	+ .vmem_size = 0,
	601	+ .vmem_addr = 0,
	602	+ .dma_mask = 0xe0000000 - 1,
	603	+ .cp_start = 0,
	604	+ .cp_size = 0x70800000,
	605	+ .cp_nonpixel_start = 0x1000000,
	606	+ .cp_nonpixel_size = 0x24800000,
	607	+ .fwname = "qcom/venus-5.2/venus.mdt",
	608	+};
	609	+
	610	+static const struct freq_tbl sc7180_freq_table[] = {
	611	+ { 0, 500000000 },
	612	+ { 0, 434000000 },
	613	+ { 0, 340000000 },
	614	+ { 0, 270000000 },
	615	+ { 0, 150000000 },
	616	+};
	617	+
	618	+static const struct bw_tbl sc7180_bw_table_enc[] = {
	619	+ { 972000, 750000, 0, 0, 0 }, /* 3840x2160@30 */
	620	+ { 489600, 451000, 0, 0, 0 }, /* 1920x1080@60 */
	621	+ { 244800, 234000, 0, 0, 0 }, /* 1920x1080@30 */
	622	+};
	623	+
	624	+static const struct bw_tbl sc7180_bw_table_dec[] = {
	625	+ { 1036800, 1386000, 0, 1875000, 0 }, /* 4096x2160@30 */
	626	+ { 489600, 865000, 0, 1146000, 0 }, /* 1920x1080@60 */
	627	+ { 244800, 530000, 0, 583000, 0 }, /* 1920x1080@30 */
	628	+};
	629	+
	630	+static const struct venus_resources sc7180_res = {
	631	+ .freq_tbl = sc7180_freq_table,
	632	+ .freq_tbl_size = ARRAY_SIZE(sc7180_freq_table),
	633	+ .bw_tbl_enc = sc7180_bw_table_enc,
	634	+ .bw_tbl_enc_size = ARRAY_SIZE(sc7180_bw_table_enc),
	635	+ .bw_tbl_dec = sc7180_bw_table_dec,
	636	+ .bw_tbl_dec_size = ARRAY_SIZE(sc7180_bw_table_dec),
	637	+ .codec_freq_data = sdm845_codec_freq_data,
	638	+ .codec_freq_data_size = ARRAY_SIZE(sdm845_codec_freq_data),
	639	+ .clks = {"core", "iface", "bus" },
	640	+ .clks_num = 3,
	641	+ .vcodec0_clks = { "vcodec0_core", "vcodec0_bus" },
	642	+ .vcodec_clks_num = 2,
	643	+ .vcodec_pmdomains = { "venus", "vcodec0" },
	644	+ .vcodec_pmdomains_num = 2,
	645	+ .opp_pmdomain = (const char *[]) { "cx", NULL },
	646	+ .vcodec_num = 1,
	647	+ .hfi_version = HFI_VERSION_4XX,
	648	+ .vmem_id = VIDC_RESOURCE_NONE,
	649	+ .vmem_size = 0,
	650	+ .vmem_addr = 0,
	651	+ .dma_mask = 0xe0000000 - 1,
	652	+ .fwname = "qcom/venus-5.4/venus.mdt",
	653	+};
	654	+
486	655	static const struct of_device_id venus_dt_match[] = {
487	656	{ .compatible = "qcom,msm8916-venus", .data = &msm8916_res, },
488	657	{ .compatible = "qcom,msm8996-venus", .data = &msm8996_res, },
489	658	{ .compatible = "qcom,sdm845-venus", .data = &sdm845_res, },
	659	+ { .compatible = "qcom,sdm845-venus-v2", .data = &sdm845_res_v2, },
	660	+ { .compatible = "qcom,sc7180-venus", .data = &sc7180_res, },
490	661	{ }
491	662	};
492	663	MODULE_DEVICE_TABLE(of, venus_dt_match);