disable kernel build waring

hc

2024-05-10 093a6c67005148ae32a5c9e4553491b9f5c2457b

 kernel/arch/powerpc/include/asm/smp.h
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@@ -1,3 +1,4 @@
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+/* SPDX-License-Identifier: GPL-2.0-or-later */
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 /* 
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  * smp.h: PowerPC-specific SMP code.
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  *
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@@ -6,11 +7,6 @@
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  *
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  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
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  * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
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- *
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- * This program is free software; you can redistribute it and/or
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- * modify it under the terms of the GNU General Public License
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- * as published by the Free Software Foundation; either version
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- * 2 of the License, or (at your option) any later version.
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  */
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 #ifndef _ASM_POWERPC_SMP_H
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@@ -32,8 +28,8 @@
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 extern int boot_cpuid;
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 extern int spinning_secondaries;
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 extern u32 *cpu_to_phys_id;
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+extern bool coregroup_enabled;
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-extern void cpu_die(void);
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 extern int cpu_to_chip_id(int cpu);
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 #ifdef CONFIG_SMP
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@@ -54,6 +50,9 @@
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 	int   (*cpu_disable)(void);
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 	void  (*cpu_die)(unsigned int nr);
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 	int   (*cpu_bootable)(unsigned int nr);
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+#ifdef CONFIG_HOTPLUG_CPU
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+	void  (*cpu_offline_self)(void);
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+#endif
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 };
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 extern int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
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@@ -83,7 +82,22 @@
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 /* 32-bit */
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 extern int smp_hw_index[];
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-#define raw_smp_processor_id()	(current_thread_info()->cpu)
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+/*
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+ * This is particularly ugly: it appears we can't actually get the definition
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+ * of task_struct here, but we need access to the CPU this task is running on.
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+ * Instead of using task_struct we're using _TASK_CPU which is extracted from
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+ * asm-offsets.h by kbuild to get the current processor ID.
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+ *
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+ * This also needs to be safeguarded when building asm-offsets.s because at
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+ * that time _TASK_CPU is not defined yet. It could have been guarded by
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+ * _TASK_CPU itself, but we want the build to fail if _TASK_CPU is missing
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+ * when building something else than asm-offsets.s
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+ */
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+#ifdef GENERATING_ASM_OFFSETS
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+#define raw_smp_processor_id()		(0)
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+#else
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+#define raw_smp_processor_id()		(*(unsigned int *)((void *)current + _TASK_CPU))
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+#endif
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 #define hard_smp_processor_id() 	(smp_hw_index[smp_processor_id()])
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 static inline int get_hard_smp_processor_id(int cpu)
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@@ -100,6 +114,7 @@
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 DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
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 DECLARE_PER_CPU(cpumask_var_t, cpu_l2_cache_map);
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 DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
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+DECLARE_PER_CPU(cpumask_var_t, cpu_smallcore_map);
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 static inline struct cpumask *cpu_sibling_mask(int cpu)
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 {
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@@ -116,7 +131,25 @@
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 	return per_cpu(cpu_l2_cache_map, cpu);
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 }
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+static inline struct cpumask *cpu_smallcore_mask(int cpu)
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+{
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+	return per_cpu(cpu_smallcore_map, cpu);
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+}
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+
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 extern int cpu_to_core_id(int cpu);
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+
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+extern bool has_big_cores;
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+
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+#define cpu_smt_mask cpu_smt_mask
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+#ifdef CONFIG_SCHED_SMT
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+static inline const struct cpumask *cpu_smt_mask(int cpu)
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+{
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+	if (has_big_cores)
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+		return per_cpu(cpu_smallcore_map, cpu);
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+
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+	return per_cpu(cpu_sibling_map, cpu);
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+}
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+#endif /* CONFIG_SCHED_SMT */
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 /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
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  *
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@@ -162,6 +195,11 @@
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 static inline void inhibit_secondary_onlining(void) {}
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 static inline void uninhibit_secondary_onlining(void) {}
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 static inline const struct cpumask *cpu_sibling_mask(int cpu)
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+{
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+	return cpumask_of(cpu);
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+}
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+
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+static inline const struct cpumask *cpu_smallcore_mask(int cpu)
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 {
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 	return cpumask_of(cpu);
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 }
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@@ -221,7 +259,6 @@
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  * 64-bit but defining them all here doesn't harm
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  */
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 extern void generic_secondary_smp_init(void);
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-extern void generic_secondary_thread_init(void);
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 extern unsigned long __secondary_hold_spinloop;
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 extern unsigned long __secondary_hold_acknowledge;
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 extern char __secondary_hold;