forked from ~ljy/RK356X_SDK_RELEASE
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hc
2023-12-06 08f87f769b595151be1afeff53e144f543faa614 
 kernel/drivers/tty/serial/8250/8250_port.c
....@@ -11,15 +11,12 @@
1111  *  membase is an 'ioremapped' cookie.
1212  */
1313 
14
-#if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
15
-#define SUPPORT_SYSRQ
16
-#endif
17
-
1814 #include <linux/module.h>
1915 #include <linux/moduleparam.h>
2016 #include <linux/ioport.h>
2117 #include <linux/init.h>
2218 #include <linux/console.h>
19
+#include <linux/gpio/consumer.h>
2320 #include <linux/sysrq.h>
2421 #include <linux/delay.h>
2522 #include <linux/platform_device.h>
....@@ -40,13 +37,6 @@
4037 
4138 #include "8250.h"
4239 
43
-/*
44
- * These are definitions for the Exar XR17V35X and XR17(C|D)15X
45
- */
46
-#define UART_EXAR_INT0		0x80
47
-#define UART_EXAR_SLEEP		0x8b	/* Sleep mode */
48
-#define UART_EXAR_DVID		0x8d	/* Device identification */
49
-
5040 /* Nuvoton NPCM timeout register */
5141 #define UART_NPCM_TOR          7
5242 #define UART_NPCM_TOIE         BIT(7)  /* Timeout Interrupt Enable */
....@@ -66,6 +56,7 @@
6656  * Here we define the default xmit fifo size used for each type of UART.
6757  */
6858 static const struct serial8250_config uart_config[] = {
59
+#ifndef CONFIG_ROCKCHIP_MINI_KERNEL
6960 	[PORT_UNKNOWN] = {
7061 		.name		= "unknown",
7162 		.fifo_size	= 1,
....@@ -86,6 +77,7 @@
8677 		.fifo_size	= 1,
8778 		.tx_loadsz	= 1,
8879 	},
80
+#endif
8981 	[PORT_16550A] = {
9082 		.name		= "16550A",
9183 		.fifo_size	= 16,
....@@ -94,6 +86,7 @@
9486 		.rxtrig_bytes	= {1, 4, 8, 14},
9587 		.flags		= UART_CAP_FIFO,
9688 	},
89
+#ifndef CONFIG_ROCKCHIP_MINI_KERNEL
9790 	[PORT_CIRRUS] = {
9891 		.name		= "Cirrus",
9992 		.fifo_size	= 1,
....@@ -309,6 +302,15 @@
309302 		.rxtrig_bytes	= {1, 4, 8, 14},
310303 		.flags		= UART_CAP_FIFO,
311304 	},
305
+	[PORT_SUNIX] = {
306
+		.name		= "Sunix",
307
+		.fifo_size	= 128,
308
+		.tx_loadsz	= 128,
309
+		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
310
+		.rxtrig_bytes	= {1, 32, 64, 112},
311
+		.flags		= UART_CAP_FIFO | UART_CAP_SLEEP,
312
+	},
313
+#endif
312314 };
313315 
314316 /* Uart divisor latch read */
....@@ -386,6 +388,7 @@
386388 
387389 #endif
388390 
391
+#ifndef CONFIG_ROCKCHIP_MINI_KERNEL
389392 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
390393 {
391394 	offset = offset << p->regshift;
....@@ -459,6 +462,7 @@
459462 	offset = offset << p->regshift;
460463 	outb(value, p->iobase + offset);
461464 }
465
+#endif
462466 
463467 static int serial8250_default_handle_irq(struct uart_port *port);
464468 
....@@ -469,6 +473,7 @@
469473 	up->dl_read = default_serial_dl_read;
470474 	up->dl_write = default_serial_dl_write;
471475 
476
+#ifndef CONFIG_ROCKCHIP_MINI_KERNEL
472477 	switch (p->iotype) {
473478 	case UPIO_HUB6:
474479 		p->serial_in = hub6_serial_in;
....@@ -509,6 +514,7 @@
509514 		p->serial_out = io_serial_out;
510515 		break;
511516 	}
517
+#endif
512518 	/* Remember loaded iotype */
513519 	up->cur_iotype = p->iotype;
514520 	p->handle_irq = serial8250_default_handle_irq;
....@@ -532,27 +538,6 @@
532538 }
533539 
534540 /*
535
- * For the 16C950
536
- */
537
-static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
538
-{
539
-	serial_out(up, UART_SCR, offset);
540
-	serial_out(up, UART_ICR, value);
541
-}
542
-
543
-static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
544
-{
545
-	unsigned int value;
546
-
547
-	serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
548
-	serial_out(up, UART_SCR, offset);
549
-	value = serial_in(up, UART_ICR);
550
-	serial_icr_write(up, UART_ACR, up->acr);
551
-
552
-	return value;
553
-}
554
-
555
-/*
556541  * FIFO support.
557542  */
558543 static void serial8250_clear_fifos(struct uart_8250_port *p)
....@@ -563,17 +548,6 @@
563548 			       UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
564549 		serial_out(p, UART_FCR, 0);
565550 	}
566
-}
567
-
568
-static inline void serial8250_em485_rts_after_send(struct uart_8250_port *p)
569
-{
570
-	unsigned char mcr = serial8250_in_MCR(p);
571
-
572
-	if (p->port.rs485.flags & SER_RS485_RTS_AFTER_SEND)
573
-		mcr |= UART_MCR_RTS;
574
-	else
575
-		mcr &= ~UART_MCR_RTS;
576
-	serial8250_out_MCR(p, mcr);
577551 }
578552 
579553 static enum hrtimer_restart serial8250_em485_handle_start_tx(struct hrtimer *t);
....@@ -623,10 +597,10 @@
623597  *
624598  *	Return 0 - success, -errno - otherwise
625599  */
626
-int serial8250_em485_init(struct uart_8250_port *p)
600
+static int serial8250_em485_init(struct uart_8250_port *p)
627601 {
628602 	if (p->em485)
629
-		return 0;
603
+		goto deassert_rts;
630604 
631605 	p->em485 = kmalloc(sizeof(struct uart_8250_em485), GFP_ATOMIC);
632606 	if (!p->em485)
....@@ -640,11 +614,14 @@
640614 	p->em485->start_tx_timer.function = &serial8250_em485_handle_start_tx;
641615 	p->em485->port = p;
642616 	p->em485->active_timer = NULL;
643
-	serial8250_em485_rts_after_send(p);
617
+	p->em485->tx_stopped = true;
618
+
619
+deassert_rts:
620
+	if (p->em485->tx_stopped)
621
+		p->rs485_stop_tx(p);
644622 
645623 	return 0;
646624 }
647
-EXPORT_SYMBOL_GPL(serial8250_em485_init);
648625 
649626 /**
650627  *	serial8250_em485_destroy() - put uart_8250_port into normal state
....@@ -671,6 +648,41 @@
671648 	p->em485 = NULL;
672649 }
673650 EXPORT_SYMBOL_GPL(serial8250_em485_destroy);
651
+
652
+/**
653
+ * serial8250_em485_config() - generic ->rs485_config() callback
654
+ * @port: uart port
655
+ * @rs485: rs485 settings
656
+ *
657
+ * Generic callback usable by 8250 uart drivers to activate rs485 settings
658
+ * if the uart is incapable of driving RTS as a Transmit Enable signal in
659
+ * hardware, relying on software emulation instead.
660
+ */
661
+int serial8250_em485_config(struct uart_port *port, struct serial_rs485 *rs485)
662
+{
663
+	struct uart_8250_port *up = up_to_u8250p(port);
664
+
665
+	/* pick sane settings if the user hasn't */
666
+	if (!!(rs485->flags & SER_RS485_RTS_ON_SEND) ==
667
+	    !!(rs485->flags & SER_RS485_RTS_AFTER_SEND)) {
668
+		rs485->flags |= SER_RS485_RTS_ON_SEND;
669
+		rs485->flags &= ~SER_RS485_RTS_AFTER_SEND;
670
+	}
671
+
672
+	gpiod_set_value(port->rs485_term_gpio,
673
+			rs485->flags & SER_RS485_TERMINATE_BUS);
674
+
675
+	/*
676
+	 * Both serial8250_em485_init() and serial8250_em485_destroy()
677
+	 * are idempotent.
678
+	 */
679
+	if (rs485->flags & SER_RS485_ENABLED)
680
+		return serial8250_em485_init(up);
681
+
682
+	serial8250_em485_destroy(up);
683
+	return 0;
684
+}
685
+EXPORT_SYMBOL_GPL(serial8250_em485_config);
674686 
675687 /*
676688  * These two wrappers ensure that enable_runtime_pm_tx() can be called more than
....@@ -714,19 +726,8 @@
714726 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
715727 {
716728 	unsigned char lcr = 0, efr = 0;
717
-	/*
718
-	 * Exar UARTs have a SLEEP register that enables or disables
719
-	 * each UART to enter sleep mode separately.  On the XR17V35x the
720
-	 * register is accessible to each UART at the UART_EXAR_SLEEP
721
-	 * offset but the UART channel may only write to the corresponding
722
-	 * bit.
723
-	 */
729
+
724730 	serial8250_rpm_get(p);
725
-	if ((p->port.type == PORT_XR17V35X) ||
726
-	   (p->port.type == PORT_XR17D15X)) {
727
-		serial_out(p, UART_EXAR_SLEEP, sleep ? 0xff : 0);
728
-		goto out;
729
-	}
730731 
731732 	if (p->capabilities & UART_CAP_SLEEP) {
732733 		if (p->capabilities & UART_CAP_EFR) {
....@@ -736,14 +737,14 @@
736737 			serial_out(p, UART_EFR, UART_EFR_ECB);
737738 			serial_out(p, UART_LCR, 0);
738739 		}
739
-		serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
740
+		serial8250_set_IER(p, sleep ? UART_IERX_SLEEP : 0);
740741 		if (p->capabilities & UART_CAP_EFR) {
741742 			serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
742743 			serial_out(p, UART_EFR, efr);
743744 			serial_out(p, UART_LCR, lcr);
744745 		}
745746 	}
746
-out:
747
+
747748 	serial8250_rpm_put(p);
748749 }
749750 
....@@ -1016,26 +1017,8 @@
10161017 	up->port.type = PORT_16550A;
10171018 	up->capabilities |= UART_CAP_FIFO;
10181019 
1019
-	/*
1020
-	 * XR17V35x UARTs have an extra divisor register, DLD
1021
-	 * that gets enabled with when DLAB is set which will
1022
-	 * cause the device to incorrectly match and assign
1023
-	 * port type to PORT_16650.  The EFR for this UART is
1024
-	 * found at offset 0x09. Instead check the Deice ID (DVID)
1025
-	 * register for a 2, 4 or 8 port UART.
1026
-	 */
1027
-	if (up->port.flags & UPF_EXAR_EFR) {
1028
-		status1 = serial_in(up, UART_EXAR_DVID);
1029
-		if (status1 == 0x82 || status1 == 0x84 || status1 == 0x88) {
1030
-			DEBUG_AUTOCONF("Exar XR17V35x ");
1031
-			up->port.type = PORT_XR17V35X;
1032
-			up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
1033
-						UART_CAP_SLEEP;
1034
-
1035
-			return;
1036
-		}
1037
-
1038
-	}
1020
+	if (!IS_ENABLED(CONFIG_SERIAL_8250_16550A_VARIANTS))
1021
+		return;
10391022 
10401023 	/*
10411024 	 * Check for presence of the EFR when DLAB is set.
....@@ -1174,18 +1157,6 @@
11741157 		DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
11751158 	}
11761159 	serial_out(up, UART_IER, iersave);
1177
-
1178
-	/*
1179
-	 * Exar uarts have EFR in a weird location
1180
-	 */
1181
-	if (up->port.flags & UPF_EXAR_EFR) {
1182
-		DEBUG_AUTOCONF("Exar XR17D15x ");
1183
-		up->port.type = PORT_XR17D15X;
1184
-		up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
1185
-				    UART_CAP_SLEEP;
1186
-
1187
-		return;
1188
-	}
11891160 
11901161 	/*
11911162 	 * We distinguish between 16550A and U6 16550A by counting
....@@ -1369,8 +1340,8 @@
13691340 		fintek_8250_probe(up);
13701341 
13711342 	if (up->capabilities != old_capabilities) {
1372
-		pr_warn("%s: detected caps %08x should be %08x\n",
1373
-			port->name, old_capabilities, up->capabilities);
1343
+		dev_warn(port->dev, "detected caps %08x should be %08x\n",
1344
+			 old_capabilities, up->capabilities);
13741345 	}
13751346 out:
13761347 	DEBUG_AUTOCONF("iir=%d ", scratch);
....@@ -1440,14 +1411,26 @@
14401411 
14411412 	up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
14421413 	up->port.read_status_mask &= ~UART_LSR_DR;
1443
-	serial_port_out(port, UART_IER, up->ier);
1414
+	serial8250_set_IER(up, up->ier);
14441415 
14451416 	serial8250_rpm_put(up);
14461417 }
14471418 
1448
-static void __do_stop_tx_rs485(struct uart_8250_port *p)
1419
+/**
1420
+ * serial8250_em485_stop_tx() - generic ->rs485_stop_tx() callback
1421
+ * @p: uart 8250 port
1422
+ *
1423
+ * Generic callback usable by 8250 uart drivers to stop rs485 transmission.
1424
+ */
1425
+void serial8250_em485_stop_tx(struct uart_8250_port *p)
14491426 {
1450
-	serial8250_em485_rts_after_send(p);
1427
+	unsigned char mcr = serial8250_in_MCR(p);
1428
+
1429
+	if (p->port.rs485.flags & SER_RS485_RTS_AFTER_SEND)
1430
+		mcr |= UART_MCR_RTS;
1431
+	else
1432
+		mcr &= ~UART_MCR_RTS;
1433
+	serial8250_out_MCR(p, mcr);
14511434 
14521435 	/*
14531436 	 * Empty the RX FIFO, we are not interested in anything
....@@ -1458,9 +1441,11 @@
14581441 		serial8250_clear_and_reinit_fifos(p);
14591442 
14601443 		p->ier |= UART_IER_RLSI | UART_IER_RDI;
1461
-		serial_port_out(&p->port, UART_IER, p->ier);
1444
+		serial8250_set_IER(p, p->ier);
14621445 	}
14631446 }
1447
+EXPORT_SYMBOL_GPL(serial8250_em485_stop_tx);
1448
+
14641449 static enum hrtimer_restart serial8250_em485_handle_stop_tx(struct hrtimer *t)
14651450 {
14661451 	struct uart_8250_em485 *em485;
....@@ -1473,8 +1458,9 @@
14731458 	serial8250_rpm_get(p);
14741459 	spin_lock_irqsave(&p->port.lock, flags);
14751460 	if (em485->active_timer == &em485->stop_tx_timer) {
1476
-		__do_stop_tx_rs485(p);
1461
+		p->rs485_stop_tx(p);
14771462 		em485->active_timer = NULL;
1463
+		em485->tx_stopped = true;
14781464 	}
14791465 	spin_unlock_irqrestore(&p->port.lock, flags);
14801466 	serial8250_rpm_put(p);
....@@ -1495,7 +1481,7 @@
14951481 	struct uart_8250_em485 *em485 = p->em485;
14961482 
14971483 	/*
1498
-	 * __do_stop_tx_rs485 is going to set RTS according to config
1484
+	 * rs485_stop_tx() is going to set RTS according to config
14991485 	 * AND flush RX FIFO if required.
15001486 	 */
15011487 	if (p->port.rs485.delay_rts_after_send > 0) {
....@@ -1503,20 +1489,16 @@
15031489 		start_hrtimer_ms(&em485->stop_tx_timer,
15041490 				   p->port.rs485.delay_rts_after_send);
15051491 	} else {
1506
-		__do_stop_tx_rs485(p);
1492
+		p->rs485_stop_tx(p);
1493
+		em485->active_timer = NULL;
1494
+		em485->tx_stopped = true;
15071495 	}
15081496 }
15091497 
15101498 static inline void __do_stop_tx(struct uart_8250_port *p)
15111499 {
1512
-	if (p->ier & UART_IER_THRI) {
1513
-		p->ier &= ~UART_IER_THRI;
1514
-#ifdef CONFIG_ARCH_ROCKCHIP
1515
-		p->ier &= ~UART_IER_PTIME;
1516
-#endif
1517
-		serial_out(p, UART_IER, p->ier);
1500
+	if (serial8250_clear_THRI(p))
15181501 		serial8250_rpm_put_tx(p);
1519
-	}
15201502 }
15211503 
15221504 static inline void __stop_tx(struct uart_8250_port *p)
....@@ -1525,6 +1507,8 @@
15251507 
15261508 	if (em485) {
15271509 		unsigned char lsr = serial_in(p, UART_LSR);
1510
+		p->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1511
+
15281512 		/*
15291513 		 * To provide required timeing and allow FIFO transfer,
15301514 		 * __stop_tx_rs485() must be called only when both FIFO and
....@@ -1533,8 +1517,6 @@
15331517 		 */
15341518 		if ((lsr & BOTH_EMPTY) != BOTH_EMPTY)
15351519 			return;
1536
-
1537
-		em485->active_timer = NULL;
15381520 
15391521 		__stop_tx_rs485(p);
15401522 	}
....@@ -1570,13 +1552,7 @@
15701552 		return;
15711553 #endif
15721554 
1573
-	if (!(up->ier & UART_IER_THRI)) {
1574
-		up->ier |= UART_IER_THRI;
1575
-#ifdef CONFIG_ARCH_ROCKCHIP
1576
-		up->ier |= UART_IER_PTIME;
1577
-#endif
1578
-		serial_port_out(port, UART_IER, up->ier);
1579
-
1555
+	if (serial8250_set_THRI(up)) {
15801556 		if (up->bugs & UART_BUG_TXEN) {
15811557 			unsigned char lsr;
15821558 
....@@ -1596,25 +1572,54 @@
15961572 	}
15971573 }
15981574 
1599
-static inline void start_tx_rs485(struct uart_port *port)
1575
+/**
1576
+ * serial8250_em485_start_tx() - generic ->rs485_start_tx() callback
1577
+ * @up: uart 8250 port
1578
+ *
1579
+ * Generic callback usable by 8250 uart drivers to start rs485 transmission.
1580
+ * Assumes that setting the RTS bit in the MCR register means RTS is high.
1581
+ * (Some chips use inverse semantics.)  Further assumes that reception is
1582
+ * stoppable by disabling the UART_IER_RDI interrupt.  (Some chips set the
1583
+ * UART_LSR_DR bit even when UART_IER_RDI is disabled, foiling this approach.)
1584
+ */
1585
+void serial8250_em485_start_tx(struct uart_8250_port *up)
16001586 {
1601
-	struct uart_8250_port *up = up_to_u8250p(port);
1602
-	struct uart_8250_em485 *em485 = up->em485;
1603
-	unsigned char mcr;
1587
+	unsigned char mcr = serial8250_in_MCR(up);
16041588 
16051589 	if (!(up->port.rs485.flags & SER_RS485_RX_DURING_TX))
16061590 		serial8250_stop_rx(&up->port);
16071591 
1592
+	if (up->port.rs485.flags & SER_RS485_RTS_ON_SEND)
1593
+		mcr |= UART_MCR_RTS;
1594
+	else
1595
+		mcr &= ~UART_MCR_RTS;
1596
+	serial8250_out_MCR(up, mcr);
1597
+}
1598
+EXPORT_SYMBOL_GPL(serial8250_em485_start_tx);
1599
+
1600
+static inline void start_tx_rs485(struct uart_port *port)
1601
+{
1602
+	struct uart_8250_port *up = up_to_u8250p(port);
1603
+	struct uart_8250_em485 *em485 = up->em485;
1604
+
1605
+	/*
1606
+	 * While serial8250_em485_handle_stop_tx() is a noop if
1607
+	 * em485->active_timer != &em485->stop_tx_timer, it might happen that
1608
+	 * the timer is still armed and triggers only after the current bunch of
1609
+	 * chars is send and em485->active_timer == &em485->stop_tx_timer again.
1610
+	 * So cancel the timer. There is still a theoretical race condition if
1611
+	 * the timer is already running and only comes around to check for
1612
+	 * em485->active_timer when &em485->stop_tx_timer is armed again.
1613
+	 */
1614
+	if (em485->active_timer == &em485->stop_tx_timer)
1615
+		hrtimer_try_to_cancel(&em485->stop_tx_timer);
1616
+
16081617 	em485->active_timer = NULL;
16091618 
1610
-	mcr = serial8250_in_MCR(up);
1611
-	if (!!(up->port.rs485.flags & SER_RS485_RTS_ON_SEND) !=
1612
-	    !!(mcr & UART_MCR_RTS)) {
1613
-		if (up->port.rs485.flags & SER_RS485_RTS_ON_SEND)
1614
-			mcr |= UART_MCR_RTS;
1615
-		else
1616
-			mcr &= ~UART_MCR_RTS;
1617
-		serial8250_out_MCR(up, mcr);
1619
+	if (em485->tx_stopped) {
1620
+		em485->tx_stopped = false;
1621
+
1622
+		up->rs485_start_tx(up);
16181623 
16191624 		if (up->port.rs485.delay_rts_before_send > 0) {
16201625 			em485->active_timer = &em485->start_tx_timer;
....@@ -1680,8 +1685,10 @@
16801685 	if (up->bugs & UART_BUG_NOMSR)
16811686 		return;
16821687 
1688
+	mctrl_gpio_disable_ms(up->gpios);
1689
+
16831690 	up->ier &= ~UART_IER_MSI;
1684
-	serial_port_out(port, UART_IER, up->ier);
1691
+	serial8250_set_IER(up, up->ier);
16851692 }
16861693 
16871694 static void serial8250_enable_ms(struct uart_port *port)
....@@ -1692,10 +1699,12 @@
16921699 	if (up->bugs & UART_BUG_NOMSR)
16931700 		return;
16941701 
1702
+	mctrl_gpio_enable_ms(up->gpios);
1703
+
16951704 	up->ier |= UART_IER_MSI;
16961705 
16971706 	serial8250_rpm_get(up);
1698
-	serial_port_out(port, UART_IER, up->ier);
1707
+	serial8250_set_IER(up, up->ier);
16991708 	serial8250_rpm_put(up);
17001709 }
17011710 
....@@ -1747,14 +1756,14 @@
17471756 		lsr &= port->read_status_mask;
17481757 
17491758 		if (lsr & UART_LSR_BI) {
1750
-			pr_debug("%s: handling break\n", __func__);
1759
+			dev_dbg(port->dev, "handling break\n");
17511760 			flag = TTY_BREAK;
17521761 		} else if (lsr & UART_LSR_PE)
17531762 			flag = TTY_PARITY;
17541763 		else if (lsr & UART_LSR_FE)
17551764 			flag = TTY_FRAME;
17561765 	}
1757
-	if (uart_handle_sysrq_char(port, ch))
1766
+	if (uart_prepare_sysrq_char(port, ch))
17581767 		return;
17591768 
17601769 	uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
....@@ -1790,9 +1799,7 @@
17901799 	int count;
17911800 
17921801 	if (port->x_char) {
1793
-		serial_out(up, UART_TX, port->x_char);
1794
-		port->icount.tx++;
1795
-		port->x_char = 0;
1802
+		uart_xchar_out(port, UART_TX);
17961803 		return;
17971804 	}
17981805 	if (uart_tx_stopped(port)) {
....@@ -1807,6 +1814,18 @@
18071814 	count = up->tx_loadsz;
18081815 	do {
18091816 		serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1817
+		if (up->bugs & UART_BUG_TXRACE) {
1818
+			/*
1819
+			 * The Aspeed BMC virtual UARTs have a bug where data
1820
+			 * may get stuck in the BMC's Tx FIFO from bursts of
1821
+			 * writes on the APB interface.
1822
+			 *
1823
+			 * Delay back-to-back writes by a read cycle to avoid
1824
+			 * stalling the VUART. Read a register that won't have
1825
+			 * side-effects and discard the result.
1826
+			 */
1827
+			serial_in(up, UART_SCR);
1828
+		}
18101829 		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
18111830 		port->icount.tx++;
18121831 		if (uart_circ_empty(xmit))
....@@ -1868,10 +1887,13 @@
18681887 		return up->dma->rx_dma(up);
18691888 #else
18701889 	switch (iir & 0x3f) {
1890
+	case UART_IIR_RDI:
1891
+		if (!up->dma->rx_running)
1892
+			break;
1893
+		fallthrough;
1894
+	case UART_IIR_RLSI:
18711895 	case UART_IIR_RX_TIMEOUT:
18721896 		serial8250_rx_dma_flush(up);
1873
-		/* fall-through */
1874
-	case UART_IIR_RLSI:
18751897 		return true;
18761898 	}
18771899 	return up->dma->rx_dma(up);
....@@ -1886,7 +1908,9 @@
18861908 	unsigned char status;
18871909 	unsigned long flags;
18881910 	struct uart_8250_port *up = up_to_u8250p(port);
1911
+#ifndef CONFIG_ARCH_ROCKCHIP
18891912 	bool skip_rx = false;
1913
+#endif
18901914 
18911915 	if (iir & UART_IIR_NO_INT)
18921916 		return 0;
....@@ -1895,6 +1919,17 @@
18951919 
18961920 	status = serial_port_in(port, UART_LSR);
18971921 
1922
+#ifdef CONFIG_ARCH_ROCKCHIP
1923
+	if (status & (UART_LSR_DR | UART_LSR_BI)) {
1924
+		int dma_err = -1;
1925
+
1926
+		if (up->dma && up->dma->rxchan)
1927
+			dma_err = handle_rx_dma(up, iir);
1928
+
1929
+		if (!up->dma || dma_err)
1930
+			status = serial8250_rx_chars(up, status);
1931
+	}
1932
+#else
18981933 	/*
18991934 	 * If port is stopped and there are no error conditions in the
19001935 	 * FIFO, then don't drain the FIFO, as this may lead to TTY buffer
....@@ -1909,27 +1944,18 @@
19091944 		skip_rx = true;
19101945 
19111946 	if (status & (UART_LSR_DR | UART_LSR_BI) && !skip_rx) {
1912
-#ifdef CONFIG_ARCH_ROCKCHIP
1913
-		int dma_err = -1;
1914
-
1915
-		if (up->dma && up->dma->rxchan)
1916
-			dma_err = handle_rx_dma(up, iir);
1917
-
1918
-		if (!up->dma || dma_err)
1919
-			status = serial8250_rx_chars(up, status);
1920
-#else
19211947 		if (!up->dma || handle_rx_dma(up, iir))
19221948 			status = serial8250_rx_chars(up, status);
1923
-#endif
19241949 	}
1950
+#endif
19251951 	serial8250_modem_status(up);
19261952 #ifdef CONFIG_ARCH_ROCKCHIP
19271953 	if ((!up->dma || (up->dma && (!up->dma->txchan || up->dma->tx_err))) &&
19281954 	    ((iir & 0xf) == UART_IIR_THRI))
19291955 		serial8250_tx_chars(up);
19301956 #else
1931
-	if ((!up->dma || up->dma->tx_err) && (status & UART_LSR_THRE) &&
1932
-		(up->ier & UART_IER_THRI))
1957
+	if ((!up->dma || (up->dma && up->dma->tx_err)) &&
1958
+	    (status & UART_LSR_THRE))
19331959 		serial8250_tx_chars(up);
19341960 #endif
19351961 
....@@ -1949,7 +1975,7 @@
19491975 			port->name);
19501976 	}
19511977 #endif
1952
-	spin_unlock_irqrestore(&port->lock, flags);
1978
+	uart_unlock_and_check_sysrq(port, flags);
19531979 	return 1;
19541980 }
19551981 EXPORT_SYMBOL_GPL(serial8250_handle_irq);
....@@ -2015,22 +2041,17 @@
20152041 {
20162042 	struct uart_8250_port *up = up_to_u8250p(port);
20172043 	unsigned int status;
2018
-	unsigned int ret;
2044
+	unsigned int val;
20192045 
20202046 	serial8250_rpm_get(up);
20212047 	status = serial8250_modem_status(up);
20222048 	serial8250_rpm_put(up);
20232049 
2024
-	ret = 0;
2025
-	if (status & UART_MSR_DCD)
2026
-		ret |= TIOCM_CAR;
2027
-	if (status & UART_MSR_RI)
2028
-		ret |= TIOCM_RNG;
2029
-	if (status & UART_MSR_DSR)
2030
-		ret |= TIOCM_DSR;
2031
-	if (status & UART_MSR_CTS)
2032
-		ret |= TIOCM_CTS;
2033
-	return ret;
2050
+	val = serial8250_MSR_to_TIOCM(status);
2051
+	if (up->gpios)
2052
+		return mctrl_gpio_get(up->gpios, &val);
2053
+
2054
+	return val;
20342055 }
20352056 EXPORT_SYMBOL_GPL(serial8250_do_get_mctrl);
20362057 
....@@ -2044,18 +2065,9 @@
20442065 void serial8250_do_set_mctrl(struct uart_port *port, unsigned int mctrl)
20452066 {
20462067 	struct uart_8250_port *up = up_to_u8250p(port);
2047
-	unsigned char mcr = 0;
2068
+	unsigned char mcr;
20482069 
2049
-	if (mctrl & TIOCM_RTS)
2050
-		mcr |= UART_MCR_RTS;
2051
-	if (mctrl & TIOCM_DTR)
2052
-		mcr |= UART_MCR_DTR;
2053
-	if (mctrl & TIOCM_OUT1)
2054
-		mcr |= UART_MCR_OUT1;
2055
-	if (mctrl & TIOCM_OUT2)
2056
-		mcr |= UART_MCR_OUT2;
2057
-	if (mctrl & TIOCM_LOOP)
2058
-		mcr |= UART_MCR_LOOP;
2070
+	mcr = serial8250_TIOCM_to_MCR(mctrl);
20592071 
20602072 	mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
20612073 
....@@ -2065,6 +2077,9 @@
20652077 
20662078 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
20672079 {
2080
+	if (port->rs485.flags & SER_RS485_ENABLED)
2081
+		return;
2082
+
20682083 	if (port->set_mctrl)
20692084 		port->set_mctrl(port, mctrl);
20702085 	else
....@@ -2156,14 +2171,7 @@
21562171 	struct uart_8250_port *up = up_to_u8250p(port);
21572172 
21582173 	serial8250_rpm_get(up);
2159
-	/*
2160
-	 *	First save the IER then disable the interrupts
2161
-	 */
2162
-	ier = serial_port_in(port, UART_IER);
2163
-	if (up->capabilities & UART_CAP_UUE)
2164
-		serial_port_out(port, UART_IER, UART_IER_UUE);
2165
-	else
2166
-		serial_port_out(port, UART_IER, 0);
2174
+	ier = serial8250_clear_IER(up);
21672175 
21682176 	wait_for_xmitr(up, BOTH_EMPTY);
21692177 	/*
....@@ -2176,7 +2184,7 @@
21762184 	 *	and restore the IER
21772185 	 */
21782186 	wait_for_xmitr(up, BOTH_EMPTY);
2179
-	serial_port_out(port, UART_IER, ier);
2187
+	serial8250_set_IER(up, ier);
21802188 	serial8250_rpm_put(up);
21812189 }
21822190 
....@@ -2244,20 +2252,6 @@
22442252 	enable_rsa(up);
22452253 #endif
22462254 
2247
-	if (port->type == PORT_XR17V35X) {
2248
-		/*
2249
-		 * First enable access to IER [7:5], ISR [5:4], FCR [5:4],
2250
-		 * MCR [7:5] and MSR [7:0]
2251
-		 */
2252
-		serial_port_out(port, UART_XR_EFR, UART_EFR_ECB);
2253
-
2254
-		/*
2255
-		 * Make sure all interrups are masked until initialization is
2256
-		 * complete and the FIFOs are cleared
2257
-		 */
2258
-		serial_port_out(port, UART_IER, 0);
2259
-	}
2260
-
22612255 	/*
22622256 	 * Clear the FIFO buffers and disable them.
22632257 	 * (they will be reenabled in set_termios())
....@@ -2271,8 +2265,6 @@
22712265 	serial_port_in(port, UART_RX);
22722266 	serial_port_in(port, UART_IIR);
22732267 	serial_port_in(port, UART_MSR);
2274
-	if ((port->type == PORT_XR17V35X) || (port->type == PORT_XR17D15X))
2275
-		serial_port_in(port, UART_EXAR_INT0);
22762268 
22772269 	/*
22782270 	 * At this point, there's no way the LSR could still be 0xff;
....@@ -2281,7 +2273,7 @@
22812273 	 */
22822274 	if (!(port->flags & UPF_BUGGY_UART) &&
22832275 	    (serial_port_in(port, UART_LSR) == 0xff)) {
2284
-		pr_info_ratelimited("%s: LSR safety check engaged!\n", port->name);
2276
+		dev_info_ratelimited(port->dev, "LSR safety check engaged!\n");
22852277 		retval = -ENODEV;
22862278 		goto out;
22872279 	}
....@@ -2313,8 +2305,7 @@
23132305 	     (port->type == PORT_ALTR_16550_F128)) && (port->fifosize > 1)) {
23142306 		/* Bounds checking of TX threshold (valid 0 to fifosize-2) */
23152307 		if ((up->tx_loadsz < 2) || (up->tx_loadsz > port->fifosize)) {
2316
-			pr_err("%s TX FIFO Threshold errors, skipping\n",
2317
-			       port->name);
2308
+			dev_err(port->dev, "TX FIFO Threshold errors, skipping\n");
23182309 		} else {
23192310 			serial_port_out(port, UART_ALTR_AFR,
23202311 					UART_ALTR_EN_TXFIFO_LW);
....@@ -2418,8 +2409,7 @@
24182409 	if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
24192410 		if (!(up->bugs & UART_BUG_TXEN)) {
24202411 			up->bugs |= UART_BUG_TXEN;
2421
-			pr_debug("%s - enabling bad tx status workarounds\n",
2422
-				 port->name);
2412
+			dev_dbg(port->dev, "enabling bad tx status workarounds\n");
24232413 		}
24242414 	} else {
24252415 		up->bugs &= ~UART_BUG_TXEN;
....@@ -2437,8 +2427,6 @@
24372427 	serial_port_in(port, UART_RX);
24382428 	serial_port_in(port, UART_IIR);
24392429 	serial_port_in(port, UART_MSR);
2440
-	if ((port->type == PORT_XR17V35X) || (port->type == PORT_XR17D15X))
2441
-		serial_port_in(port, UART_EXAR_INT0);
24422430 	up->lsr_saved_flags = 0;
24432431 	up->msr_saved_flags = 0;
24442432 
....@@ -2446,15 +2434,18 @@
24462434 	 * Request DMA channels for both RX and TX.
24472435 	 */
24482436 	if (up->dma) {
2449
-		retval = serial8250_request_dma(up);
2450
-		if (retval) {
2437
+		const char *msg = NULL;
2438
+
2439
+		if (uart_console(port))
2440
+			msg = "forbid DMA for kernel console";
2441
+		else if (serial8250_request_dma(up))
24512442 #ifdef CONFIG_ARCH_ROCKCHIP
2452
-			pr_warn_ratelimited("%s - failed to request DMA, use interrupt mode\n",
2453
-					    port->name);
2443
+			msg = "failed to request DMA, use interrupt mode";
24542444 #else
2455
-			pr_warn_ratelimited("%s - failed to request DMA\n",
2456
-					    port->name);
2445
+			msg = "failed to request DMA";
24572446 #endif
2447
+		if (msg) {
2448
+			dev_warn_ratelimited(port->dev, "%s\n", msg);
24582449 			up->dma = NULL;
24592450 		}
24602451 	}
....@@ -2500,7 +2491,7 @@
25002491 	 */
25012492 	spin_lock_irqsave(&port->lock, flags);
25022493 	up->ier = 0;
2503
-	serial_port_out(port, UART_IER, 0);
2494
+	serial8250_set_IER(up, 0);
25042495 	spin_unlock_irqrestore(&port->lock, flags);
25052496 
25062497 	synchronize_irq(port->irq);
....@@ -2552,23 +2543,6 @@
25522543 		serial8250_do_shutdown(port);
25532544 }
25542545 
2555
-/*
2556
- * XR17V35x UARTs have an extra fractional divisor register (DLD)
2557
- * Calculate divisor with extra 4-bit fractional portion
2558
- */
2559
-static unsigned int xr17v35x_get_divisor(struct uart_8250_port *up,
2560
-					 unsigned int baud,
2561
-					 unsigned int *frac)
2562
-{
2563
-	struct uart_port *port = &up->port;
2564
-	unsigned int quot_16;
2565
-
2566
-	quot_16 = DIV_ROUND_CLOSEST(port->uartclk, baud);
2567
-	*frac = quot_16 & 0x0f;
2568
-
2569
-	return quot_16 >> 4;
2570
-}
2571
-
25722546 /* Nuvoton NPCM UARTs have a custom divisor calculation */
25732547 static unsigned int npcm_get_divisor(struct uart_8250_port *up,
25742548 		unsigned int baud)
....@@ -2596,8 +2570,6 @@
25962570 	else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
25972571 		 baud == (port->uartclk/8))
25982572 		quot = 0x8002;
2599
-	else if (up->port.type == PORT_XR17V35X)
2600
-		quot = xr17v35x_get_divisor(up, baud, frac);
26012573 	else if (up->port.type == PORT_NPCM)
26022574 		quot = npcm_get_divisor(up, baud);
26032575 	else
....@@ -2699,13 +2671,6 @@
26992671 #ifdef CONFIG_ARCH_ROCKCHIP
27002672 	serial_port_out(port, UART_MCR, up->mcr);
27012673 #endif
2702
-
2703
-	/* XR17V35x UARTs have an extra fractional divisor register (DLD) */
2704
-	if (up->port.type == PORT_XR17V35X) {
2705
-		/* Preserve bits not related to baudrate; DLD[7:4]. */
2706
-		quot_frac |= serial_port_in(port, 0x2) & 0xf0;
2707
-		serial_port_out(port, 0x2, quot_frac);
2708
-	}
27092674 }
27102675 EXPORT_SYMBOL_GPL(serial8250_do_set_divisor);
27112676 
....@@ -2747,6 +2712,62 @@
27472712 	 */
27482713 	return uart_get_baud_rate(port, termios, old, min, max);
27492714 }
2715
+
2716
+/*
2717
+ * Note in order to avoid the tty port mutex deadlock don't use the next method
2718
+ * within the uart port callbacks. Primarily it's supposed to be utilized to
2719
+ * handle a sudden reference clock rate change.
2720
+ */
2721
+void serial8250_update_uartclk(struct uart_port *port, unsigned int uartclk)
2722
+{
2723
+	struct uart_8250_port *up = up_to_u8250p(port);
2724
+	struct tty_port *tport = &port->state->port;
2725
+	unsigned int baud, quot, frac = 0;
2726
+	struct ktermios *termios;
2727
+	struct tty_struct *tty;
2728
+	unsigned long flags;
2729
+
2730
+	tty = tty_port_tty_get(tport);
2731
+	if (!tty) {
2732
+		mutex_lock(&tport->mutex);
2733
+		port->uartclk = uartclk;
2734
+		mutex_unlock(&tport->mutex);
2735
+		return;
2736
+	}
2737
+
2738
+	down_write(&tty->termios_rwsem);
2739
+	mutex_lock(&tport->mutex);
2740
+
2741
+	if (port->uartclk == uartclk)
2742
+		goto out_lock;
2743
+
2744
+	port->uartclk = uartclk;
2745
+
2746
+	if (!tty_port_initialized(tport))
2747
+		goto out_lock;
2748
+
2749
+	termios = &tty->termios;
2750
+
2751
+	baud = serial8250_get_baud_rate(port, termios, NULL);
2752
+	quot = serial8250_get_divisor(port, baud, &frac);
2753
+
2754
+	serial8250_rpm_get(up);
2755
+	spin_lock_irqsave(&port->lock, flags);
2756
+
2757
+	uart_update_timeout(port, termios->c_cflag, baud);
2758
+
2759
+	serial8250_set_divisor(port, baud, quot, frac);
2760
+	serial_port_out(port, UART_LCR, up->lcr);
2761
+
2762
+	spin_unlock_irqrestore(&port->lock, flags);
2763
+	serial8250_rpm_put(up);
2764
+
2765
+out_lock:
2766
+	mutex_unlock(&tport->mutex);
2767
+	up_write(&tty->termios_rwsem);
2768
+	tty_kref_put(tty);
2769
+}
2770
+EXPORT_SYMBOL_GPL(serial8250_update_uartclk);
27502771 
27512772 void
27522773 serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
....@@ -2842,7 +2863,7 @@
28422863 	if (up->capabilities & UART_CAP_RTOIE)
28432864 		up->ier |= UART_IER_RTOIE;
28442865 
2845
-	serial_port_out(port, UART_IER, up->ier);
2866
+	serial8250_set_IER(up, up->ier);
28462867 #endif
28472868 
28482869 	if (up->capabilities & UART_CAP_EFR) {
....@@ -2863,7 +2884,7 @@
28632884 	}
28642885 
28652886 #ifdef CONFIG_ARCH_ROCKCHIP
2866
-	/* Reset uart to make sure it is idle, then set buad rate */
2887
+	/* Reset uart to make sure it is idle, then set baud rate */
28672888 	serial_port_out(port, 0x88 >> 2, 0x7);
28682889 #endif
28692890 
....@@ -2902,7 +2923,7 @@
29022923 	if (up->capabilities & UART_CAP_RTOIE)
29032924 		up->ier |= UART_IER_RTOIE;
29042925 
2905
-	serial_port_out(port, UART_IER, up->ier);
2926
+	serial8250_set_IER(up, up->ier);
29062927 #endif
29072928 
29082929 	spin_unlock_irqrestore(&port->lock, flags);
....@@ -3001,8 +3022,10 @@
30013022 	case UPIO_MEM32BE:
30023023 	case UPIO_MEM16:
30033024 	case UPIO_MEM:
3004
-		if (!port->mapbase)
3025
+		if (!port->mapbase) {
3026
+			ret = -EINVAL;
30053027 			break;
3028
+		}
30063029 
30073030 		if (!request_mem_region(port->mapbase, size, "serial")) {
30083031 			ret = -EBUSY;
....@@ -3010,7 +3033,7 @@
30103033 		}
30113034 
30123035 		if (port->flags & UPF_IOREMAP) {
3013
-			port->membase = ioremap_nocache(port->mapbase, size);
3036
+			port->membase = ioremap(port->mapbase, size);
30143037 			if (!port->membase) {
30153038 				release_mem_region(port->mapbase, size);
30163039 				ret = -ENOMEM;
....@@ -3121,7 +3144,7 @@
31213144 	return rxtrig_bytes;
31223145 }
31233146 
3124
-static ssize_t serial8250_get_attr_rx_trig_bytes(struct device *dev,
3147
+static ssize_t rx_trig_bytes_show(struct device *dev,
31253148 	struct device_attribute *attr, char *buf)
31263149 {
31273150 	struct tty_port *port = dev_get_drvdata(dev);
....@@ -3167,7 +3190,7 @@
31673190 	return ret;
31683191 }
31693192 
3170
-static ssize_t serial8250_set_attr_rx_trig_bytes(struct device *dev,
3193
+static ssize_t rx_trig_bytes_store(struct device *dev,
31713194 	struct device_attribute *attr, const char *buf, size_t count)
31723195 {
31733196 	struct tty_port *port = dev_get_drvdata(dev);
....@@ -3188,18 +3211,16 @@
31883211 	return count;
31893212 }
31903213 
3191
-static DEVICE_ATTR(rx_trig_bytes, S_IRUSR | S_IWUSR | S_IRGRP,
3192
-		   serial8250_get_attr_rx_trig_bytes,
3193
-		   serial8250_set_attr_rx_trig_bytes);
3214
+static DEVICE_ATTR_RW(rx_trig_bytes);
31943215 
31953216 static struct attribute *serial8250_dev_attrs[] = {
31963217 	&dev_attr_rx_trig_bytes.attr,
3197
-	NULL,
3198
-	};
3218
+	NULL
3219
+};
31993220 
32003221 static struct attribute_group serial8250_dev_attr_group = {
32013222 	.attrs = serial8250_dev_attrs,
3202
-	};
3223
+};
32033224 
32043225 static void register_dev_spec_attr_grp(struct uart_8250_port *up)
32053226 {
....@@ -3299,6 +3320,7 @@
32993320 
33003321 	spin_lock_init(&port->lock);
33013322 	port->ops = &serial8250_pops;
3323
+	port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE);
33023324 
33033325 	up->cur_iotype = 0xFF;
33043326 }
....@@ -3333,12 +3355,24 @@
33333355 
33343356 #ifdef CONFIG_SERIAL_8250_CONSOLE
33353357 
3336
-static void serial8250_console_putchar(struct uart_port *port, int ch)
3358
+static void serial8250_console_putchar_locked(struct uart_port *port, int ch)
33373359 {
33383360 	struct uart_8250_port *up = up_to_u8250p(port);
33393361 
33403362 	wait_for_xmitr(up, UART_LSR_THRE);
33413363 	serial_port_out(port, UART_TX, ch);
3364
+}
3365
+
3366
+static void serial8250_console_putchar(struct uart_port *port, int ch)
3367
+{
3368
+	struct uart_8250_port *up = up_to_u8250p(port);
3369
+	unsigned int flags;
3370
+
3371
+	wait_for_xmitr(up, UART_LSR_THRE);
3372
+
3373
+	console_atomic_lock(&flags);
3374
+	serial8250_console_putchar_locked(port, ch);
3375
+	console_atomic_unlock(flags);
33423376 }
33433377 
33443378 /*
....@@ -3359,7 +3393,33 @@
33593393 
33603394 	serial8250_set_divisor(port, baud, quot, frac);
33613395 	serial_port_out(port, UART_LCR, up->lcr);
3362
-	serial8250_out_MCR(up, UART_MCR_DTR | UART_MCR_RTS);
3396
+	serial8250_out_MCR(up, up->mcr | UART_MCR_DTR | UART_MCR_RTS);
3397
+}
3398
+
3399
+void serial8250_console_write_atomic(struct uart_8250_port *up,
3400
+				     const char *s, unsigned int count)
3401
+{
3402
+	struct uart_port *port = &up->port;
3403
+	unsigned int flags;
3404
+	unsigned int ier;
3405
+
3406
+	console_atomic_lock(&flags);
3407
+
3408
+	touch_nmi_watchdog();
3409
+
3410
+	ier = serial8250_clear_IER(up);
3411
+
3412
+	if (atomic_fetch_inc(&up->console_printing)) {
3413
+		uart_console_write(port, "\n", 1,
3414
+				   serial8250_console_putchar_locked);
3415
+	}
3416
+	uart_console_write(port, s, count, serial8250_console_putchar_locked);
3417
+	atomic_dec(&up->console_printing);
3418
+
3419
+	wait_for_xmitr(up, BOTH_EMPTY);
3420
+	serial8250_set_IER(up, ier);
3421
+
3422
+	console_atomic_unlock(flags);
33633423 }
33643424 
33653425 /*
....@@ -3367,35 +3427,23 @@
33673427  *	any possible real use of the port...
33683428  *
33693429  *	The console_lock must be held when we get here.
3430
+ *
3431
+ *	Doing runtime PM is really a bad idea for the kernel console.
3432
+ *	Thus, we assume the function is called when device is powered up.
33703433  */
33713434 void serial8250_console_write(struct uart_8250_port *up, const char *s,
33723435 			      unsigned int count)
33733436 {
3437
+	struct uart_8250_em485 *em485 = up->em485;
33743438 	struct uart_port *port = &up->port;
33753439 	unsigned long flags;
33763440 	unsigned int ier;
3377
-	int locked = 1;
33783441 
33793442 	touch_nmi_watchdog();
33803443 
3381
-	serial8250_rpm_get(up);
3444
+	spin_lock_irqsave(&port->lock, flags);
33823445 
3383
-	if (port->sysrq)
3384
-		locked = 0;
3385
-	else if (oops_in_progress)
3386
-		locked = spin_trylock_irqsave(&port->lock, flags);
3387
-	else
3388
-		spin_lock_irqsave(&port->lock, flags);
3389
-
3390
-	/*
3391
-	 *	First save the IER then disable the interrupts
3392
-	 */
3393
-	ier = serial_port_in(port, UART_IER);
3394
-
3395
-	if (up->capabilities & UART_CAP_UUE)
3396
-		serial_port_out(port, UART_IER, UART_IER_UUE);
3397
-	else
3398
-		serial_port_out(port, UART_IER, 0);
3446
+	ier = serial8250_clear_IER(up);
33993447 
34003448 	/* check scratch reg to see if port powered off during system sleep */
34013449 	if (up->canary && (up->canary != serial_port_in(port, UART_SCR))) {
....@@ -3403,14 +3451,28 @@
34033451 		up->canary = 0;
34043452 	}
34053453 
3454
+	if (em485) {
3455
+		if (em485->tx_stopped)
3456
+			up->rs485_start_tx(up);
3457
+		mdelay(port->rs485.delay_rts_before_send);
3458
+	}
3459
+
3460
+	atomic_inc(&up->console_printing);
34063461 	uart_console_write(port, s, count, serial8250_console_putchar);
3462
+	atomic_dec(&up->console_printing);
34073463 
34083464 	/*
34093465 	 *	Finally, wait for transmitter to become empty
34103466 	 *	and restore the IER
34113467 	 */
34123468 	wait_for_xmitr(up, BOTH_EMPTY);
3413
-	serial_port_out(port, UART_IER, ier);
3469
+
3470
+	if (em485) {
3471
+		mdelay(port->rs485.delay_rts_after_send);
3472
+		if (em485->tx_stopped)
3473
+			up->rs485_stop_tx(up);
3474
+	}
3475
+	serial8250_set_IER(up, ier);
34143476 
34153477 	/*
34163478 	 *	The receive handling will happen properly because the
....@@ -3422,9 +3484,7 @@
34223484 	if (up->msr_saved_flags)
34233485 		serial8250_modem_status(up);
34243486 
3425
-	if (locked)
3426
-		spin_unlock_irqrestore(&port->lock, flags);
3427
-	serial8250_rpm_put(up);
3487
+	spin_unlock_irqrestore(&port->lock, flags);
34283488 }
34293489 
34303490 static unsigned int probe_baud(struct uart_port *port)
....@@ -3444,20 +3504,39 @@
34443504 
34453505 int serial8250_console_setup(struct uart_port *port, char *options, bool probe)
34463506 {
3507
+	struct uart_8250_port *up = up_to_u8250p(port);
34473508 	int baud = 9600;
34483509 	int bits = 8;
34493510 	int parity = 'n';
34503511 	int flow = 'n';
3512
+	int ret;
34513513 
34523514 	if (!port->iobase && !port->membase)
34533515 		return -ENODEV;
3516
+
3517
+	atomic_set(&up->console_printing, 0);
34543518 
34553519 	if (options)
34563520 		uart_parse_options(options, &baud, &parity, &bits, &flow);
34573521 	else if (probe)
34583522 		baud = probe_baud(port);
34593523 
3460
-	return uart_set_options(port, port->cons, baud, parity, bits, flow);
3524
+	ret = uart_set_options(port, port->cons, baud, parity, bits, flow);
3525
+	if (ret)
3526
+		return ret;
3527
+
3528
+	if (port->dev)
3529
+		pm_runtime_get_sync(port->dev);
3530
+
3531
+	return 0;
3532
+}
3533
+
3534
+int serial8250_console_exit(struct uart_port *port)
3535
+{
3536
+	if (port->dev)
3537
+		pm_runtime_put_sync(port->dev);
3538
+
3539
+	return 0;
34613540 }
34623541 
34633542 #endif /* CONFIG_SERIAL_8250_CONSOLE */