.. | .. |
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| 1 | +# SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | # |
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2 | 3 | # SPI driver configuration |
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3 | 4 | # |
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.. | .. |
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58 | 59 | |
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59 | 60 | config SPI_ALTERA |
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60 | 61 | tristate "Altera SPI Controller" |
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| 62 | + select REGMAP_MMIO |
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61 | 63 | help |
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62 | 64 | This is the driver for the Altera SPI Controller. |
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63 | 65 | |
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| 66 | +config SPI_AR934X |
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| 67 | + tristate "Qualcomm Atheros AR934X/QCA95XX SPI controller driver" |
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| 68 | + depends on ATH79 || COMPILE_TEST |
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| 69 | + help |
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| 70 | + This enables support for the SPI controller present on the |
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| 71 | + Qualcomm Atheros AR934X/QCA95XX SoCs. |
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| 72 | + |
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64 | 73 | config SPI_ATH79 |
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65 | 74 | tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver" |
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66 | | - depends on ATH79 && GPIOLIB |
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| 75 | + depends on ATH79 || COMPILE_TEST |
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67 | 76 | select SPI_BITBANG |
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68 | 77 | help |
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69 | 78 | This enables support for the SPI controller present on the |
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.. | .. |
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79 | 88 | config SPI_ATMEL |
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80 | 89 | tristate "Atmel SPI Controller" |
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81 | 90 | depends on ARCH_AT91 || COMPILE_TEST |
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| 91 | + depends on OF |
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82 | 92 | help |
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83 | 93 | This selects a driver for the Atmel SPI Controller, present on |
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84 | 94 | many AT91 ARM chips. |
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| 95 | + |
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| 96 | +config SPI_AT91_USART |
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| 97 | + tristate "Atmel USART Controller SPI driver" |
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| 98 | + depends on (ARCH_AT91 || COMPILE_TEST) |
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| 99 | + depends on MFD_AT91_USART |
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| 100 | + help |
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| 101 | + This selects a driver for the AT91 USART Controller as SPI Master, |
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| 102 | + present on AT91 and SAMA5 SoC series. |
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| 103 | + |
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| 104 | +config SPI_ATMEL_QUADSPI |
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| 105 | + tristate "Atmel Quad SPI Controller" |
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| 106 | + depends on ARCH_AT91 || COMPILE_TEST |
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| 107 | + depends on OF && HAS_IOMEM |
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| 108 | + help |
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| 109 | + This enables support for the Quad SPI controller in master mode. |
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| 110 | + This driver does not support generic SPI. The implementation only |
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| 111 | + supports spi-mem interface. |
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85 | 112 | |
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86 | 113 | config SPI_AU1550 |
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87 | 114 | tristate "Au1550/Au1200/Au1300 SPI Controller" |
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.. | .. |
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102 | 129 | config SPI_BCM2835 |
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103 | 130 | tristate "BCM2835 SPI controller" |
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104 | 131 | depends on GPIOLIB |
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105 | | - depends on ARCH_BCM2835 || COMPILE_TEST |
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| 132 | + depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST |
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106 | 133 | help |
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107 | 134 | This selects a driver for the Broadcom BCM2835 SPI master. |
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108 | 135 | |
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.. | .. |
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113 | 140 | |
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114 | 141 | config SPI_BCM2835AUX |
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115 | 142 | tristate "BCM2835 SPI auxiliary controller" |
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116 | | - depends on (ARCH_BCM2835 && GPIOLIB) || COMPILE_TEST |
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| 143 | + depends on ((ARCH_BCM2835 || ARCH_BRCMSTB) && GPIOLIB) || COMPILE_TEST |
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117 | 144 | help |
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118 | 145 | This selects a driver for the Broadcom BCM2835 SPI aux master. |
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119 | 146 | |
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.. | .. |
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123 | 150 | |
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124 | 151 | config SPI_BCM63XX |
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125 | 152 | tristate "Broadcom BCM63xx SPI controller" |
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126 | | - depends on BCM63XX || COMPILE_TEST |
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| 153 | + depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST |
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127 | 154 | help |
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128 | | - Enable support for the SPI controller on the Broadcom BCM63xx SoCs. |
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| 155 | + Enable support for the SPI controller on the Broadcom BCM63xx SoCs. |
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129 | 156 | |
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130 | 157 | config SPI_BCM63XX_HSSPI |
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131 | 158 | tristate "Broadcom BCM63XX HS SPI controller driver" |
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132 | | - depends on BCM63XX || COMPILE_TEST |
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| 159 | + depends on BCM63XX || BMIPS_GENERIC || ARCH_BCM_63XX || COMPILE_TEST |
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133 | 160 | help |
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134 | 161 | This enables support for the High Speed SPI controller present on |
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135 | 162 | newer Broadcom BCM63XX SoCs. |
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.. | .. |
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142 | 169 | help |
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143 | 170 | Enables support for the Broadcom SPI flash and MSPI controller. |
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144 | 171 | Select this option for any one of BRCMSTB, iProc NSP and NS2 SoCs |
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145 | | - based platforms. This driver works for both SPI master for spi-nor |
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| 172 | + based platforms. This driver works for both SPI master for SPI NOR |
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146 | 173 | flash device as well as MSPI device. |
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147 | 174 | |
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148 | 175 | config SPI_BITBANG |
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.. | .. |
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174 | 201 | This selects the Cadence SPI controller master driver |
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175 | 202 | used by Xilinx Zynq and ZynqMP. |
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176 | 203 | |
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| 204 | +config SPI_CADENCE_QUADSPI |
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| 205 | + tristate "Cadence Quad SPI controller" |
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| 206 | + depends on OF && (ARM || ARM64 || COMPILE_TEST) |
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| 207 | + help |
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| 208 | + Enable support for the Cadence Quad SPI Flash controller. |
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| 209 | + |
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| 210 | + Cadence QSPI is a specialized controller for connecting an SPI |
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| 211 | + Flash over 1/2/4-bit wide bus. Enable this option if you have a |
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| 212 | + device with a Cadence QSPI controller and want to access the |
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| 213 | + Flash as an MTD device. |
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| 214 | + |
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177 | 215 | config SPI_CLPS711X |
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178 | 216 | tristate "CLPS711X host SPI controller" |
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179 | 217 | depends on ARCH_CLPS711X || COMPILE_TEST |
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.. | .. |
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197 | 235 | |
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198 | 236 | config SPI_DESIGNWARE |
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199 | 237 | tristate "DesignWare SPI controller core support" |
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| 238 | + imply SPI_MEM |
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200 | 239 | help |
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201 | 240 | general driver for SPI controller core from DesignWare |
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202 | 241 | |
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| 242 | +if SPI_DESIGNWARE |
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| 243 | + |
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| 244 | +config SPI_DW_DMA |
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| 245 | + bool "DMA support for DW SPI controller" |
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| 246 | + |
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203 | 247 | config SPI_DW_PCI |
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204 | 248 | tristate "PCI interface driver for DW SPI core" |
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205 | | - depends on SPI_DESIGNWARE && PCI |
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206 | | - |
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207 | | -config SPI_DW_MID_DMA |
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208 | | - bool "DMA support for DW SPI controller on Intel MID platform" |
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209 | | - depends on SPI_DW_PCI && DW_DMAC_PCI |
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| 249 | + depends on PCI |
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210 | 250 | |
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211 | 251 | config SPI_DW_MMIO |
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212 | 252 | tristate "Memory-mapped io interface driver for DW SPI core" |
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213 | | - depends on SPI_DESIGNWARE |
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| 253 | + depends on HAS_IOMEM |
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| 254 | + |
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| 255 | +config SPI_DW_BT1 |
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| 256 | + tristate "Baikal-T1 SPI driver for DW SPI core" |
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| 257 | + depends on MIPS_BAIKAL_T1 || COMPILE_TEST |
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| 258 | + select MULTIPLEXER |
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| 259 | + select MUX_MMIO |
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| 260 | + help |
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| 261 | + Baikal-T1 SoC is equipped with three DW APB SSI-based MMIO SPI |
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| 262 | + controllers. Two of them are pretty much normal: with IRQ, DMA, |
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| 263 | + FIFOs of 64 words depth, 4x CSs, but the third one as being a |
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| 264 | + part of the Baikal-T1 System Boot Controller has got a very |
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| 265 | + limited resources: no IRQ, no DMA, only a single native |
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| 266 | + chip-select and Tx/Rx FIFO with just 8 words depth available. |
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| 267 | + The later one is normally connected to an external SPI-nor flash |
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| 268 | + of 128Mb (in general can be of bigger size). |
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| 269 | + |
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| 270 | +config SPI_DW_BT1_DIRMAP |
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| 271 | + bool "Directly mapped Baikal-T1 Boot SPI flash support" |
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| 272 | + depends on SPI_DW_BT1 |
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| 273 | + help |
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| 274 | + Directly mapped SPI flash memory is an interface specific to the |
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| 275 | + Baikal-T1 System Boot Controller. It is a 16MB MMIO region, which |
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| 276 | + can be used to access a peripheral memory device just by |
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| 277 | + reading/writing data from/to it. Note that the system APB bus |
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| 278 | + will stall during each IO from/to the dirmap region until the |
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| 279 | + operation is finished. So try not to use it concurrently with |
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| 280 | + time-critical tasks (like the SPI memory operations implemented |
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| 281 | + in this driver). |
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| 282 | + |
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| 283 | +endif |
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214 | 284 | |
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215 | 285 | config SPI_DLN2 |
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216 | 286 | tristate "Diolan DLN-2 USB SPI adapter" |
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217 | 287 | depends on MFD_DLN2 |
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218 | 288 | help |
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219 | | - If you say yes to this option, support will be included for Diolan |
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220 | | - DLN2, a USB to SPI interface. |
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| 289 | + If you say yes to this option, support will be included for Diolan |
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| 290 | + DLN2, a USB to SPI interface. |
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221 | 291 | |
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222 | | - This driver can also be built as a module. If so, the module |
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223 | | - will be called spi-dln2. |
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| 292 | + This driver can also be built as a module. If so, the module |
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| 293 | + will be called spi-dln2. |
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224 | 294 | |
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225 | 295 | config SPI_EFM32 |
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226 | 296 | tristate "EFM32 SPI controller" |
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.. | .. |
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245 | 315 | has only been tested with m25p80 type chips. The hardware has no |
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246 | 316 | support for other types of SPI peripherals. |
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247 | 317 | |
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| 318 | +config SPI_FSI |
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| 319 | + tristate "FSI SPI driver" |
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| 320 | + depends on FSI |
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| 321 | + help |
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| 322 | + This enables support for the driver for FSI bus attached SPI |
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| 323 | + controllers. |
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| 324 | + |
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248 | 325 | config SPI_FSL_LPSPI |
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249 | 326 | tristate "Freescale i.MX LPSPI controller" |
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250 | 327 | depends on ARCH_MXC || COMPILE_TEST |
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251 | 328 | help |
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252 | 329 | This enables Freescale i.MX LPSPI controllers in master mode. |
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| 330 | + |
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| 331 | +config SPI_FSL_QUADSPI |
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| 332 | + tristate "Freescale QSPI controller" |
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| 333 | + depends on ARCH_MXC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST |
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| 334 | + depends on HAS_IOMEM |
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| 335 | + help |
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| 336 | + This enables support for the Quad SPI controller in master mode. |
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| 337 | + Up to four flash chips can be connected on two buses with two |
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| 338 | + chipselects each. |
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| 339 | + This controller does not support generic SPI messages. It only |
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| 340 | + supports the high-level SPI memory interface. |
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| 341 | + |
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| 342 | +config SPI_HISI_SFC_V3XX |
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| 343 | + tristate "HiSilicon SPI NOR Flash Controller for Hi16XX chipsets" |
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| 344 | + depends on (ARM64 && ACPI) || COMPILE_TEST |
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| 345 | + depends on HAS_IOMEM |
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| 346 | + help |
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| 347 | + This enables support for HiSilicon v3xx SPI NOR flash controller |
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| 348 | + found in hi16xx chipsets. |
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| 349 | + |
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| 350 | +config SPI_NXP_FLEXSPI |
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| 351 | + tristate "NXP Flex SPI controller" |
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| 352 | + depends on ARCH_LAYERSCAPE || HAS_IOMEM |
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| 353 | + help |
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| 354 | + This enables support for the Flex SPI controller in master mode. |
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| 355 | + Up to four slave devices can be connected on two buses with two |
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| 356 | + chipselects each. |
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| 357 | + This controller does not support generic SPI messages and only |
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| 358 | + supports the high-level SPI memory interface. |
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253 | 359 | |
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254 | 360 | config SPI_GPIO |
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255 | 361 | tristate "GPIO-based bitbanging SPI Master" |
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.. | .. |
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279 | 385 | depends on ARCH_MXC || COMPILE_TEST |
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280 | 386 | select SPI_BITBANG |
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281 | 387 | help |
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282 | | - This enables using the Freescale i.MX SPI controllers in master |
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283 | | - mode. |
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| 388 | + This enables support for the Freescale i.MX SPI controllers. |
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284 | 389 | |
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285 | 390 | config SPI_JCORE |
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286 | 391 | tristate "J-Core SPI Master" |
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.. | .. |
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355 | 460 | depends on SOC_VF610 || SOC_LS1021A || ARCH_LAYERSCAPE || M5441x || COMPILE_TEST |
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356 | 461 | help |
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357 | 462 | This enables support for the Freescale DSPI controller in master |
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358 | | - mode. VF610 platform uses the controller. |
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| 463 | + mode. VF610, LS1021A and ColdFire platforms uses the controller. |
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359 | 464 | |
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360 | 465 | config SPI_FSL_ESPI |
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361 | 466 | tristate "Freescale eSPI controller" |
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.. | .. |
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367 | 472 | |
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368 | 473 | config SPI_MESON_SPICC |
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369 | 474 | tristate "Amlogic Meson SPICC controller" |
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| 475 | + depends on COMMON_CLK |
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370 | 476 | depends on ARCH_MESON || COMPILE_TEST |
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371 | 477 | help |
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372 | 478 | This enables master mode support for the SPICC (SPI communication |
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.. | .. |
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389 | 495 | say Y or M here.If you are not sure, say N. |
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390 | 496 | SPI drivers for Mediatek MT65XX and MT81XX series ARM SoCs. |
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391 | 497 | |
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392 | | -config SPI_NUC900 |
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393 | | - tristate "Nuvoton NUC900 series SPI" |
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394 | | - depends on ARCH_W90X900 |
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395 | | - select SPI_BITBANG |
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| 498 | +config SPI_MT7621 |
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| 499 | + tristate "MediaTek MT7621 SPI Controller" |
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| 500 | + depends on RALINK || COMPILE_TEST |
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396 | 501 | help |
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397 | | - SPI driver for Nuvoton NUC900 series ARM SoCs |
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| 502 | + This selects a driver for the MediaTek MT7621 SPI Controller. |
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| 503 | + |
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| 504 | +config SPI_MTK_NOR |
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| 505 | + tristate "MediaTek SPI NOR controller" |
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| 506 | + depends on ARCH_MEDIATEK || COMPILE_TEST |
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| 507 | + help |
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| 508 | + This enables support for SPI NOR controller found on MediaTek |
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| 509 | + ARM SoCs. This is a controller specifically for SPI NOR flash. |
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| 510 | + It can perform generic SPI transfers up to 6 bytes via generic |
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| 511 | + SPI interface as well as several SPI NOR specific instructions |
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| 512 | + via SPI MEM interface. |
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| 513 | + |
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| 514 | +config SPI_NPCM_FIU |
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| 515 | + tristate "Nuvoton NPCM FLASH Interface Unit" |
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| 516 | + depends on ARCH_NPCM || COMPILE_TEST |
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| 517 | + depends on OF && HAS_IOMEM |
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| 518 | + help |
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| 519 | + This enables support for the Flash Interface Unit SPI controller |
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| 520 | + in master mode. |
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| 521 | + This driver does not support generic SPI. The implementation only |
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| 522 | + supports spi-mem interface. |
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| 523 | + |
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| 524 | +config SPI_NPCM_PSPI |
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| 525 | + tristate "Nuvoton NPCM PSPI Controller" |
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| 526 | + depends on ARCH_NPCM || COMPILE_TEST |
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| 527 | + help |
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| 528 | + This driver provides support for Nuvoton NPCM BMC |
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| 529 | + Peripheral SPI controller in master mode. |
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398 | 530 | |
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399 | 531 | config SPI_LANTIQ_SSC |
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400 | 532 | tristate "Lantiq SSC SPI controller" |
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401 | | - depends on LANTIQ || COMPILE_TEST |
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| 533 | + depends on LANTIQ || X86 || COMPILE_TEST |
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402 | 534 | help |
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403 | 535 | This driver supports the Lantiq SSC SPI controller in master |
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404 | 536 | mode. This controller is found on Intel (former Lantiq) SoCs like |
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405 | | - the Danube, Falcon, xRX200, xRX300. |
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| 537 | + the Danube, Falcon, xRX200, xRX300, Lightning Mountain. |
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406 | 538 | |
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407 | 539 | config SPI_OC_TINY |
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408 | 540 | tristate "OpenCores tiny SPI" |
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.. | .. |
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427 | 559 | |
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428 | 560 | config SPI_OMAP24XX |
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429 | 561 | tristate "McSPI driver for OMAP" |
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430 | | - depends on ARCH_OMAP2PLUS || COMPILE_TEST |
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| 562 | + depends on ARCH_OMAP2PLUS || ARCH_K3 || COMPILE_TEST |
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431 | 563 | select SG_SPLIT |
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432 | 564 | help |
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433 | 565 | SPI master controller for OMAP24XX and later Multichannel SPI |
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.. | .. |
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487 | 619 | |
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488 | 620 | config SPI_PXA2XX |
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489 | 621 | tristate "PXA2xx SSP SPI master" |
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490 | | - depends on (ARCH_PXA || ARCH_MMP || PCI || ACPI) |
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| 622 | + depends on ARCH_PXA || ARCH_MMP || PCI || ACPI || COMPILE_TEST |
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491 | 623 | select PXA_SSP if ARCH_PXA || ARCH_MMP |
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492 | 624 | help |
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493 | 625 | This enables using a PXA2xx or Sodaville SSP port as a SPI master |
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494 | 626 | controller. The driver can be configured to use any SSP port and |
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495 | | - additional documentation can be found a Documentation/spi/pxa2xx. |
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| 627 | + additional documentation can be found a Documentation/spi/pxa2xx.rst. |
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496 | 628 | |
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497 | 629 | config SPI_PXA2XX_PCI |
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498 | 630 | def_tristate SPI_PXA2XX && PCI && COMMON_CLK |
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.. | .. |
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518 | 650 | for each spi controller and support to get the controller register |
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519 | 651 | resource by calling mmap. |
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520 | 652 | |
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| 653 | +config SPI_ROCKCHIP_SFC |
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| 654 | + tristate "Rockchip Serial Flash Controller (SFC)" |
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| 655 | + imply ROCKCHIP_MTD_VENDOR_STORAGE |
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| 656 | + depends on ARCH_ROCKCHIP || COMPILE_TEST |
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| 657 | + depends on HAS_IOMEM && HAS_DMA |
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| 658 | + help |
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| 659 | + This enables support for Rockchip serial flash controller. This |
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| 660 | + is a specialized controller used to access SPI flash on some |
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| 661 | + Rockchip SOCs. |
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| 662 | + |
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| 663 | + ROCKCHIP SFC supports DMA and PIO modes. When DMA is not available, |
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| 664 | + the driver automatically falls back to PIO mode. |
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| 665 | + |
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521 | 666 | config SPI_RB4XX |
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522 | 667 | tristate "Mikrotik RB4XX SPI master" |
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523 | 668 | depends on SPI_MASTER && ATH79 |
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524 | 669 | help |
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525 | 670 | SPI controller driver for the Mikrotik RB4xx series boards. |
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| 671 | + |
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| 672 | +config SPI_RPCIF |
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| 673 | + tristate "Renesas RPC-IF SPI driver" |
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| 674 | + depends on RENESAS_RPCIF |
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| 675 | + help |
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| 676 | + SPI driver for Renesas R-Car Gen3 RPC-IF. |
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526 | 677 | |
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527 | 678 | config SPI_RSPI |
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528 | 679 | tristate "Renesas RSPI/QSPI controller" |
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.. | .. |
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530 | 681 | help |
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531 | 682 | SPI driver for Renesas RSPI and QSPI blocks. |
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532 | 683 | |
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| 684 | +config SPI_QCOM_QSPI |
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| 685 | + tristate "QTI QSPI controller" |
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| 686 | + depends on ARCH_QCOM |
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| 687 | + help |
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| 688 | + QSPI(Quad SPI) driver for Qualcomm QSPI controller. |
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| 689 | + |
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533 | 690 | config SPI_QUP |
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534 | 691 | tristate "Qualcomm SPI controller with QUP interface" |
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535 | | - depends on ARCH_QCOM || (ARM && COMPILE_TEST) |
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| 692 | + depends on ARCH_QCOM || COMPILE_TEST |
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536 | 693 | help |
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537 | 694 | Qualcomm Universal Peripheral (QUP) core is an AHB slave that |
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538 | 695 | provides a common data path (an output FIFO and an input FIFO) |
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.. | .. |
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542 | 699 | |
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543 | 700 | This driver can also be built as a module. If so, the module |
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544 | 701 | will be called spi_qup. |
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| 702 | + |
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| 703 | +config SPI_QCOM_GENI |
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| 704 | + tristate "Qualcomm GENI based SPI controller" |
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| 705 | + depends on QCOM_GENI_SE |
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| 706 | + help |
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| 707 | + This driver supports GENI serial engine based SPI controller in |
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| 708 | + master mode on the Qualcomm Technologies Inc.'s SoCs. If you say |
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| 709 | + yes to this option, support will be included for the built-in SPI |
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| 710 | + interface on the Qualcomm Technologies Inc.'s SoCs. |
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| 711 | + |
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| 712 | + This driver can also be built as a module. If so, the module |
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| 713 | + will be called spi-geni-qcom. |
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545 | 714 | |
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546 | 715 | config SPI_S3C24XX |
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547 | 716 | tristate "Samsung S3C24XX series SPI" |
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.. | .. |
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563 | 732 | |
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564 | 733 | config SPI_S3C64XX |
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565 | 734 | tristate "Samsung S3C64XX series type SPI" |
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566 | | - depends on (PLAT_SAMSUNG || ARCH_EXYNOS || COMPILE_TEST) |
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| 735 | + depends on (PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST) |
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567 | 736 | help |
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568 | 737 | SPI driver for Samsung S3C64XX and newer SoCs. |
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569 | 738 | |
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.. | .. |
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599 | 768 | help |
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600 | 769 | SPI driver for SuperH HSPI blocks. |
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601 | 770 | |
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| 771 | +config SPI_SIFIVE |
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| 772 | + tristate "SiFive SPI controller" |
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| 773 | + depends on HAS_IOMEM |
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| 774 | + help |
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| 775 | + This exposes the SPI controller IP from SiFive. |
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| 776 | + |
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602 | 777 | config SPI_SIRF |
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603 | 778 | tristate "CSR SiRFprimaII SPI controller" |
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604 | 779 | depends on SIRF_DMA |
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605 | 780 | select SPI_BITBANG |
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606 | 781 | help |
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607 | 782 | SPI driver for CSR SiRFprimaII SoCs |
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| 783 | + |
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| 784 | +config SPI_SLAVE_MT27XX |
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| 785 | + tristate "MediaTek SPI slave device" |
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| 786 | + depends on ARCH_MEDIATEK || COMPILE_TEST |
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| 787 | + depends on SPI_SLAVE |
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| 788 | + help |
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| 789 | + This selects the MediaTek(R) SPI slave device driver. |
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| 790 | + If you want to use MediaTek(R) SPI slave interface, |
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| 791 | + say Y or M here.If you are not sure, say N. |
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| 792 | + SPI slave drivers for Mediatek MT27XX series ARM SoCs. |
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| 793 | + |
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| 794 | +config SPI_SPRD |
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| 795 | + tristate "Spreadtrum SPI controller" |
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| 796 | + depends on ARCH_SPRD || COMPILE_TEST |
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| 797 | + help |
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| 798 | + SPI driver for Spreadtrum SoCs. |
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608 | 799 | |
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609 | 800 | config SPI_SPRD_ADI |
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610 | 801 | tristate "Spreadtrum ADI controller" |
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.. | .. |
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617 | 808 | tristate "STMicroelectronics STM32 SPI controller" |
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618 | 809 | depends on ARCH_STM32 || COMPILE_TEST |
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619 | 810 | help |
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620 | | - SPI driver for STMicroelectonics STM32 SoCs. |
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| 811 | + SPI driver for STMicroelectronics STM32 SoCs. |
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621 | 812 | |
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622 | 813 | STM32 SPI controller supports DMA and PIO modes. When DMA |
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623 | 814 | is not available, the driver automatically falls back to |
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624 | 815 | PIO mode. |
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| 816 | + |
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| 817 | +config SPI_STM32_QSPI |
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| 818 | + tristate "STMicroelectronics STM32 QUAD SPI controller" |
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| 819 | + depends on ARCH_STM32 || COMPILE_TEST |
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| 820 | + depends on OF |
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| 821 | + help |
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| 822 | + This enables support for the Quad SPI controller in master mode. |
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| 823 | + This driver does not support generic SPI. The implementation only |
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| 824 | + supports spi-mem interface. |
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625 | 825 | |
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626 | 826 | config SPI_ST_SSC4 |
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627 | 827 | tristate "STMicroelectronics SPI SSC-based driver" |
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.. | .. |
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642 | 842 | depends on RESET_CONTROLLER |
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643 | 843 | help |
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644 | 844 | This enables using the SPI controller on the Allwinner A31 SoCs. |
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| 845 | + |
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| 846 | +config SPI_SYNQUACER |
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| 847 | + tristate "Socionext's SynQuacer HighSpeed SPI controller" |
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| 848 | + depends on ARCH_SYNQUACER || COMPILE_TEST |
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| 849 | + help |
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| 850 | + SPI driver for Socionext's High speed SPI controller which provides |
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| 851 | + various operating modes for interfacing to serial peripheral devices |
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| 852 | + that use the de-facto standard SPI protocol. |
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| 853 | + |
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| 854 | + It also supports the new dual-bit and quad-bit SPI protocol. |
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| 855 | + |
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| 856 | +config SPI_MXIC |
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| 857 | + tristate "Macronix MX25F0A SPI controller" |
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| 858 | + depends on SPI_MASTER |
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| 859 | + help |
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| 860 | + This selects the Macronix MX25F0A SPI controller driver. |
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645 | 861 | |
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646 | 862 | config SPI_MXS |
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647 | 863 | tristate "Freescale MXS SPI controller" |
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.. | .. |
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701 | 917 | config SPI_UNIPHIER |
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702 | 918 | tristate "Socionext UniPhier SPI Controller" |
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703 | 919 | depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF |
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| 920 | + depends on HAS_IOMEM |
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704 | 921 | help |
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705 | 922 | This enables a driver for the Socionext UniPhier SoC SCSSI SPI controller. |
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706 | 923 | |
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.. | .. |
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753 | 970 | 16 bit words in SPI mode 0, automatically asserting CS on transfer |
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754 | 971 | start and deasserting on end. |
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755 | 972 | |
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| 973 | +config SPI_ZYNQ_QSPI |
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| 974 | + tristate "Xilinx Zynq QSPI controller" |
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| 975 | + depends on ARCH_ZYNQ || COMPILE_TEST |
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| 976 | + help |
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| 977 | + This enables support for the Zynq Quad SPI controller |
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| 978 | + in master mode. |
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| 979 | + This controller only supports SPI memory interface. |
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| 980 | + |
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756 | 981 | config SPI_ZYNQMP_GQSPI |
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757 | 982 | tristate "Xilinx ZynqMP GQSPI controller" |
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758 | | - depends on SPI_MASTER && HAS_DMA |
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| 983 | + depends on (SPI_MASTER && HAS_DMA) || COMPILE_TEST |
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759 | 984 | help |
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760 | 985 | Enables Xilinx GQSPI controller driver for Zynq UltraScale+ MPSoC. |
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| 986 | + |
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| 987 | +config SPI_AMD |
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| 988 | + tristate "AMD SPI controller" |
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| 989 | + depends on SPI_MASTER || COMPILE_TEST |
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| 990 | + help |
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| 991 | + Enables SPI controller driver for AMD SoC. |
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761 | 992 | |
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762 | 993 | # |
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763 | 994 | # Add new SPI master controllers in alphabetical order above this line |
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764 | 995 | # |
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765 | 996 | |
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| 997 | +comment "SPI Multiplexer support" |
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| 998 | + |
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| 999 | +config SPI_MUX |
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| 1000 | + tristate "SPI multiplexer support" |
---|
| 1001 | + select MULTIPLEXER |
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| 1002 | + help |
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| 1003 | + This adds support for SPI multiplexers. Each SPI mux will be |
---|
| 1004 | + accessible as a SPI controller, the devices behind the mux will appear |
---|
| 1005 | + to be chip selects on this controller. It is still necessary to |
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| 1006 | + select one or more specific mux-controller drivers. |
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| 1007 | + |
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766 | 1008 | # |
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767 | 1009 | # There are lots of SPI device types, with sensors and memory |
---|
768 | 1010 | # being probably the most widely used ones. |
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