add dts config

hc

2023-12-06 08f87f769b595151be1afeff53e144f543faa614

 kernel/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.h
..
..
@@ -37,106 +37,24 @@
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 #include "accel/ipsec.h"
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 #include "fs_cmd.h"
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-#ifdef CONFIG_MLX5_FPGA
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-
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+#ifdef CONFIG_MLX5_FPGA_IPSEC
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+const struct mlx5_accel_ipsec_ops *mlx5_fpga_ipsec_ops(struct mlx5_core_dev *mdev);
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 u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev);
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-unsigned int mlx5_fpga_ipsec_counters_count(struct mlx5_core_dev *mdev);
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-int mlx5_fpga_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
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-				  unsigned int counters_count);
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-
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-void *mlx5_fpga_ipsec_create_sa_ctx(struct mlx5_core_dev *mdev,
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-				    struct mlx5_accel_esp_xfrm *accel_xfrm,
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-				    const __be32 saddr[4],
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-				    const __be32 daddr[4],
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-				    const __be32 spi, bool is_ipv6);
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-void mlx5_fpga_ipsec_delete_sa_ctx(void *context);
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-
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-int mlx5_fpga_ipsec_init(struct mlx5_core_dev *mdev);
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-void mlx5_fpga_ipsec_cleanup(struct mlx5_core_dev *mdev);
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-void mlx5_fpga_ipsec_build_fs_cmds(void);
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-
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-struct mlx5_accel_esp_xfrm *
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-mlx5_fpga_esp_create_xfrm(struct mlx5_core_dev *mdev,
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-			  const struct mlx5_accel_esp_xfrm_attrs *attrs,
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-			  u32 flags);
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-void mlx5_fpga_esp_destroy_xfrm(struct mlx5_accel_esp_xfrm *xfrm);
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-int mlx5_fpga_esp_modify_xfrm(struct mlx5_accel_esp_xfrm *xfrm,
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-			      const struct mlx5_accel_esp_xfrm_attrs *attrs);
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-
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 const struct mlx5_flow_cmds *
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 mlx5_fs_cmd_get_default_ipsec_fpga_cmds(enum fs_flow_table_type type);
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-
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+void mlx5_fpga_ipsec_build_fs_cmds(void);
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 #else
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-
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-static inline u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev)
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-{
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-	return 0;
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-}
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-
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-static inline unsigned int
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-mlx5_fpga_ipsec_counters_count(struct mlx5_core_dev *mdev)
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-{
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-	return 0;
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-}
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-
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-static inline int mlx5_fpga_ipsec_counters_read(struct mlx5_core_dev *mdev,
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-						u64 *counters)
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-{
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-	return 0;
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-}
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-
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-static inline void *
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-mlx5_fpga_ipsec_create_sa_ctx(struct mlx5_core_dev *mdev,
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-			      struct mlx5_accel_esp_xfrm *accel_xfrm,
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-			      const __be32 saddr[4],
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-			      const __be32 daddr[4],
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-			      const __be32 spi, bool is_ipv6)
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-{
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-	return NULL;
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-}
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-
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-static inline void mlx5_fpga_ipsec_delete_sa_ctx(void *context)
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-{
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-}
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-
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-static inline int mlx5_fpga_ipsec_init(struct mlx5_core_dev *mdev)
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-{
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-	return 0;
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-}
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-
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-static inline void mlx5_fpga_ipsec_cleanup(struct mlx5_core_dev *mdev)
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-{
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-}
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-
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-static inline void mlx5_fpga_ipsec_build_fs_cmds(void)
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-{
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-}
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-
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-static inline struct mlx5_accel_esp_xfrm *
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-mlx5_fpga_esp_create_xfrm(struct mlx5_core_dev *mdev,
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-			  const struct mlx5_accel_esp_xfrm_attrs *attrs,
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-			  u32 flags)
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-{
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-	return ERR_PTR(-EOPNOTSUPP);
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-}
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-
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-static inline void mlx5_fpga_esp_destroy_xfrm(struct mlx5_accel_esp_xfrm *xfrm)
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-{
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-}
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-
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-static inline int
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-mlx5_fpga_esp_modify_xfrm(struct mlx5_accel_esp_xfrm *xfrm,
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-			  const struct mlx5_accel_esp_xfrm_attrs *attrs)
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-{
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-	return -EOPNOTSUPP;
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-}
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-
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+static inline
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+const struct mlx5_accel_ipsec_ops *mlx5_fpga_ipsec_ops(struct mlx5_core_dev *mdev)
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+{ return NULL; }
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+static inline u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev) { return 0; }
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 static inline const struct mlx5_flow_cmds *
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 mlx5_fs_cmd_get_default_ipsec_fpga_cmds(enum fs_flow_table_type type)
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 {
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 	return mlx5_fs_cmd_get_default(type);
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 }
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-#endif /* CONFIG_MLX5_FPGA */
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+static inline void mlx5_fpga_ipsec_build_fs_cmds(void) {};
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-#endif	/* __MLX5_FPGA_SADB_H__ */
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+#endif /* CONFIG_MLX5_FPGA_IPSEC */
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+#endif	/* __MLX5_FPGA_IPSEC_H__ */