add dts config

hc

2023-12-06 08f87f769b595151be1afeff53e144f543faa614

 kernel/drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c
..
..
@@ -36,6 +36,7 @@
36
36
 
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 #include "mlx5_core.h"
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 #include "lib/mlx5.h"
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+#include "lib/eq.h"
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 #include "fpga/core.h"
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 #include "fpga/conn.h"
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42
 
..
..
@@ -80,19 +81,28 @@
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 	}
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 }
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83
 
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-static const char *mlx5_fpga_device_name(u32 device)
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+static const char *mlx5_fpga_name(u32 fpga_id)
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 {
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-	switch (device) {
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-	case MLX5_FPGA_DEVICE_KU040:
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-		return "ku040";
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-	case MLX5_FPGA_DEVICE_KU060:
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-		return "ku060";
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-	case MLX5_FPGA_DEVICE_KU060_2:
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-		return "ku060_2";
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-	case MLX5_FPGA_DEVICE_UNKNOWN:
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-	default:
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-		return "unknown";
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+	static char ret[32];
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+
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+	switch (fpga_id) {
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+	case MLX5_FPGA_NEWTON:
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+		return "Newton";
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+	case MLX5_FPGA_EDISON:
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+		return "Edison";
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+	case MLX5_FPGA_MORSE:
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+		return "Morse";
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+	case MLX5_FPGA_MORSEQ:
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+		return "MorseQ";
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 	}
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+
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+	snprintf(ret, sizeof(ret), "Unknown %d", fpga_id);
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+	return ret;
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+}
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+
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+static int mlx5_is_fpga_lookaside(u32 fpga_id)
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+{
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+	return fpga_id != MLX5_FPGA_NEWTON && fpga_id != MLX5_FPGA_EDISON;
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 }
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107
 
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 static int mlx5_fpga_device_load_check(struct mlx5_fpga_device *fdev)
..
..
@@ -109,8 +119,12 @@
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 	fdev->last_admin_image = query.admin_image;
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 	fdev->last_oper_image = query.oper_image;
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121
 
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-	mlx5_fpga_dbg(fdev, "Status %u; Admin image %u; Oper image %u\n",
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-		      query.status, query.admin_image, query.oper_image);
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+	mlx5_fpga_info(fdev, "Status %u; Admin image %u; Oper image %u\n",
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+		       query.status, query.admin_image, query.oper_image);
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+
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+	/* for FPGA lookaside projects FPGA load status is not important */
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+	if (mlx5_is_fpga_lookaside(MLX5_CAP_FPGA(fdev->mdev, fpga_id)))
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+		return 0;
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128
 
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 	if (query.status != MLX5_FPGA_STATUS_SUCCESS) {
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 		mlx5_fpga_err(fdev, "%s image failed to load; status %u\n",
..
..
@@ -145,30 +159,51 @@
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 	return 0;
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 }
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161
 
162
+static int mlx5_fpga_event(struct mlx5_fpga_device *, unsigned long, void *);
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+
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+static int fpga_err_event(struct notifier_block *nb, unsigned long event, void *eqe)
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+{
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+	struct mlx5_fpga_device *fdev = mlx5_nb_cof(nb, struct mlx5_fpga_device, fpga_err_nb);
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+
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+	return mlx5_fpga_event(fdev, event, eqe);
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+}
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+
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+static int fpga_qp_err_event(struct notifier_block *nb, unsigned long event, void *eqe)
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+{
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+	struct mlx5_fpga_device *fdev = mlx5_nb_cof(nb, struct mlx5_fpga_device, fpga_qp_err_nb);
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+
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+	return mlx5_fpga_event(fdev, event, eqe);
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+}
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+
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 int mlx5_fpga_device_start(struct mlx5_core_dev *mdev)
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 {
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 	struct mlx5_fpga_device *fdev = mdev->fpga;
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 	unsigned int max_num_qps;
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 	unsigned long flags;
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-	u32 fpga_device_id;
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+	u32 fpga_id;
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184
 	int err;
155
185
 
156
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 	if (!fdev)
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 		return 0;
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188
 
159
-	err = mlx5_fpga_device_load_check(fdev);
160
-	if (err)
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-		goto out;
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-
163
189
 	err = mlx5_fpga_caps(fdev->mdev);
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190
 	if (err)
165
191
 		goto out;
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192
 
167
-	fpga_device_id = MLX5_CAP_FPGA(fdev->mdev, fpga_device);
168
-	mlx5_fpga_info(fdev, "%s:%u; %s image, version %u; SBU %06x:%04x version %d\n",
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-		       mlx5_fpga_device_name(fpga_device_id),
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-		       fpga_device_id,
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+	err = mlx5_fpga_device_load_check(fdev);
194
+	if (err)
195
+		goto out;
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+
197
+	fpga_id = MLX5_CAP_FPGA(fdev->mdev, fpga_id);
198
+	mlx5_fpga_info(fdev, "FPGA card %s:%u\n", mlx5_fpga_name(fpga_id), fpga_id);
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+
200
+	/* No QPs if FPGA does not participate in net processing */
201
+	if (mlx5_is_fpga_lookaside(fpga_id))
202
+		goto out;
203
+
204
+	mlx5_fpga_info(fdev, "%s(%d): image, version %u; SBU %06x:%04x version %d\n",
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205
 		       mlx5_fpga_image_name(fdev->last_oper_image),
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+		       fdev->last_oper_image,
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 		       MLX5_CAP_FPGA(fdev->mdev, image_version),
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208
 		       MLX5_CAP_FPGA(fdev->mdev, ieee_vendor_id),
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209
 		       MLX5_CAP_FPGA(fdev->mdev, sandbox_product_id),
..
..
@@ -184,6 +219,11 @@
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 	err = mlx5_core_reserve_gids(mdev, max_num_qps);
185
220
 	if (err)
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221
 		goto out;
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+
223
+	MLX5_NB_INIT(&fdev->fpga_err_nb, fpga_err_event, FPGA_ERROR);
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+	MLX5_NB_INIT(&fdev->fpga_qp_err_nb, fpga_qp_err_event, FPGA_QP_ERROR);
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+	mlx5_eq_notifier_register(fdev->mdev, &fdev->fpga_err_nb);
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+	mlx5_eq_notifier_register(fdev->mdev, &fdev->fpga_qp_err_nb);
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227
 
188
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 	err = mlx5_fpga_conn_device_init(fdev);
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229
 	if (err)
..
..
@@ -201,6 +241,8 @@
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241
 	mlx5_fpga_conn_device_cleanup(fdev);
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242
 
203
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 err_rsvd_gid:
244
+	mlx5_eq_notifier_unregister(fdev->mdev, &fdev->fpga_err_nb);
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+	mlx5_eq_notifier_unregister(fdev->mdev, &fdev->fpga_qp_err_nb);
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 	mlx5_core_unreserve_gids(mdev, max_num_qps);
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247
 out:
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 	spin_lock_irqsave(&fdev->state_lock, flags);
..
..
@@ -240,6 +282,9 @@
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 	if (!fdev)
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 		return;
242
284
 
285
+	if (mlx5_is_fpga_lookaside(MLX5_CAP_FPGA(fdev->mdev, fpga_id)))
286
+		return;
287
+
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 	spin_lock_irqsave(&fdev->state_lock, flags);
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289
 	if (fdev->state != MLX5_FPGA_STATUS_SUCCESS) {
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290
 		spin_unlock_irqrestore(&fdev->state_lock, flags);
..
..
@@ -256,6 +301,9 @@
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 	}
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302
 
258
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 	mlx5_fpga_conn_device_cleanup(fdev);
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+	mlx5_eq_notifier_unregister(fdev->mdev, &fdev->fpga_err_nb);
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+	mlx5_eq_notifier_unregister(fdev->mdev, &fdev->fpga_qp_err_nb);
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+
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 	max_num_qps = MLX5_CAP_FPGA(mdev, shell_caps.max_num_qps);
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 	mlx5_core_unreserve_gids(mdev, max_num_qps);
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 }
..
..
@@ -283,9 +331,10 @@
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331
 	return "Unknown";
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332
 }
285
333
 
286
-void mlx5_fpga_event(struct mlx5_core_dev *mdev, u8 event, void *data)
334
+static int mlx5_fpga_event(struct mlx5_fpga_device *fdev,
335
+			   unsigned long event, void *eqe)
287
336
 {
288
-	struct mlx5_fpga_device *fdev = mdev->fpga;
337
+	void *data = ((struct mlx5_eqe *)eqe)->data.raw;
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338
 	const char *event_name;
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339
 	bool teardown = false;
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 	unsigned long flags;
..
..
@@ -301,9 +350,7 @@
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 		event_name = mlx5_fpga_qp_syndrome_to_string(syndrome);
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 		break;
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352
 	default:
304
-		mlx5_fpga_warn_ratelimited(fdev, "Unexpected event %u\n",
305
-					   event);
306
-		return;
353
+		return NOTIFY_DONE;
307
354
 	}
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355
 
309
356
 	spin_lock_irqsave(&fdev->state_lock, flags);
..
..
@@ -324,4 +371,6 @@
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371
 	 */
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 	if (teardown)
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 		mlx5_trigger_health_work(fdev->mdev);
374
+
375
+	return NOTIFY_OK;
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376
 }