forked from ~ljy/RK356X_SDK_RELEASE

blame | history | patch | commit | commitdiff
hc
2023-12-06 08f87f769b595151be1afeff53e144f543faa614 
 kernel/drivers/net/ethernet/broadcom/tg3.c
....@@ -66,11 +66,6 @@
6666 #include <uapi/linux/net_tstamp.h>
6767 #include <linux/ptp_clock_kernel.h>
6868 
69
-#ifdef CONFIG_SPARC
70
-#include <asm/idprom.h>
71
-#include <asm/prom.h>
72
-#endif
73
-
7469 #define BAR_0	0
7570 #define BAR_2	2
7671 
....@@ -101,11 +96,9 @@
10196 	_tg3_flag_clear(TG3_FLAG_##flag, (tp)->tg3_flags)
10297 
10398 #define DRV_MODULE_NAME		"tg3"
99
+/* DO NOT UPDATE TG3_*_NUM defines */
104100 #define TG3_MAJ_NUM			3
105101 #define TG3_MIN_NUM			137
106
-#define DRV_MODULE_VERSION	\
107
-	__stringify(TG3_MAJ_NUM) "." __stringify(TG3_MIN_NUM)
108
-#define DRV_MODULE_RELDATE	"May 11, 2014"
109102 
110103 #define RESET_KIND_SHUTDOWN	0
111104 #define RESET_KIND_INIT		1
....@@ -227,13 +220,9 @@
227220 #define FIRMWARE_TG3TSO		"tigon/tg3_tso.bin"
228221 #define FIRMWARE_TG3TSO5	"tigon/tg3_tso5.bin"
229222 
230
-static char version[] =
231
-	DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")";
232
-
233223 MODULE_AUTHOR("David S. Miller (davem@redhat.com) and Jeff Garzik (jgarzik@pobox.com)");
234224 MODULE_DESCRIPTION("Broadcom Tigon3 ethernet driver");
235225 MODULE_LICENSE("GPL");
236
-MODULE_VERSION(DRV_MODULE_VERSION);
237226 MODULE_FIRMWARE(FIRMWARE_TG3);
238227 MODULE_FIRMWARE(FIRMWARE_TG3TSO);
239228 MODULE_FIRMWARE(FIRMWARE_TG3TSO5);
....@@ -726,7 +715,7 @@
726715 	case TG3_APE_LOCK_GPIO:
727716 		if (tg3_asic_rev(tp) == ASIC_REV_5761)
728717 			return 0;
729
-		/* else: fall through */
718
+		fallthrough;
730719 	case TG3_APE_LOCK_GRC:
731720 	case TG3_APE_LOCK_MEM:
732721 		if (!tp->pci_fn)
....@@ -787,7 +776,7 @@
787776 	case TG3_APE_LOCK_GPIO:
788777 		if (tg3_asic_rev(tp) == ASIC_REV_5761)
789778 			return;
790
-		/* else: fall through */
779
+		fallthrough;
791780 	case TG3_APE_LOCK_GRC:
792781 	case TG3_APE_LOCK_MEM:
793782 		if (!tp->pci_fn)
....@@ -1078,7 +1067,6 @@
10781067 	struct tg3 *tp = tnapi->tp;
10791068 
10801069 	tw32_mailbox(tnapi->int_mbox, tnapi->last_tag << 24);
1081
-	mmiowb();
10821070 
10831071 	/* When doing tagged status, this work check is unnecessary.
10841072 	 * The last_tag we write above tells the chip which piece of
....@@ -1598,7 +1586,7 @@
15981586 			phydev->dev_flags |= PHY_BRCM_EXT_IBND_RX_ENABLE;
15991587 		if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN))
16001588 			phydev->dev_flags |= PHY_BRCM_EXT_IBND_TX_ENABLE;
1601
-		/* fallthru */
1589
+		fallthrough;
16021590 	case PHY_ID_RTL8211C:
16031591 		phydev->interface = PHY_INTERFACE_MODE_RGMII;
16041592 		break;
....@@ -2122,16 +2110,14 @@
21222110 	case PHY_INTERFACE_MODE_GMII:
21232111 	case PHY_INTERFACE_MODE_RGMII:
21242112 		if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) {
2125
-			phydev->supported &= (PHY_GBIT_FEATURES |
2126
-					      SUPPORTED_Pause |
2127
-					      SUPPORTED_Asym_Pause);
2113
+			phy_set_max_speed(phydev, SPEED_1000);
2114
+			phy_support_asym_pause(phydev);
21282115 			break;
21292116 		}
2130
-		/* fallthru */
2117
+		fallthrough;
21312118 	case PHY_INTERFACE_MODE_MII:
2132
-		phydev->supported &= (PHY_BASIC_FEATURES |
2133
-				      SUPPORTED_Pause |
2134
-				      SUPPORTED_Asym_Pause);
2119
+		phy_set_max_speed(phydev, SPEED_100);
2120
+		phy_support_asym_pause(phydev);
21352121 		break;
21362122 	default:
21372123 		phy_disconnect(mdiobus_get_phy(tp->mdio_bus, tp->phy_addr));
....@@ -2139,8 +2125,6 @@
21392125 	}
21402126 
21412127 	tp->phy_flags |= TG3_PHYFLG_IS_CONNECTED;
2142
-
2143
-	phydev->advertising = phydev->supported;
21442128 
21452129 	phy_attached_info(phydev);
21462130 
....@@ -2161,7 +2145,8 @@
21612145 		phydev->speed = tp->link_config.speed;
21622146 		phydev->duplex = tp->link_config.duplex;
21632147 		phydev->autoneg = tp->link_config.autoneg;
2164
-		phydev->advertising = tp->link_config.advertising;
2148
+		ethtool_convert_legacy_u32_to_link_mode(
2149
+			phydev->advertising, tp->link_config.advertising);
21652150 	}
21662151 
21672152 	phy_start(phydev);
....@@ -4061,8 +4046,9 @@
40614046 		do_low_power = false;
40624047 		if ((tp->phy_flags & TG3_PHYFLG_IS_CONNECTED) &&
40634048 		    !(tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)) {
4049
+			__ETHTOOL_DECLARE_LINK_MODE_MASK(advertising) = { 0, };
40644050 			struct phy_device *phydev;
4065
-			u32 phyid, advertising;
4051
+			u32 phyid;
40664052 
40674053 			phydev = mdiobus_get_phy(tp->mdio_bus, tp->phy_addr);
40684054 
....@@ -4071,25 +4057,33 @@
40714057 			tp->link_config.speed = phydev->speed;
40724058 			tp->link_config.duplex = phydev->duplex;
40734059 			tp->link_config.autoneg = phydev->autoneg;
4074
-			tp->link_config.advertising = phydev->advertising;
4060
+			ethtool_convert_link_mode_to_legacy_u32(
4061
+				&tp->link_config.advertising,
4062
+				phydev->advertising);
40754063 
4076
-			advertising = ADVERTISED_TP |
4077
-				      ADVERTISED_Pause |
4078
-				      ADVERTISED_Autoneg |
4079
-				      ADVERTISED_10baseT_Half;
4064
+			linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT, advertising);
4065
+			linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
4066
+					 advertising);
4067
+			linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
4068
+					 advertising);
4069
+			linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT,
4070
+					 advertising);
40804071 
40814072 			if (tg3_flag(tp, ENABLE_ASF) || device_should_wake) {
4082
-				if (tg3_flag(tp, WOL_SPEED_100MB))
4083
-					advertising |=
4084
-						ADVERTISED_100baseT_Half |
4085
-						ADVERTISED_100baseT_Full |
4086
-						ADVERTISED_10baseT_Full;
4087
-				else
4088
-					advertising |= ADVERTISED_10baseT_Full;
4073
+				if (tg3_flag(tp, WOL_SPEED_100MB)) {
4074
+					linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT,
4075
+							 advertising);
4076
+					linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT,
4077
+							 advertising);
4078
+					linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT,
4079
+							 advertising);
4080
+				} else {
4081
+					linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT,
4082
+							 advertising);
4083
+				}
40894084 			}
40904085 
4091
-			phydev->advertising = advertising;
4092
-
4086
+			linkmode_copy(phydev->advertising, advertising);
40934087 			phy_start_aneg(phydev);
40944088 
40954089 			phyid = phydev->drv->phy_id & phydev->drv->phy_id_mask;
....@@ -4282,7 +4276,7 @@
42824276 	pci_set_power_state(tp->pdev, PCI_D3hot);
42834277 }
42844278 
4285
-static void tg3_aux_stat_to_speed_duplex(struct tg3 *tp, u32 val, u16 *speed, u8 *duplex)
4279
+static void tg3_aux_stat_to_speed_duplex(struct tg3 *tp, u32 val, u32 *speed, u8 *duplex)
42864280 {
42874281 	switch (val & MII_TG3_AUX_STAT_SPDMASK) {
42884282 	case MII_TG3_AUX_STAT_10HALF:
....@@ -4396,7 +4390,7 @@
43964390 				      MII_TG3_DSP_TAP26_RMRXSTO |
43974391 				      MII_TG3_DSP_TAP26_OPCSINPT;
43984392 			tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, val);
4399
-			/* Fall through */
4393
+			fallthrough;
44004394 		case ASIC_REV_5720:
44014395 		case ASIC_REV_5762:
44024396 			if (!tg3_phydsp_read(tp, MII_TG3_DSP_CH34TP2, &val))
....@@ -4544,7 +4538,7 @@
45444538 				tp->link_config.speed = SPEED_1000;
45454539 				break;
45464540 			}
4547
-			/* Fall through */
4541
+			fallthrough;
45484542 		default:
45494543 			goto done;
45504544 		}
....@@ -4786,7 +4780,7 @@
47864780 	bool current_link_up;
47874781 	u32 bmsr, val;
47884782 	u32 lcl_adv, rmt_adv;
4789
-	u16 current_speed;
4783
+	u32 current_speed;
47904784 	u8 current_duplex;
47914785 	int i, err;
47924786 
....@@ -5215,7 +5209,7 @@
52155209 		if (ap->flags & (MR_AN_ENABLE | MR_RESTART_AN))
52165210 			ap->state = ANEG_STATE_AN_ENABLE;
52175211 
5218
-		/* fallthru */
5212
+		fallthrough;
52195213 	case ANEG_STATE_AN_ENABLE:
52205214 		ap->flags &= ~(MR_AN_COMPLETE | MR_PAGE_RX);
52215215 		if (ap->flags & MR_AN_ENABLE) {
....@@ -5245,7 +5239,7 @@
52455239 		ret = ANEG_TIMER_ENAB;
52465240 		ap->state = ANEG_STATE_RESTART;
52475241 
5248
-		/* fallthru */
5242
+		fallthrough;
52495243 	case ANEG_STATE_RESTART:
52505244 		delta = ap->cur_time - ap->link_time;
52515245 		if (delta > ANEG_STATE_SETTLE_TIME)
....@@ -5288,7 +5282,7 @@
52885282 
52895283 		ap->state = ANEG_STATE_ACK_DETECT;
52905284 
5291
-		/* fallthru */
5285
+		fallthrough;
52925286 	case ANEG_STATE_ACK_DETECT:
52935287 		if (ap->ack_match != 0) {
52945288 			if ((ap->rxconfig & ~ANEG_CFG_ACK) ==
....@@ -5718,7 +5712,7 @@
57185712 static int tg3_setup_fiber_phy(struct tg3 *tp, bool force_reset)
57195713 {
57205714 	u32 orig_pause_cfg;
5721
-	u16 orig_active_speed;
5715
+	u32 orig_active_speed;
57225716 	u8 orig_active_duplex;
57235717 	u32 mac_status;
57245718 	bool current_link_up;
....@@ -5822,7 +5816,7 @@
58225816 {
58235817 	int err = 0;
58245818 	u32 bmsr, bmcr;
5825
-	u16 current_speed = SPEED_UNKNOWN;
5819
+	u32 current_speed = SPEED_UNKNOWN;
58265820 	u8 current_duplex = DUPLEX_UNKNOWN;
58275821 	bool current_link_up = false;
58285822 	u32 local_adv, remote_adv, sgsr;
....@@ -6139,10 +6133,16 @@
61396133 }
61406134 
61416135 /* tp->lock must be held */
6142
-static u64 tg3_refclk_read(struct tg3 *tp)
6136
+static u64 tg3_refclk_read(struct tg3 *tp, struct ptp_system_timestamp *sts)
61436137 {
6144
-	u64 stamp = tr32(TG3_EAV_REF_CLCK_LSB);
6145
-	return stamp | (u64)tr32(TG3_EAV_REF_CLCK_MSB) << 32;
6138
+	u64 stamp;
6139
+
6140
+	ptp_read_system_prets(sts);
6141
+	stamp = tr32(TG3_EAV_REF_CLCK_LSB);
6142
+	ptp_read_system_postts(sts);
6143
+	stamp |= (u64)tr32(TG3_EAV_REF_CLCK_MSB) << 32;
6144
+
6145
+	return stamp;
61466146 }
61476147 
61486148 /* tp->lock must be held */
....@@ -6233,13 +6233,14 @@
62336233 	return 0;
62346234 }
62356235 
6236
-static int tg3_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
6236
+static int tg3_ptp_gettimex(struct ptp_clock_info *ptp, struct timespec64 *ts,
6237
+			    struct ptp_system_timestamp *sts)
62376238 {
62386239 	u64 ns;
62396240 	struct tg3 *tp = container_of(ptp, struct tg3, ptp_info);
62406241 
62416242 	tg3_full_lock(tp, 0);
6242
-	ns = tg3_refclk_read(tp);
6243
+	ns = tg3_refclk_read(tp, sts);
62436244 	ns += tp->ptp_adjust;
62446245 	tg3_full_unlock(tp);
62456246 
....@@ -6273,6 +6274,10 @@
62736274 
62746275 	switch (rq->type) {
62756276 	case PTP_CLK_REQ_PEROUT:
6277
+		/* Reject requests with unsupported flags */
6278
+		if (rq->perout.flags)
6279
+			return -EOPNOTSUPP;
6280
+
62766281 		if (rq->perout.index != 0)
62776282 			return -EINVAL;
62786283 
....@@ -6334,7 +6339,7 @@
63346339 	.pps		= 0,
63356340 	.adjfreq	= tg3_ptp_adjfreq,
63366341 	.adjtime	= tg3_ptp_adjtime,
6337
-	.gettime64	= tg3_ptp_gettime,
6342
+	.gettimex64	= tg3_ptp_gettimex,
63386343 	.settime64	= tg3_ptp_settime,
63396344 	.enable		= tg3_ptp_enable,
63406345 };
....@@ -6703,7 +6708,7 @@
67036708 	skb_size = SKB_DATA_ALIGN(data_size + TG3_RX_OFFSET(tp)) +
67046709 		   SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
67056710 	if (skb_size <= PAGE_SIZE) {
6706
-		data = netdev_alloc_frag(skb_size);
6711
+		data = napi_alloc_frag(skb_size);
67076712 		*frag_size = skb_size;
67086713 	} else {
67096714 		data = kmalloc(skb_size, GFP_ATOMIC);
....@@ -6991,7 +6996,6 @@
69916996 			tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG,
69926997 				     tpr->rx_jmb_prod_idx);
69936998 		}
6994
-		mmiowb();
69956999 	} else if (work_mask) {
69967000 		/* rx_std_buffers[] and rx_jmb_buffers[] entries must be
69977001 		 * updated before the producer indices can be updated.
....@@ -7202,8 +7206,6 @@
72027206 			tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG,
72037207 				     dpr->rx_jmb_prod_idx);
72047208 
7205
-		mmiowb();
7206
-
72077209 		if (err)
72087210 			tw32_f(HOSTCC_MODE, tp->coal_now);
72097211 	}
....@@ -7270,7 +7272,6 @@
72707272 						  HOSTCC_MODE_ENABLE |
72717273 						  tnapi->coal_now);
72727274 			}
7273
-			mmiowb();
72747275 			break;
72757276 		}
72767277 	}
....@@ -7638,7 +7639,7 @@
76387639 }
76397640 #endif
76407641 
7641
-static void tg3_tx_timeout(struct net_device *dev)
7642
+static void tg3_tx_timeout(struct net_device *dev, unsigned int txqueue)
76427643 {
76437644 	struct tg3 *tp = netdev_priv(dev);
76447645 
....@@ -7867,8 +7868,8 @@
78677868 static int tg3_tso_bug(struct tg3 *tp, struct tg3_napi *tnapi,
78687869 		       struct netdev_queue *txq, struct sk_buff *skb)
78697870 {
7870
-	struct sk_buff *segs, *nskb;
78717871 	u32 frag_cnt_est = skb_shinfo(skb)->gso_segs * 3;
7872
+	struct sk_buff *segs, *seg, *next;
78727873 
78737874 	/* Estimate the number of fragments in the worst case */
78747875 	if (unlikely(tg3_tx_avail(tnapi) <= frag_cnt_est)) {
....@@ -7891,12 +7892,10 @@
78917892 	if (IS_ERR(segs) || !segs)
78927893 		goto tg3_tso_bug_end;
78937894 
7894
-	do {
7895
-		nskb = segs;
7896
-		segs = segs->next;
7897
-		nskb->next = NULL;
7898
-		tg3_start_xmit(nskb, tp->dev);
7899
-	} while (segs);
7895
+	skb_list_walk_safe(segs, seg, next) {
7896
+		skb_mark_not_on_list(seg);
7897
+		tg3_start_xmit(seg, tp->dev);
7898
+	}
79007899 
79017900 tg3_tso_bug_end:
79027901 	dev_consume_skb_any(skb);
....@@ -8148,10 +8147,9 @@
81488147 			netif_tx_wake_queue(txq);
81498148 	}
81508149 
8151
-	if (!skb->xmit_more || netif_xmit_stopped(txq)) {
8150
+	if (!netdev_xmit_more() || netif_xmit_stopped(txq)) {
81528151 		/* Packets are ready, update Tx producer idx on card. */
81538152 		tw32_tx_mbox(tnapi->prodmbox, entry);
8154
-		mmiowb();
81558153 	}
81568154 
81578155 	return NETDEV_TX_OK;
....@@ -8704,10 +8702,10 @@
87048702 		if (!i && tg3_flag(tp, ENABLE_RSS))
87058703 			continue;
87068704 
8707
-		tnapi->rx_rcb = dma_zalloc_coherent(&tp->pdev->dev,
8708
-						    TG3_RX_RCB_RING_BYTES(tp),
8709
-						    &tnapi->rx_rcb_mapping,
8710
-						    GFP_KERNEL);
8705
+		tnapi->rx_rcb = dma_alloc_coherent(&tp->pdev->dev,
8706
+						   TG3_RX_RCB_RING_BYTES(tp),
8707
+						   &tnapi->rx_rcb_mapping,
8708
+						   GFP_KERNEL);
87118709 		if (!tnapi->rx_rcb)
87128710 			goto err_out;
87138711 	}
....@@ -8760,9 +8758,9 @@
87608758 {
87618759 	int i;
87628760 
8763
-	tp->hw_stats = dma_zalloc_coherent(&tp->pdev->dev,
8764
-					   sizeof(struct tg3_hw_stats),
8765
-					   &tp->stats_mapping, GFP_KERNEL);
8761
+	tp->hw_stats = dma_alloc_coherent(&tp->pdev->dev,
8762
+					  sizeof(struct tg3_hw_stats),
8763
+					  &tp->stats_mapping, GFP_KERNEL);
87668764 	if (!tp->hw_stats)
87678765 		goto err_out;
87688766 
....@@ -8770,10 +8768,10 @@
87708768 		struct tg3_napi *tnapi = &tp->napi[i];
87718769 		struct tg3_hw_status *sblk;
87728770 
8773
-		tnapi->hw_status = dma_zalloc_coherent(&tp->pdev->dev,
8774
-						       TG3_HW_STATUS_SIZE,
8775
-						       &tnapi->status_mapping,
8776
-						       GFP_KERNEL);
8771
+		tnapi->hw_status = dma_alloc_coherent(&tp->pdev->dev,
8772
+						      TG3_HW_STATUS_SIZE,
8773
+						      &tnapi->status_mapping,
8774
+						      GFP_KERNEL);
87778775 		if (!tnapi->hw_status)
87788776 			goto err_out;
87798777 
....@@ -10722,40 +10720,40 @@
1072210720 	switch (limit) {
1072310721 	case 16:
1072410722 		tw32(MAC_RCV_RULE_15,  0); tw32(MAC_RCV_VALUE_15,  0);
10725
-		/* fall through */
10723
+		fallthrough;
1072610724 	case 15:
1072710725 		tw32(MAC_RCV_RULE_14,  0); tw32(MAC_RCV_VALUE_14,  0);
10728
-		/* fall through */
10726
+		fallthrough;
1072910727 	case 14:
1073010728 		tw32(MAC_RCV_RULE_13,  0); tw32(MAC_RCV_VALUE_13,  0);
10731
-		/* fall through */
10729
+		fallthrough;
1073210730 	case 13:
1073310731 		tw32(MAC_RCV_RULE_12,  0); tw32(MAC_RCV_VALUE_12,  0);
10734
-		/* fall through */
10732
+		fallthrough;
1073510733 	case 12:
1073610734 		tw32(MAC_RCV_RULE_11,  0); tw32(MAC_RCV_VALUE_11,  0);
10737
-		/* fall through */
10735
+		fallthrough;
1073810736 	case 11:
1073910737 		tw32(MAC_RCV_RULE_10,  0); tw32(MAC_RCV_VALUE_10,  0);
10740
-		/* fall through */
10738
+		fallthrough;
1074110739 	case 10:
1074210740 		tw32(MAC_RCV_RULE_9,  0); tw32(MAC_RCV_VALUE_9,  0);
10743
-		/* fall through */
10741
+		fallthrough;
1074410742 	case 9:
1074510743 		tw32(MAC_RCV_RULE_8,  0); tw32(MAC_RCV_VALUE_8,  0);
10746
-		/* fall through */
10744
+		fallthrough;
1074710745 	case 8:
1074810746 		tw32(MAC_RCV_RULE_7,  0); tw32(MAC_RCV_VALUE_7,  0);
10749
-		/* fall through */
10747
+		fallthrough;
1075010748 	case 7:
1075110749 		tw32(MAC_RCV_RULE_6,  0); tw32(MAC_RCV_VALUE_6,  0);
10752
-		/* fall through */
10750
+		fallthrough;
1075310751 	case 6:
1075410752 		tw32(MAC_RCV_RULE_5,  0); tw32(MAC_RCV_VALUE_5,  0);
10755
-		/* fall through */
10753
+		fallthrough;
1075610754 	case 5:
1075710755 		tw32(MAC_RCV_RULE_4,  0); tw32(MAC_RCV_VALUE_4,  0);
10758
-		/* fall through */
10756
+		fallthrough;
1075910757 	case 4:
1076010758 		/* tw32(MAC_RCV_RULE_3,  0); tw32(MAC_RCV_VALUE_3,  0); */
1076110759 	case 3:
....@@ -10799,17 +10797,15 @@
1079910797 #ifdef CONFIG_TIGON3_HWMON
1080010798 static void tg3_sd_scan_scratchpad(struct tg3 *tp, struct tg3_ocir *ocir)
1080110799 {
10800
+	u32 off, len = TG3_OCIR_LEN;
1080210801 	int i;
1080310802 
10804
-	for (i = 0; i < TG3_SD_NUM_RECS; i++, ocir++) {
10805
-		u32 off = i * TG3_OCIR_LEN, len = TG3_OCIR_LEN;
10806
-
10803
+	for (i = 0, off = 0; i < TG3_SD_NUM_RECS; i++, ocir++, off += len) {
1080710804 		tg3_ape_scratchpad_read(tp, (u32 *) ocir, off, len);
10808
-		off += len;
1080910805 
1081010806 		if (ocir->signature != TG3_OCIR_SIG_MAGIC ||
1081110807 		    !(ocir->version_flags & TG3_OCIR_FLAG_ACTIVE))
10812
-			memset(ocir, 0, TG3_OCIR_LEN);
10808
+			memset(ocir, 0, len);
1081310809 	}
1081410810 }
1081510811 
....@@ -12322,7 +12318,6 @@
1232212318 	struct tg3 *tp = netdev_priv(dev);
1232312319 
1232412320 	strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
12325
-	strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
1232612321 	strlcpy(info->fw_version, tp->fw_ver, sizeof(info->fw_version));
1232712322 	strlcpy(info->bus_info, pci_name(tp->pdev), sizeof(info->bus_info));
1232812323 }
....@@ -12513,31 +12508,24 @@
1251312508 		tg3_warn_mgmt_link_flap(tp);
1251412509 
1251512510 	if (tg3_flag(tp, USE_PHYLIB)) {
12516
-		u32 newadv;
1251712511 		struct phy_device *phydev;
1251812512 
1251912513 		phydev = mdiobus_get_phy(tp->mdio_bus, tp->phy_addr);
1252012514 
12521
-		if (!(phydev->supported & SUPPORTED_Pause) ||
12522
-		    (!(phydev->supported & SUPPORTED_Asym_Pause) &&
12523
-		     (epause->rx_pause != epause->tx_pause)))
12515
+		if (!phy_validate_pause(phydev, epause))
1252412516 			return -EINVAL;
1252512517 
1252612518 		tp->link_config.flowctrl = 0;
12519
+		phy_set_asym_pause(phydev, epause->rx_pause, epause->tx_pause);
1252712520 		if (epause->rx_pause) {
1252812521 			tp->link_config.flowctrl |= FLOW_CTRL_RX;
1252912522 
1253012523 			if (epause->tx_pause) {
1253112524 				tp->link_config.flowctrl |= FLOW_CTRL_TX;
12532
-				newadv = ADVERTISED_Pause;
12533
-			} else
12534
-				newadv = ADVERTISED_Pause |
12535
-					 ADVERTISED_Asym_Pause;
12525
+			}
1253612526 		} else if (epause->tx_pause) {
1253712527 			tp->link_config.flowctrl |= FLOW_CTRL_TX;
12538
-			newadv = ADVERTISED_Asym_Pause;
12539
-		} else
12540
-			newadv = 0;
12528
+		}
1254112529 
1254212530 		if (epause->autoneg)
1254312531 			tg3_flag_set(tp, PAUSE_AUTONEG);
....@@ -12545,33 +12533,19 @@
1254512533 			tg3_flag_clear(tp, PAUSE_AUTONEG);
1254612534 
1254712535 		if (tp->phy_flags & TG3_PHYFLG_IS_CONNECTED) {
12548
-			u32 oldadv = phydev->advertising &
12549
-				     (ADVERTISED_Pause | ADVERTISED_Asym_Pause);
12550
-			if (oldadv != newadv) {
12551
-				phydev->advertising &=
12552
-					~(ADVERTISED_Pause |
12553
-					  ADVERTISED_Asym_Pause);
12554
-				phydev->advertising |= newadv;
12555
-				if (phydev->autoneg) {
12556
-					/*
12557
-					 * Always renegotiate the link to
12558
-					 * inform our link partner of our
12559
-					 * flow control settings, even if the
12560
-					 * flow control is forced.  Let
12561
-					 * tg3_adjust_link() do the final
12562
-					 * flow control setup.
12563
-					 */
12564
-					return phy_start_aneg(phydev);
12565
-				}
12536
+			if (phydev->autoneg) {
12537
+				/* phy_set_asym_pause() will
12538
+				 * renegotiate the link to inform our
12539
+				 * link partner of our flow control
12540
+				 * settings, even if the flow control
12541
+				 * is forced.  Let tg3_adjust_link()
12542
+				 * do the final flow control setup.
12543
+				 */
12544
+				return 0;
1256612545 			}
1256712546 
1256812547 			if (!epause->autoneg)
1256912548 				tg3_setup_flow_control(tp, 0, 0);
12570
-		} else {
12571
-			tp->link_config.advertising &=
12572
-					~(ADVERTISED_Pause |
12573
-					  ADVERTISED_Asym_Pause);
12574
-			tp->link_config.advertising |= newadv;
1257512549 		}
1257612550 	} else {
1257712551 		int irq_sync = 0;
....@@ -12784,9 +12758,6 @@
1278412758 			    enum ethtool_phys_id_state state)
1278512759 {
1278612760 	struct tg3 *tp = netdev_priv(dev);
12787
-
12788
-	if (!netif_running(tp->dev))
12789
-		return -EAGAIN;
1279012761 
1279112762 	switch (state) {
1279212763 	case ETHTOOL_ID_ACTIVE:
....@@ -14036,7 +14007,7 @@
1403614007 	case SIOCGMIIPHY:
1403714008 		data->phy_id = tp->phy_addr;
1403814009 
14039
-		/* fallthru */
14010
+		fallthrough;
1404014011 	case SIOCGMIIREG: {
1404114012 		u32 mii_regval;
1404214013 
....@@ -14189,6 +14160,11 @@
1418914160 }
1419014161 
1419114162 static const struct ethtool_ops tg3_ethtool_ops = {
14163
+	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
14164
+				     ETHTOOL_COALESCE_MAX_FRAMES |
14165
+				     ETHTOOL_COALESCE_USECS_IRQ |
14166
+				     ETHTOOL_COALESCE_MAX_FRAMES_IRQ |
14167
+				     ETHTOOL_COALESCE_STATS_BLOCK_USECS,
1419214168 	.get_drvinfo		= tg3_get_drvinfo,
1419314169 	.get_regs_len		= tg3_get_regs_len,
1419414170 	.get_regs		= tg3_get_regs,
....@@ -17007,32 +16983,6 @@
1700716983 	return err;
1700816984 }
1700916985 
17010
-#ifdef CONFIG_SPARC
17011
-static int tg3_get_macaddr_sparc(struct tg3 *tp)
17012
-{
17013
-	struct net_device *dev = tp->dev;
17014
-	struct pci_dev *pdev = tp->pdev;
17015
-	struct device_node *dp = pci_device_to_OF_node(pdev);
17016
-	const unsigned char *addr;
17017
-	int len;
17018
-
17019
-	addr = of_get_property(dp, "local-mac-address", &len);
17020
-	if (addr && len == ETH_ALEN) {
17021
-		memcpy(dev->dev_addr, addr, ETH_ALEN);
17022
-		return 0;
17023
-	}
17024
-	return -ENODEV;
17025
-}
17026
-
17027
-static int tg3_get_default_macaddr_sparc(struct tg3 *tp)
17028
-{
17029
-	struct net_device *dev = tp->dev;
17030
-
17031
-	memcpy(dev->dev_addr, idprom->id_ethaddr, ETH_ALEN);
17032
-	return 0;
17033
-}
17034
-#endif
17035
-
1703616986 static int tg3_get_device_address(struct tg3 *tp)
1703716987 {
1703816988 	struct net_device *dev = tp->dev;
....@@ -17040,10 +16990,8 @@
1704016990 	int addr_ok = 0;
1704116991 	int err;
1704216992 
17043
-#ifdef CONFIG_SPARC
17044
-	if (!tg3_get_macaddr_sparc(tp))
16993
+	if (!eth_platform_get_mac_address(&tp->pdev->dev, dev->dev_addr))
1704516994 		return 0;
17046
-#endif
1704716995 
1704816996 	if (tg3_flag(tp, IS_SSB_CORE)) {
1704916997 		err = ssb_gige_get_macaddr(tp->pdev, &dev->dev_addr[0]);
....@@ -17105,13 +17053,8 @@
1710517053 		}
1710617054 	}
1710717055 
17108
-	if (!is_valid_ether_addr(&dev->dev_addr[0])) {
17109
-#ifdef CONFIG_SPARC
17110
-		if (!tg3_get_default_macaddr_sparc(tp))
17111
-			return 0;
17112
-#endif
17056
+	if (!is_valid_ether_addr(&dev->dev_addr[0]))
1711317057 		return -EINVAL;
17114
-	}
1711517058 	return 0;
1711617059 }
1711717060 
....@@ -17202,7 +17145,7 @@
1720217145 				val |= DMA_RWCTRL_WRITE_BNDRY_64_PCIE;
1720317146 				break;
1720417147 			}
17205
-			/* fallthrough */
17148
+			fallthrough;
1720617149 		case 128:
1720717150 		default:
1720817151 			val &= ~DMA_RWCTRL_WRITE_BNDRY_DISAB_PCIE;
....@@ -17217,28 +17160,28 @@
1721717160 					DMA_RWCTRL_WRITE_BNDRY_16);
1721817161 				break;
1721917162 			}
17220
-			/* fallthrough */
17163
+			fallthrough;
1722117164 		case 32:
1722217165 			if (goal == BOUNDARY_SINGLE_CACHELINE) {
1722317166 				val |= (DMA_RWCTRL_READ_BNDRY_32 |
1722417167 					DMA_RWCTRL_WRITE_BNDRY_32);
1722517168 				break;
1722617169 			}
17227
-			/* fallthrough */
17170
+			fallthrough;
1722817171 		case 64:
1722917172 			if (goal == BOUNDARY_SINGLE_CACHELINE) {
1723017173 				val |= (DMA_RWCTRL_READ_BNDRY_64 |
1723117174 					DMA_RWCTRL_WRITE_BNDRY_64);
1723217175 				break;
1723317176 			}
17234
-			/* fallthrough */
17177
+			fallthrough;
1723517178 		case 128:
1723617179 			if (goal == BOUNDARY_SINGLE_CACHELINE) {
1723717180 				val |= (DMA_RWCTRL_READ_BNDRY_128 |
1723817181 					DMA_RWCTRL_WRITE_BNDRY_128);
1723917182 				break;
1724017183 			}
17241
-			/* fallthrough */
17184
+			fallthrough;
1724217185 		case 256:
1724317186 			val |= (DMA_RWCTRL_READ_BNDRY_256 |
1724417187 				DMA_RWCTRL_WRITE_BNDRY_256);
....@@ -17687,8 +17630,6 @@
1768717630 	u64 dma_mask, persist_dma_mask;
1768817631 	netdev_features_t features = 0;
1768917632 
17690
-	printk_once(KERN_INFO "%s\n", version);
17691
-
1769217633 	err = pci_enable_device(pdev);
1769317634 	if (err) {
1769417635 		dev_err(&pdev->dev, "Cannot enable PCI device, aborting\n");
....@@ -18105,8 +18046,7 @@
1810518046 #ifdef CONFIG_PM_SLEEP
1810618047 static int tg3_suspend(struct device *device)
1810718048 {
18108
-	struct pci_dev *pdev = to_pci_dev(device);
18109
-	struct net_device *dev = pci_get_drvdata(pdev);
18049
+	struct net_device *dev = dev_get_drvdata(device);
1811018050 	struct tg3 *tp = netdev_priv(dev);
1811118051 	int err = 0;
1811218052 
....@@ -18162,8 +18102,7 @@
1816218102 
1816318103 static int tg3_resume(struct device *device)
1816418104 {
18165
-	struct pci_dev *pdev = to_pci_dev(device);
18166
-	struct net_device *dev = pci_get_drvdata(pdev);
18105
+	struct net_device *dev = dev_get_drvdata(device);
1816718106 	struct tg3 *tp = netdev_priv(dev);
1816818107 	int err = 0;
1816918108 
....@@ -18207,16 +18146,20 @@
1820718146 	struct net_device *dev = pci_get_drvdata(pdev);
1820818147 	struct tg3 *tp = netdev_priv(dev);
1820918148 
18149
+	tg3_reset_task_cancel(tp);
18150
+
1821018151 	rtnl_lock();
18152
+
1821118153 	netif_device_detach(dev);
1821218154 
1821318155 	if (netif_running(dev))
1821418156 		dev_close(dev);
1821518157 
18216
-	if (system_state == SYSTEM_POWER_OFF)
18217
-		tg3_power_down(tp);
18158
+	tg3_power_down(tp);
1821818159 
1821918160 	rtnl_unlock();
18161
+
18162
+	pci_disable_device(pdev);
1822018163 }
1822118164 
1822218165 /**