~hc/RK356X_SDK_RELEASE.git

..	..	@@ -11,6 +11,7 @@
11	11	#include <linux/ctype.h>
12	12	#include <linux/stringify.h>
13	13	#include <linux/ethtool.h>
	14	+#include <linux/linkmode.h>
14	15	#include <linux/interrupt.h>
15	16	#include <linux/pci.h>
16	17	#include <linux/etherdevice.h>
..	..	@@ -124,7 +125,7 @@
124	125	}
125	126
126	127	reset_coalesce:
127		- if (netif_running(dev)) {
	128	+ if (test_bit(BNXT_STATE_OPEN, &bp->state)) {
128	129	if (update_stats) {
129	130	rc = bnxt_close_nic(bp, true, false);
130	131	if (!rc)
..	..	@@ -137,7 +138,53 @@
137	138	return rc;
138	139	}
139	140
140		-#define BNXT_NUM_STATS 21
	141	+static const char * const bnxt_ring_rx_stats_str[] = {
	142	+ "rx_ucast_packets",
	143	+ "rx_mcast_packets",
	144	+ "rx_bcast_packets",
	145	+ "rx_discards",
	146	+ "rx_errors",
	147	+ "rx_ucast_bytes",
	148	+ "rx_mcast_bytes",
	149	+ "rx_bcast_bytes",
	150	+};
	151	+
	152	+static const char * const bnxt_ring_tx_stats_str[] = {
	153	+ "tx_ucast_packets",
	154	+ "tx_mcast_packets",
	155	+ "tx_bcast_packets",
	156	+ "tx_errors",
	157	+ "tx_discards",
	158	+ "tx_ucast_bytes",
	159	+ "tx_mcast_bytes",
	160	+ "tx_bcast_bytes",
	161	+};
	162	+
	163	+static const char * const bnxt_ring_tpa_stats_str[] = {
	164	+ "tpa_packets",
	165	+ "tpa_bytes",
	166	+ "tpa_events",
	167	+ "tpa_aborts",
	168	+};
	169	+
	170	+static const char * const bnxt_ring_tpa2_stats_str[] = {
	171	+ "rx_tpa_eligible_pkt",
	172	+ "rx_tpa_eligible_bytes",
	173	+ "rx_tpa_pkt",
	174	+ "rx_tpa_bytes",
	175	+ "rx_tpa_errors",
	176	+ "rx_tpa_events",
	177	+};
	178	+
	179	+static const char * const bnxt_rx_sw_stats_str[] = {
	180	+ "rx_l4_csum_errors",
	181	+ "rx_resets",
	182	+ "rx_buf_errors",
	183	+};
	184	+
	185	+static const char * const bnxt_cmn_sw_stats_str[] = {
	186	+ "missed_irqs",
	187	+};
141	188
142	189	#define BNXT_RX_STATS_ENTRY(counter) \
143	190	{ BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
..	..	@@ -147,6 +194,107 @@
147	194
148	195	#define BNXT_RX_STATS_EXT_ENTRY(counter) \
149	196	{ BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) }
	197	+
	198	+#define BNXT_TX_STATS_EXT_ENTRY(counter) \
	199	+ { BNXT_TX_STATS_EXT_OFFSET(counter), __stringify(counter) }
	200	+
	201	+#define BNXT_RX_STATS_EXT_PFC_ENTRY(n) \
	202	+ BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_duration_us), \
	203	+ BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_transitions)
	204	+
	205	+#define BNXT_TX_STATS_EXT_PFC_ENTRY(n) \
	206	+ BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_duration_us), \
	207	+ BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_transitions)
	208	+
	209	+#define BNXT_RX_STATS_EXT_PFC_ENTRIES \
	210	+ BNXT_RX_STATS_EXT_PFC_ENTRY(0), \
	211	+ BNXT_RX_STATS_EXT_PFC_ENTRY(1), \
	212	+ BNXT_RX_STATS_EXT_PFC_ENTRY(2), \
	213	+ BNXT_RX_STATS_EXT_PFC_ENTRY(3), \
	214	+ BNXT_RX_STATS_EXT_PFC_ENTRY(4), \
	215	+ BNXT_RX_STATS_EXT_PFC_ENTRY(5), \
	216	+ BNXT_RX_STATS_EXT_PFC_ENTRY(6), \
	217	+ BNXT_RX_STATS_EXT_PFC_ENTRY(7)
	218	+
	219	+#define BNXT_TX_STATS_EXT_PFC_ENTRIES \
	220	+ BNXT_TX_STATS_EXT_PFC_ENTRY(0), \
	221	+ BNXT_TX_STATS_EXT_PFC_ENTRY(1), \
	222	+ BNXT_TX_STATS_EXT_PFC_ENTRY(2), \
	223	+ BNXT_TX_STATS_EXT_PFC_ENTRY(3), \
	224	+ BNXT_TX_STATS_EXT_PFC_ENTRY(4), \
	225	+ BNXT_TX_STATS_EXT_PFC_ENTRY(5), \
	226	+ BNXT_TX_STATS_EXT_PFC_ENTRY(6), \
	227	+ BNXT_TX_STATS_EXT_PFC_ENTRY(7)
	228	+
	229	+#define BNXT_RX_STATS_EXT_COS_ENTRY(n) \
	230	+ BNXT_RX_STATS_EXT_ENTRY(rx_bytes_cos##n), \
	231	+ BNXT_RX_STATS_EXT_ENTRY(rx_packets_cos##n)
	232	+
	233	+#define BNXT_TX_STATS_EXT_COS_ENTRY(n) \
	234	+ BNXT_TX_STATS_EXT_ENTRY(tx_bytes_cos##n), \
	235	+ BNXT_TX_STATS_EXT_ENTRY(tx_packets_cos##n)
	236	+
	237	+#define BNXT_RX_STATS_EXT_COS_ENTRIES \
	238	+ BNXT_RX_STATS_EXT_COS_ENTRY(0), \
	239	+ BNXT_RX_STATS_EXT_COS_ENTRY(1), \
	240	+ BNXT_RX_STATS_EXT_COS_ENTRY(2), \
	241	+ BNXT_RX_STATS_EXT_COS_ENTRY(3), \
	242	+ BNXT_RX_STATS_EXT_COS_ENTRY(4), \
	243	+ BNXT_RX_STATS_EXT_COS_ENTRY(5), \
	244	+ BNXT_RX_STATS_EXT_COS_ENTRY(6), \
	245	+ BNXT_RX_STATS_EXT_COS_ENTRY(7) \
	246	+
	247	+#define BNXT_TX_STATS_EXT_COS_ENTRIES \
	248	+ BNXT_TX_STATS_EXT_COS_ENTRY(0), \
	249	+ BNXT_TX_STATS_EXT_COS_ENTRY(1), \
	250	+ BNXT_TX_STATS_EXT_COS_ENTRY(2), \
	251	+ BNXT_TX_STATS_EXT_COS_ENTRY(3), \
	252	+ BNXT_TX_STATS_EXT_COS_ENTRY(4), \
	253	+ BNXT_TX_STATS_EXT_COS_ENTRY(5), \
	254	+ BNXT_TX_STATS_EXT_COS_ENTRY(6), \
	255	+ BNXT_TX_STATS_EXT_COS_ENTRY(7) \
	256	+
	257	+#define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(n) \
	258	+ BNXT_RX_STATS_EXT_ENTRY(rx_discard_bytes_cos##n), \
	259	+ BNXT_RX_STATS_EXT_ENTRY(rx_discard_packets_cos##n)
	260	+
	261	+#define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES \
	262	+ BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(0), \
	263	+ BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(1), \
	264	+ BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(2), \
	265	+ BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(3), \
	266	+ BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(4), \
	267	+ BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(5), \
	268	+ BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(6), \
	269	+ BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(7)
	270	+
	271	+#define BNXT_RX_STATS_PRI_ENTRY(counter, n) \
	272	+ { BNXT_RX_STATS_EXT_OFFSET(counter##_cos0), \
	273	+ __stringify(counter##_pri##n) }
	274	+
	275	+#define BNXT_TX_STATS_PRI_ENTRY(counter, n) \
	276	+ { BNXT_TX_STATS_EXT_OFFSET(counter##_cos0), \
	277	+ __stringify(counter##_pri##n) }
	278	+
	279	+#define BNXT_RX_STATS_PRI_ENTRIES(counter) \
	280	+ BNXT_RX_STATS_PRI_ENTRY(counter, 0), \
	281	+ BNXT_RX_STATS_PRI_ENTRY(counter, 1), \
	282	+ BNXT_RX_STATS_PRI_ENTRY(counter, 2), \
	283	+ BNXT_RX_STATS_PRI_ENTRY(counter, 3), \
	284	+ BNXT_RX_STATS_PRI_ENTRY(counter, 4), \
	285	+ BNXT_RX_STATS_PRI_ENTRY(counter, 5), \
	286	+ BNXT_RX_STATS_PRI_ENTRY(counter, 6), \
	287	+ BNXT_RX_STATS_PRI_ENTRY(counter, 7)
	288	+
	289	+#define BNXT_TX_STATS_PRI_ENTRIES(counter) \
	290	+ BNXT_TX_STATS_PRI_ENTRY(counter, 0), \
	291	+ BNXT_TX_STATS_PRI_ENTRY(counter, 1), \
	292	+ BNXT_TX_STATS_PRI_ENTRY(counter, 2), \
	293	+ BNXT_TX_STATS_PRI_ENTRY(counter, 3), \
	294	+ BNXT_TX_STATS_PRI_ENTRY(counter, 4), \
	295	+ BNXT_TX_STATS_PRI_ENTRY(counter, 5), \
	296	+ BNXT_TX_STATS_PRI_ENTRY(counter, 6), \
	297	+ BNXT_TX_STATS_PRI_ENTRY(counter, 7)
150	298
151	299	enum {
152	300	RX_TOTAL_DISCARDS,
..	..	@@ -160,6 +308,11 @@
160	308	{0, "rx_total_discard_pkts"},
161	309	{0, "tx_total_discard_pkts"},
162	310	};
	311	+
	312	+#define NUM_RING_RX_SW_STATS ARRAY_SIZE(bnxt_rx_sw_stats_str)
	313	+#define NUM_RING_CMN_SW_STATS ARRAY_SIZE(bnxt_cmn_sw_stats_str)
	314	+#define NUM_RING_RX_HW_STATS ARRAY_SIZE(bnxt_ring_rx_stats_str)
	315	+#define NUM_RING_TX_HW_STATS ARRAY_SIZE(bnxt_ring_tx_stats_str)
163	316
164	317	static const struct {
165	318	long offset;
..	..	@@ -256,23 +409,99 @@
256	409	BNXT_RX_STATS_EXT_ENTRY(resume_pause_events),
257	410	BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events),
258	411	BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events),
	412	+ BNXT_RX_STATS_EXT_COS_ENTRIES,
	413	+ BNXT_RX_STATS_EXT_PFC_ENTRIES,
	414	+ BNXT_RX_STATS_EXT_ENTRY(rx_bits),
	415	+ BNXT_RX_STATS_EXT_ENTRY(rx_buffer_passed_threshold),
	416	+ BNXT_RX_STATS_EXT_ENTRY(rx_pcs_symbol_err),
	417	+ BNXT_RX_STATS_EXT_ENTRY(rx_corrected_bits),
	418	+ BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES,
	419	+};
	420	+
	421	+static const struct {
	422	+ long offset;
	423	+ char string[ETH_GSTRING_LEN];
	424	+} bnxt_tx_port_stats_ext_arr[] = {
	425	+ BNXT_TX_STATS_EXT_COS_ENTRIES,
	426	+ BNXT_TX_STATS_EXT_PFC_ENTRIES,
	427	+};
	428	+
	429	+static const struct {
	430	+ long base_off;
	431	+ char string[ETH_GSTRING_LEN];
	432	+} bnxt_rx_bytes_pri_arr[] = {
	433	+ BNXT_RX_STATS_PRI_ENTRIES(rx_bytes),
	434	+};
	435	+
	436	+static const struct {
	437	+ long base_off;
	438	+ char string[ETH_GSTRING_LEN];
	439	+} bnxt_rx_pkts_pri_arr[] = {
	440	+ BNXT_RX_STATS_PRI_ENTRIES(rx_packets),
	441	+};
	442	+
	443	+static const struct {
	444	+ long base_off;
	445	+ char string[ETH_GSTRING_LEN];
	446	+} bnxt_tx_bytes_pri_arr[] = {
	447	+ BNXT_TX_STATS_PRI_ENTRIES(tx_bytes),
	448	+};
	449	+
	450	+static const struct {
	451	+ long base_off;
	452	+ char string[ETH_GSTRING_LEN];
	453	+} bnxt_tx_pkts_pri_arr[] = {
	454	+ BNXT_TX_STATS_PRI_ENTRIES(tx_packets),
259	455	};
260	456
261	457	#define BNXT_NUM_SW_FUNC_STATS ARRAY_SIZE(bnxt_sw_func_stats)
262	458	#define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
263		-#define BNXT_NUM_PORT_STATS_EXT ARRAY_SIZE(bnxt_port_stats_ext_arr)
	459	+#define BNXT_NUM_STATS_PRI \
	460	+ (ARRAY_SIZE(bnxt_rx_bytes_pri_arr) + \
	461	+ ARRAY_SIZE(bnxt_rx_pkts_pri_arr) + \
	462	+ ARRAY_SIZE(bnxt_tx_bytes_pri_arr) + \
	463	+ ARRAY_SIZE(bnxt_tx_pkts_pri_arr))
	464	+
	465	+static int bnxt_get_num_tpa_ring_stats(struct bnxt *bp)
	466	+{
	467	+ if (BNXT_SUPPORTS_TPA(bp)) {
	468	+ if (bp->max_tpa_v2) {
	469	+ if (BNXT_CHIP_P5_THOR(bp))
	470	+ return BNXT_NUM_TPA_RING_STATS_P5;
	471	+ return BNXT_NUM_TPA_RING_STATS_P5_SR2;
	472	+ }
	473	+ return BNXT_NUM_TPA_RING_STATS;
	474	+ }
	475	+ return 0;
	476	+}
	477	+
	478	+static int bnxt_get_num_ring_stats(struct bnxt *bp)
	479	+{
	480	+ int rx, tx, cmn;
	481	+
	482	+ rx = NUM_RING_RX_HW_STATS + NUM_RING_RX_SW_STATS +
	483	+ bnxt_get_num_tpa_ring_stats(bp);
	484	+ tx = NUM_RING_TX_HW_STATS;
	485	+ cmn = NUM_RING_CMN_SW_STATS;
	486	+ return rx * bp->rx_nr_rings + tx * bp->tx_nr_rings +
	487	+ cmn * bp->cp_nr_rings;
	488	+}
264	489
265	490	static int bnxt_get_num_stats(struct bnxt *bp)
266	491	{
267		- int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
	492	+ int num_stats = bnxt_get_num_ring_stats(bp);
268	493
269	494	num_stats += BNXT_NUM_SW_FUNC_STATS;
270	495
271	496	if (bp->flags & BNXT_FLAG_PORT_STATS)
272	497	num_stats += BNXT_NUM_PORT_STATS;
273	498
274		- if (bp->flags & BNXT_FLAG_PORT_STATS_EXT)
275		- num_stats += BNXT_NUM_PORT_STATS_EXT;
	499	+ if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
	500	+ num_stats += bp->fw_rx_stats_ext_size +
	501	+ bp->fw_tx_stats_ext_size;
	502	+ if (bp->pri2cos_valid)
	503	+ num_stats += BNXT_NUM_STATS_PRI;
	504	+ }
276	505
277	506	return num_stats;
278	507	}
..	..	@@ -293,52 +522,128 @@
293	522	}
294	523	}
295	524
	525	+static bool is_rx_ring(struct bnxt *bp, int ring_num)
	526	+{
	527	+ return ring_num < bp->rx_nr_rings;
	528	+}
	529	+
	530	+static bool is_tx_ring(struct bnxt *bp, int ring_num)
	531	+{
	532	+ int tx_base = 0;
	533	+
	534	+ if (!(bp->flags & BNXT_FLAG_SHARED_RINGS))
	535	+ tx_base = bp->rx_nr_rings;
	536	+
	537	+ if (ring_num >= tx_base && ring_num < (tx_base + bp->tx_nr_rings))
	538	+ return true;
	539	+ return false;
	540	+}
	541	+
296	542	static void bnxt_get_ethtool_stats(struct net_device *dev,
297	543	struct ethtool_stats stats, u64 buf)
298	544	{
299	545	u32 i, j = 0;
300	546	struct bnxt *bp = netdev_priv(dev);
301		- u32 stat_fields = sizeof(struct ctx_hw_stats) / 8;
	547	+ u32 tpa_stats;
302	548
303		- if (!bp->bnapi)
304		- return;
	549	+ if (!bp->bnapi) {
	550	+ j += bnxt_get_num_ring_stats(bp) + BNXT_NUM_SW_FUNC_STATS;
	551	+ goto skip_ring_stats;
	552	+ }
305	553
306	554	for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++)
307	555	bnxt_sw_func_stats[i].counter = 0;
308	556
	557	+ tpa_stats = bnxt_get_num_tpa_ring_stats(bp);
309	558	for (i = 0; i < bp->cp_nr_rings; i++) {
310	559	struct bnxt_napi *bnapi = bp->bnapi[i];
311	560	struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
312		- __le64 hw_stats = (__le64 )cpr->hw_stats;
	561	+ u64 *sw_stats = cpr->stats.sw_stats;
	562	+ u64 *sw;
313	563	int k;
314	564
315		- for (k = 0; k < stat_fields; j++, k++)
316		- buf[j] = le64_to_cpu(hw_stats[k]);
317		- buf[j++] = cpr->rx_l4_csum_errors;
	565	+ if (is_rx_ring(bp, i)) {
	566	+ for (k = 0; k < NUM_RING_RX_HW_STATS; j++, k++)
	567	+ buf[j] = sw_stats[k];
	568	+ }
	569	+ if (is_tx_ring(bp, i)) {
	570	+ k = NUM_RING_RX_HW_STATS;
	571	+ for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS;
	572	+ j++, k++)
	573	+ buf[j] = sw_stats[k];
	574	+ }
	575	+ if (!tpa_stats \|\| !is_rx_ring(bp, i))
	576	+ goto skip_tpa_ring_stats;
	577	+
	578	+ k = NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS;
	579	+ for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS +
	580	+ tpa_stats; j++, k++)
	581	+ buf[j] = sw_stats[k];
	582	+
	583	+skip_tpa_ring_stats:
	584	+ sw = (u64 *)&cpr->sw_stats.rx;
	585	+ if (is_rx_ring(bp, i)) {
	586	+ for (k = 0; k < NUM_RING_RX_SW_STATS; j++, k++)
	587	+ buf[j] = sw[k];
	588	+ }
	589	+
	590	+ sw = (u64 *)&cpr->sw_stats.cmn;
	591	+ for (k = 0; k < NUM_RING_CMN_SW_STATS; j++, k++)
	592	+ buf[j] = sw[k];
318	593
319	594	bnxt_sw_func_stats[RX_TOTAL_DISCARDS].counter +=
320		- le64_to_cpu(cpr->hw_stats->rx_discard_pkts);
	595	+ BNXT_GET_RING_STATS64(sw_stats, rx_discard_pkts);
321	596	bnxt_sw_func_stats[TX_TOTAL_DISCARDS].counter +=
322		- le64_to_cpu(cpr->hw_stats->tx_discard_pkts);
	597	+ BNXT_GET_RING_STATS64(sw_stats, tx_discard_pkts);
323	598	}
324	599
325	600	for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++, j++)
326	601	buf[j] = bnxt_sw_func_stats[i].counter;
327	602
	603	+skip_ring_stats:
328	604	if (bp->flags & BNXT_FLAG_PORT_STATS) {
329		- __le64 port_stats = (__le64 )bp->hw_rx_port_stats;
	605	+ u64 *port_stats = bp->port_stats.sw_stats;
330	606
331		- for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
332		- buf[j] = le64_to_cpu(*(port_stats +
333		- bnxt_port_stats_arr[i].offset));
334		- }
	607	+ for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++)
	608	+ buf[j] = *(port_stats + bnxt_port_stats_arr[i].offset);
335	609	}
336	610	if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
337		- __le64 port_stats_ext = (__le64 )bp->hw_rx_port_stats_ext;
	611	+ u64 *rx_port_stats_ext = bp->rx_port_stats_ext.sw_stats;
	612	+ u64 *tx_port_stats_ext = bp->tx_port_stats_ext.sw_stats;
338	613
339		- for (i = 0; i < BNXT_NUM_PORT_STATS_EXT; i++, j++) {
340		- buf[j] = le64_to_cpu(*(port_stats_ext +
341		- bnxt_port_stats_ext_arr[i].offset));
	614	+ for (i = 0; i < bp->fw_rx_stats_ext_size; i++, j++) {
	615	+ buf[j] = *(rx_port_stats_ext +
	616	+ bnxt_port_stats_ext_arr[i].offset);
	617	+ }
	618	+ for (i = 0; i < bp->fw_tx_stats_ext_size; i++, j++) {
	619	+ buf[j] = *(tx_port_stats_ext +
	620	+ bnxt_tx_port_stats_ext_arr[i].offset);
	621	+ }
	622	+ if (bp->pri2cos_valid) {
	623	+ for (i = 0; i < 8; i++, j++) {
	624	+ long n = bnxt_rx_bytes_pri_arr[i].base_off +
	625	+ bp->pri2cos_idx[i];
	626	+
	627	+ buf[j] = *(rx_port_stats_ext + n);
	628	+ }
	629	+ for (i = 0; i < 8; i++, j++) {
	630	+ long n = bnxt_rx_pkts_pri_arr[i].base_off +
	631	+ bp->pri2cos_idx[i];
	632	+
	633	+ buf[j] = *(rx_port_stats_ext + n);
	634	+ }
	635	+ for (i = 0; i < 8; i++, j++) {
	636	+ long n = bnxt_tx_bytes_pri_arr[i].base_off +
	637	+ bp->pri2cos_idx[i];
	638	+
	639	+ buf[j] = *(tx_port_stats_ext + n);
	640	+ }
	641	+ for (i = 0; i < 8; i++, j++) {
	642	+ long n = bnxt_tx_pkts_pri_arr[i].base_off +
	643	+ bp->pri2cos_idx[i];
	644	+
	645	+ buf[j] = *(tx_port_stats_ext + n);
	646	+ }
342	647	}
343	648	}
344	649	}
..	..	@@ -346,54 +651,56 @@
346	651	static void bnxt_get_strings(struct net_device dev, u32 stringset, u8 buf)
347	652	{
348	653	struct bnxt *bp = netdev_priv(dev);
349		- u32 i;
	654	+ static const char * const *str;
	655	+ u32 i, j, num_str;
350	656
351	657	switch (stringset) {
352		- /* The number of strings must match BNXT_NUM_STATS defined above. */
353	658	case ETH_SS_STATS:
354	659	for (i = 0; i < bp->cp_nr_rings; i++) {
355		- sprintf(buf, "[%d]: rx_ucast_packets", i);
356		- buf += ETH_GSTRING_LEN;
357		- sprintf(buf, "[%d]: rx_mcast_packets", i);
358		- buf += ETH_GSTRING_LEN;
359		- sprintf(buf, "[%d]: rx_bcast_packets", i);
360		- buf += ETH_GSTRING_LEN;
361		- sprintf(buf, "[%d]: rx_discards", i);
362		- buf += ETH_GSTRING_LEN;
363		- sprintf(buf, "[%d]: rx_drops", i);
364		- buf += ETH_GSTRING_LEN;
365		- sprintf(buf, "[%d]: rx_ucast_bytes", i);
366		- buf += ETH_GSTRING_LEN;
367		- sprintf(buf, "[%d]: rx_mcast_bytes", i);
368		- buf += ETH_GSTRING_LEN;
369		- sprintf(buf, "[%d]: rx_bcast_bytes", i);
370		- buf += ETH_GSTRING_LEN;
371		- sprintf(buf, "[%d]: tx_ucast_packets", i);
372		- buf += ETH_GSTRING_LEN;
373		- sprintf(buf, "[%d]: tx_mcast_packets", i);
374		- buf += ETH_GSTRING_LEN;
375		- sprintf(buf, "[%d]: tx_bcast_packets", i);
376		- buf += ETH_GSTRING_LEN;
377		- sprintf(buf, "[%d]: tx_discards", i);
378		- buf += ETH_GSTRING_LEN;
379		- sprintf(buf, "[%d]: tx_drops", i);
380		- buf += ETH_GSTRING_LEN;
381		- sprintf(buf, "[%d]: tx_ucast_bytes", i);
382		- buf += ETH_GSTRING_LEN;
383		- sprintf(buf, "[%d]: tx_mcast_bytes", i);
384		- buf += ETH_GSTRING_LEN;
385		- sprintf(buf, "[%d]: tx_bcast_bytes", i);
386		- buf += ETH_GSTRING_LEN;
387		- sprintf(buf, "[%d]: tpa_packets", i);
388		- buf += ETH_GSTRING_LEN;
389		- sprintf(buf, "[%d]: tpa_bytes", i);
390		- buf += ETH_GSTRING_LEN;
391		- sprintf(buf, "[%d]: tpa_events", i);
392		- buf += ETH_GSTRING_LEN;
393		- sprintf(buf, "[%d]: tpa_aborts", i);
394		- buf += ETH_GSTRING_LEN;
395		- sprintf(buf, "[%d]: rx_l4_csum_errors", i);
396		- buf += ETH_GSTRING_LEN;
	660	+ if (is_rx_ring(bp, i)) {
	661	+ num_str = NUM_RING_RX_HW_STATS;
	662	+ for (j = 0; j < num_str; j++) {
	663	+ sprintf(buf, "[%d]: %s", i,
	664	+ bnxt_ring_rx_stats_str[j]);
	665	+ buf += ETH_GSTRING_LEN;
	666	+ }
	667	+ }
	668	+ if (is_tx_ring(bp, i)) {
	669	+ num_str = NUM_RING_TX_HW_STATS;
	670	+ for (j = 0; j < num_str; j++) {
	671	+ sprintf(buf, "[%d]: %s", i,
	672	+ bnxt_ring_tx_stats_str[j]);
	673	+ buf += ETH_GSTRING_LEN;
	674	+ }
	675	+ }
	676	+ num_str = bnxt_get_num_tpa_ring_stats(bp);
	677	+ if (!num_str \|\| !is_rx_ring(bp, i))
	678	+ goto skip_tpa_stats;
	679	+
	680	+ if (bp->max_tpa_v2)
	681	+ str = bnxt_ring_tpa2_stats_str;
	682	+ else
	683	+ str = bnxt_ring_tpa_stats_str;
	684	+
	685	+ for (j = 0; j < num_str; j++) {
	686	+ sprintf(buf, "[%d]: %s", i, str[j]);
	687	+ buf += ETH_GSTRING_LEN;
	688	+ }
	689	+skip_tpa_stats:
	690	+ if (is_rx_ring(bp, i)) {
	691	+ num_str = NUM_RING_RX_SW_STATS;
	692	+ for (j = 0; j < num_str; j++) {
	693	+ sprintf(buf, "[%d]: %s", i,
	694	+ bnxt_rx_sw_stats_str[j]);
	695	+ buf += ETH_GSTRING_LEN;
	696	+ }
	697	+ }
	698	+ num_str = NUM_RING_CMN_SW_STATS;
	699	+ for (j = 0; j < num_str; j++) {
	700	+ sprintf(buf, "[%d]: %s", i,
	701	+ bnxt_cmn_sw_stats_str[j]);
	702	+ buf += ETH_GSTRING_LEN;
	703	+ }
397	704	}
398	705	for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) {
399	706	strcpy(buf, bnxt_sw_func_stats[i].string);
..	..	@@ -407,9 +714,36 @@
407	714	}
408	715	}
409	716	if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
410		- for (i = 0; i < BNXT_NUM_PORT_STATS_EXT; i++) {
	717	+ for (i = 0; i < bp->fw_rx_stats_ext_size; i++) {
411	718	strcpy(buf, bnxt_port_stats_ext_arr[i].string);
412	719	buf += ETH_GSTRING_LEN;
	720	+ }
	721	+ for (i = 0; i < bp->fw_tx_stats_ext_size; i++) {
	722	+ strcpy(buf,
	723	+ bnxt_tx_port_stats_ext_arr[i].string);
	724	+ buf += ETH_GSTRING_LEN;
	725	+ }
	726	+ if (bp->pri2cos_valid) {
	727	+ for (i = 0; i < 8; i++) {
	728	+ strcpy(buf,
	729	+ bnxt_rx_bytes_pri_arr[i].string);
	730	+ buf += ETH_GSTRING_LEN;
	731	+ }
	732	+ for (i = 0; i < 8; i++) {
	733	+ strcpy(buf,
	734	+ bnxt_rx_pkts_pri_arr[i].string);
	735	+ buf += ETH_GSTRING_LEN;
	736	+ }
	737	+ for (i = 0; i < 8; i++) {
	738	+ strcpy(buf,
	739	+ bnxt_tx_bytes_pri_arr[i].string);
	740	+ buf += ETH_GSTRING_LEN;
	741	+ }
	742	+ for (i = 0; i < 8; i++) {
	743	+ strcpy(buf,
	744	+ bnxt_tx_pkts_pri_arr[i].string);
	745	+ buf += ETH_GSTRING_LEN;
	746	+ }
413	747	}
414	748	}
415	749	break;
..	..	@@ -468,7 +802,7 @@
468	802	struct bnxt *bp = netdev_priv(dev);
469	803	struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
470	804	int max_rx_rings, max_tx_rings, tcs;
471		- int max_tx_sch_inputs;
	805	+ int max_tx_sch_inputs, tx_grps;
472	806
473	807	/* Get the most up-to-date max_tx_sch_inputs. */
474	808	if (netif_running(dev) && BNXT_NEW_RM(bp))
..	..	@@ -478,6 +812,12 @@
478	812	bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
479	813	if (max_tx_sch_inputs)
480	814	max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
	815	+
	816	+ tcs = netdev_get_num_tc(dev);
	817	+ tx_grps = max(tcs, 1);
	818	+ if (bp->tx_nr_rings_xdp)
	819	+ tx_grps++;
	820	+ max_tx_rings /= tx_grps;
481	821	channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
482	822
483	823	if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
..	..	@@ -487,7 +827,6 @@
487	827	if (max_tx_sch_inputs)
488	828	max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
489	829
490		- tcs = netdev_get_num_tc(dev);
491	830	if (tcs > 1)
492	831	max_tx_rings /= tcs;
493	832
..	..	@@ -550,6 +889,13 @@
550	889	return rc;
551	890	}
552	891
	892	+ if (bnxt_get_nr_rss_ctxs(bp, req_rx_rings) !=
	893	+ bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) &&
	894	+ (dev->priv_flags & IFF_RXFH_CONFIGURED)) {
	895	+ netdev_warn(dev, "RSS table size change required, RSS table entries must be default to proceed\n");
	896	+ return -EINVAL;
	897	+ }
	898	+
553	899	if (netif_running(dev)) {
554	900	if (BNXT_PF(bp)) {
555	901	/* TODO CHIMP_FW: Send message to all VF's
..	..	@@ -581,8 +927,6 @@
581	927	bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
582	928	bp->tx_nr_rings + bp->rx_nr_rings;
583	929
584		- bp->num_stat_ctxs = bp->cp_nr_rings;
585		-
586	930	/* After changing number of rx channels, update NTUPLE feature. */
587	931	netdev_update_features(dev);
588	932	if (netif_running(dev)) {
..	..	@@ -593,7 +937,7 @@
593	937	*/
594	938	}
595	939	} else {
596		- rc = bnxt_reserve_rings(bp);
	940	+ rc = bnxt_reserve_rings(bp, true);
597	941	}
598	942
599	943	return rc;
..	..	@@ -733,7 +1077,7 @@
733	1077	if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
734	1078	cmd->data \|= RXH_IP_SRC \| RXH_IP_DST \|
735	1079	RXH_L4_B_0_1 \| RXH_L4_B_2_3;
736		- /* fall through */
	1080	+ fallthrough;
737	1081	case SCTP_V4_FLOW:
738	1082	case AH_ESP_V4_FLOW:
739	1083	case AH_V4_FLOW:
..	..	@@ -752,7 +1096,7 @@
752	1096	if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
753	1097	cmd->data \|= RXH_IP_SRC \| RXH_IP_DST \|
754	1098	RXH_L4_B_0_1 \| RXH_L4_B_2_3;
755		- /* fall through */
	1099	+ fallthrough;
756	1100	case SCTP_V6_FLOW:
757	1101	case AH_ESP_V6_FLOW:
758	1102	case AH_V6_FLOW:
..	..	@@ -899,8 +1243,12 @@
899	1243	return rc;
900	1244	}
901	1245
902		-static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
	1246	+u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
903	1247	{
	1248	+ struct bnxt *bp = netdev_priv(dev);
	1249	+
	1250	+ if (bp->flags & BNXT_FLAG_CHIP_P5)
	1251	+ return ALIGN(bp->rx_nr_rings, BNXT_RSS_TABLE_ENTRIES_P5);
904	1252	return HW_HASH_INDEX_SIZE;
905	1253	}
906	1254
..	..	@@ -914,7 +1262,7 @@
914	1262	{
915	1263	struct bnxt *bp = netdev_priv(dev);
916	1264	struct bnxt_vnic_info *vnic;
917		- int i = 0;
	1265	+ u32 i, tbl_size;
918	1266
919	1267	if (hfunc)
920	1268	*hfunc = ETH_RSS_HASH_TOP;
..	..	@@ -923,9 +1271,10 @@
923	1271	return 0;
924	1272
925	1273	vnic = &bp->vnic_info[0];
926		- if (indir && vnic->rss_table) {
927		- for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
928		- indir[i] = le16_to_cpu(vnic->rss_table[i]);
	1274	+ if (indir && bp->rss_indir_tbl) {
	1275	+ tbl_size = bnxt_get_rxfh_indir_size(dev);
	1276	+ for (i = 0; i < tbl_size; i++)
	1277	+ indir[i] = bp->rss_indir_tbl[i];
929	1278	}
930	1279
931	1280	if (key && vnic->rss_hash_key)
..	..	@@ -934,13 +1283,41 @@
934	1283	return 0;
935	1284	}
936	1285
	1286	+static int bnxt_set_rxfh(struct net_device dev, const u32 indir,
	1287	+ const u8 *key, const u8 hfunc)
	1288	+{
	1289	+ struct bnxt *bp = netdev_priv(dev);
	1290	+ int rc = 0;
	1291	+
	1292	+ if (hfunc && hfunc != ETH_RSS_HASH_TOP)
	1293	+ return -EOPNOTSUPP;
	1294	+
	1295	+ if (key)
	1296	+ return -EOPNOTSUPP;
	1297	+
	1298	+ if (indir) {
	1299	+ u32 i, pad, tbl_size = bnxt_get_rxfh_indir_size(dev);
	1300	+
	1301	+ for (i = 0; i < tbl_size; i++)
	1302	+ bp->rss_indir_tbl[i] = indir[i];
	1303	+ pad = bp->rss_indir_tbl_entries - tbl_size;
	1304	+ if (pad)
	1305	+ memset(&bp->rss_indir_tbl[i], 0, pad * sizeof(u16));
	1306	+ }
	1307	+
	1308	+ if (netif_running(bp->dev)) {
	1309	+ bnxt_close_nic(bp, false, false);
	1310	+ rc = bnxt_open_nic(bp, false, false);
	1311	+ }
	1312	+ return rc;
	1313	+}
	1314	+
937	1315	static void bnxt_get_drvinfo(struct net_device *dev,
938	1316	struct ethtool_drvinfo *info)
939	1317	{
940	1318	struct bnxt *bp = netdev_priv(dev);
941	1319
942	1320	strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
943		- strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
944	1321	strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version));
945	1322	strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
946	1323	info->n_stats = bnxt_get_num_stats(bp);
..	..	@@ -949,6 +1326,62 @@
949	1326	info->eedump_len = 0;
950	1327	/* TODO CHIMP FW: reg dump details */
951	1328	info->regdump_len = 0;
	1329	+}
	1330	+
	1331	+static int bnxt_get_regs_len(struct net_device *dev)
	1332	+{
	1333	+ struct bnxt *bp = netdev_priv(dev);
	1334	+ int reg_len;
	1335	+
	1336	+ if (!BNXT_PF(bp))
	1337	+ return -EOPNOTSUPP;
	1338	+
	1339	+ reg_len = BNXT_PXP_REG_LEN;
	1340	+
	1341	+ if (bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED)
	1342	+ reg_len += sizeof(struct pcie_ctx_hw_stats);
	1343	+
	1344	+ return reg_len;
	1345	+}
	1346	+
	1347	+static void bnxt_get_regs(struct net_device dev, struct ethtool_regs regs,
	1348	+ void *_p)
	1349	+{
	1350	+ struct pcie_ctx_hw_stats *hw_pcie_stats;
	1351	+ struct hwrm_pcie_qstats_input req = {0};
	1352	+ struct bnxt *bp = netdev_priv(dev);
	1353	+ dma_addr_t hw_pcie_stats_addr;
	1354	+ int rc;
	1355	+
	1356	+ regs->version = 0;
	1357	+ bnxt_dbg_hwrm_rd_reg(bp, 0, BNXT_PXP_REG_LEN / 4, _p);
	1358	+
	1359	+ if (!(bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED))
	1360	+ return;
	1361	+
	1362	+ hw_pcie_stats = dma_alloc_coherent(&bp->pdev->dev,
	1363	+ sizeof(*hw_pcie_stats),
	1364	+ &hw_pcie_stats_addr, GFP_KERNEL);
	1365	+ if (!hw_pcie_stats)
	1366	+ return;
	1367	+
	1368	+ regs->version = 1;
	1369	+ bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PCIE_QSTATS, -1, -1);
	1370	+ req.pcie_stat_size = cpu_to_le16(sizeof(*hw_pcie_stats));
	1371	+ req.pcie_stat_host_addr = cpu_to_le64(hw_pcie_stats_addr);
	1372	+ mutex_lock(&bp->hwrm_cmd_lock);
	1373	+ rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
	1374	+ if (!rc) {
	1375	+ __le64 src = (__le64 )hw_pcie_stats;
	1376	+ u64 dst = (u64 )(_p + BNXT_PXP_REG_LEN);
	1377	+ int i;
	1378	+
	1379	+ for (i = 0; i < sizeof(*hw_pcie_stats) / sizeof(__le64); i++)
	1380	+ dst[i] = le64_to_cpu(src[i]);
	1381	+ }
	1382	+ mutex_unlock(&bp->hwrm_cmd_lock);
	1383	+ dma_free_coherent(&bp->pdev->dev, sizeof(*hw_pcie_stats), hw_pcie_stats,
	1384	+ hw_pcie_stats_addr);
952	1385	}
953	1386
954	1387	static void bnxt_get_wol(struct net_device dev, struct ethtool_wolinfo wol)
..	..	@@ -1081,6 +1514,53 @@
1081	1514	(fw_speeds) \|= BNXT_LINK_SPEED_MSK_100GB; \
1082	1515	}
1083	1516
	1517	+#define BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, name) \
	1518	+{ \
	1519	+ if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_50GB) \
	1520	+ ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
	1521	+ 50000baseCR_Full); \
	1522	+ if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_100GB) \
	1523	+ ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
	1524	+ 100000baseCR2_Full);\
	1525	+ if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_200GB) \
	1526	+ ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
	1527	+ 200000baseCR4_Full);\
	1528	+}
	1529	+
	1530	+#define BNXT_ETHTOOL_TO_FW_PAM4_SPDS(fw_speeds, lk_ksettings, name) \
	1531	+{ \
	1532	+ if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
	1533	+ 50000baseCR_Full)) \
	1534	+ (fw_speeds) \|= BNXT_LINK_PAM4_SPEED_MSK_50GB; \
	1535	+ if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
	1536	+ 100000baseCR2_Full)) \
	1537	+ (fw_speeds) \|= BNXT_LINK_PAM4_SPEED_MSK_100GB; \
	1538	+ if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
	1539	+ 200000baseCR4_Full)) \
	1540	+ (fw_speeds) \|= BNXT_LINK_PAM4_SPEED_MSK_200GB; \
	1541	+}
	1542	+
	1543	+static void bnxt_fw_to_ethtool_advertised_fec(struct bnxt_link_info *link_info,
	1544	+ struct ethtool_link_ksettings *lk_ksettings)
	1545	+{
	1546	+ u16 fec_cfg = link_info->fec_cfg;
	1547	+
	1548	+ if ((fec_cfg & BNXT_FEC_NONE) \|\| !(fec_cfg & BNXT_FEC_AUTONEG)) {
	1549	+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT,
	1550	+ lk_ksettings->link_modes.advertising);
	1551	+ return;
	1552	+ }
	1553	+ if (fec_cfg & BNXT_FEC_ENC_BASE_R)
	1554	+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
	1555	+ lk_ksettings->link_modes.advertising);
	1556	+ if (fec_cfg & BNXT_FEC_ENC_RS)
	1557	+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
	1558	+ lk_ksettings->link_modes.advertising);
	1559	+ if (fec_cfg & BNXT_FEC_ENC_LLRS)
	1560	+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT,
	1561	+ lk_ksettings->link_modes.advertising);
	1562	+}
	1563	+
1084	1564	static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
1085	1565	struct ethtool_link_ksettings *lk_ksettings)
1086	1566	{
..	..	@@ -1091,6 +1571,9 @@
1091	1571	fw_pause = link_info->auto_pause_setting;
1092	1572
1093	1573	BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
	1574	+ fw_speeds = link_info->advertising_pam4;
	1575	+ BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, advertising);
	1576	+ bnxt_fw_to_ethtool_advertised_fec(link_info, lk_ksettings);
1094	1577	}
1095	1578
1096	1579	static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
..	..	@@ -1104,6 +1587,29 @@
1104	1587
1105	1588	BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
1106	1589	lp_advertising);
	1590	+ fw_speeds = link_info->lp_auto_pam4_link_speeds;
	1591	+ BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, lp_advertising);
	1592	+}
	1593	+
	1594	+static void bnxt_fw_to_ethtool_support_fec(struct bnxt_link_info *link_info,
	1595	+ struct ethtool_link_ksettings *lk_ksettings)
	1596	+{
	1597	+ u16 fec_cfg = link_info->fec_cfg;
	1598	+
	1599	+ if (fec_cfg & BNXT_FEC_NONE) {
	1600	+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT,
	1601	+ lk_ksettings->link_modes.supported);
	1602	+ return;
	1603	+ }
	1604	+ if (fec_cfg & BNXT_FEC_ENC_BASE_R_CAP)
	1605	+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
	1606	+ lk_ksettings->link_modes.supported);
	1607	+ if (fec_cfg & BNXT_FEC_ENC_RS_CAP)
	1608	+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
	1609	+ lk_ksettings->link_modes.supported);
	1610	+ if (fec_cfg & BNXT_FEC_ENC_LLRS_CAP)
	1611	+ linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT,
	1612	+ lk_ksettings->link_modes.supported);
1107	1613	}
1108	1614
1109	1615	static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
..	..	@@ -1112,14 +1618,18 @@
1112	1618	u16 fw_speeds = link_info->support_speeds;
1113	1619
1114	1620	BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
	1621	+ fw_speeds = link_info->support_pam4_speeds;
	1622	+ BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, supported);
1115	1623
1116	1624	ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
1117	1625	ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1118	1626	Asym_Pause);
1119	1627
1120		- if (link_info->support_auto_speeds)
	1628	+ if (link_info->support_auto_speeds \|\|
	1629	+ link_info->support_pam4_auto_speeds)
1121	1630	ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1122	1631	Autoneg);
	1632	+ bnxt_fw_to_ethtool_support_fec(link_info, lk_ksettings);
1123	1633	}
1124	1634
1125	1635	u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
..	..	@@ -1166,15 +1676,15 @@
1166	1676	ethtool_link_ksettings_add_link_mode(lk_ksettings,
1167	1677	advertising, Autoneg);
1168	1678	base->autoneg = AUTONEG_ENABLE;
1169		- if (link_info->phy_link_status == BNXT_LINK_LINK)
	1679	+ base->duplex = DUPLEX_UNKNOWN;
	1680	+ if (link_info->phy_link_status == BNXT_LINK_LINK) {
1170	1681	bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
	1682	+ if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
	1683	+ base->duplex = DUPLEX_FULL;
	1684	+ else
	1685	+ base->duplex = DUPLEX_HALF;
	1686	+ }
1171	1687	ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
1172		- if (!netif_carrier_ok(dev))
1173		- base->duplex = DUPLEX_UNKNOWN;
1174		- else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
1175		- base->duplex = DUPLEX_FULL;
1176		- else
1177		- base->duplex = DUPLEX_HALF;
1178	1688	} else {
1179	1689	base->autoneg = AUTONEG_DISABLE;
1180	1690	ethtool_speed =
..	..	@@ -1210,55 +1720,86 @@
1210	1720	return 0;
1211	1721	}
1212	1722
1213		-static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed)
	1723	+static int bnxt_force_link_speed(struct net_device *dev, u32 ethtool_speed)
1214	1724	{
1215	1725	struct bnxt *bp = netdev_priv(dev);
1216	1726	struct bnxt_link_info *link_info = &bp->link_info;
	1727	+ u16 support_pam4_spds = link_info->support_pam4_speeds;
1217	1728	u16 support_spds = link_info->support_speeds;
1218		- u32 fw_speed = 0;
	1729	+ u8 sig_mode = BNXT_SIG_MODE_NRZ;
	1730	+ u16 fw_speed = 0;
1219	1731
1220	1732	switch (ethtool_speed) {
1221	1733	case SPEED_100:
1222	1734	if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
1223		- fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
	1735	+ fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100MB;
1224	1736	break;
1225	1737	case SPEED_1000:
1226	1738	if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
1227		- fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
	1739	+ fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
1228	1740	break;
1229	1741	case SPEED_2500:
1230	1742	if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
1231		- fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
	1743	+ fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_2_5GB;
1232	1744	break;
1233	1745	case SPEED_10000:
1234	1746	if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
1235		- fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
	1747	+ fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
1236	1748	break;
1237	1749	case SPEED_20000:
1238	1750	if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
1239		- fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
	1751	+ fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_20GB;
1240	1752	break;
1241	1753	case SPEED_25000:
1242	1754	if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
1243		- fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
	1755	+ fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
1244	1756	break;
1245	1757	case SPEED_40000:
1246	1758	if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
1247		- fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
	1759	+ fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
1248	1760	break;
1249	1761	case SPEED_50000:
1250		- if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
1251		- fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
	1762	+ if (support_spds & BNXT_LINK_SPEED_MSK_50GB) {
	1763	+ fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
	1764	+ } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_50GB) {
	1765	+ fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_50GB;
	1766	+ sig_mode = BNXT_SIG_MODE_PAM4;
	1767	+ }
1252	1768	break;
1253	1769	case SPEED_100000:
1254		- if (support_spds & BNXT_LINK_SPEED_MSK_100GB)
1255		- fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB;
	1770	+ if (support_spds & BNXT_LINK_SPEED_MSK_100GB) {
	1771	+ fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100GB;
	1772	+ } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_100GB) {
	1773	+ fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_100GB;
	1774	+ sig_mode = BNXT_SIG_MODE_PAM4;
	1775	+ }
1256	1776	break;
1257		- default:
1258		- netdev_err(dev, "unsupported speed!\n");
	1777	+ case SPEED_200000:
	1778	+ if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_200GB) {
	1779	+ fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_200GB;
	1780	+ sig_mode = BNXT_SIG_MODE_PAM4;
	1781	+ }
1259	1782	break;
1260	1783	}
1261		- return fw_speed;
	1784	+
	1785	+ if (!fw_speed) {
	1786	+ netdev_err(dev, "unsupported speed!\n");
	1787	+ return -EINVAL;
	1788	+ }
	1789	+
	1790	+ if (link_info->req_link_speed == fw_speed &&
	1791	+ link_info->req_signal_mode == sig_mode &&
	1792	+ link_info->autoneg == 0)
	1793	+ return -EALREADY;
	1794	+
	1795	+ link_info->req_link_speed = fw_speed;
	1796	+ link_info->req_signal_mode = sig_mode;
	1797	+ link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
	1798	+ link_info->autoneg = 0;
	1799	+ link_info->advertising = 0;
	1800	+ link_info->advertising_pam4 = 0;
	1801	+
	1802	+ return 0;
1262	1803	}
1263	1804
1264	1805	u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
..	..	@@ -1290,28 +1831,31 @@
1290	1831	struct bnxt_link_info *link_info = &bp->link_info;
1291	1832	const struct ethtool_link_settings *base = &lk_ksettings->base;
1292	1833	bool set_pause = false;
1293		- u16 fw_advertising = 0;
1294	1834	u32 speed;
1295	1835	int rc = 0;
1296	1836
1297		- if (!BNXT_SINGLE_PF(bp))
	1837	+ if (!BNXT_PHY_CFG_ABLE(bp))
1298	1838	return -EOPNOTSUPP;
1299	1839
1300	1840	mutex_lock(&bp->link_lock);
1301	1841	if (base->autoneg == AUTONEG_ENABLE) {
1302		- BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
	1842	+ link_info->advertising = 0;
	1843	+ link_info->advertising_pam4 = 0;
	1844	+ BNXT_ETHTOOL_TO_FW_SPDS(link_info->advertising, lk_ksettings,
1303	1845	advertising);
	1846	+ BNXT_ETHTOOL_TO_FW_PAM4_SPDS(link_info->advertising_pam4,
	1847	+ lk_ksettings, advertising);
1304	1848	link_info->autoneg \|= BNXT_AUTONEG_SPEED;
1305		- if (!fw_advertising)
	1849	+ if (!link_info->advertising && !link_info->advertising_pam4) {
1306	1850	link_info->advertising = link_info->support_auto_speeds;
1307		- else
1308		- link_info->advertising = fw_advertising;
	1851	+ link_info->advertising_pam4 =
	1852	+ link_info->support_pam4_auto_speeds;
	1853	+ }
1309	1854	/* any change to autoneg will cause link change, therefore the
1310	1855	* driver should put back the original pause setting in autoneg
1311	1856	*/
1312	1857	set_pause = true;
1313	1858	} else {
1314		- u16 fw_speed;
1315	1859	u8 phy_type = link_info->phy_type;
1316	1860
1317	1861	if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET \|\|
..	..	@@ -1327,15 +1871,12 @@
1327	1871	goto set_setting_exit;
1328	1872	}
1329	1873	speed = base->speed;
1330		- fw_speed = bnxt_get_fw_speed(dev, speed);
1331		- if (!fw_speed) {
1332		- rc = -EINVAL;
	1874	+ rc = bnxt_force_link_speed(dev, speed);
	1875	+ if (rc) {
	1876	+ if (rc == -EALREADY)
	1877	+ rc = 0;
1333	1878	goto set_setting_exit;
1334	1879	}
1335		- link_info->req_link_speed = fw_speed;
1336		- link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
1337		- link_info->autoneg = 0;
1338		- link_info->advertising = 0;
1339	1880	}
1340	1881
1341	1882	if (netif_running(dev))
..	..	@@ -1343,6 +1884,113 @@
1343	1884
1344	1885	set_setting_exit:
1345	1886	mutex_unlock(&bp->link_lock);
	1887	+ return rc;
	1888	+}
	1889	+
	1890	+static int bnxt_get_fecparam(struct net_device *dev,
	1891	+ struct ethtool_fecparam *fec)
	1892	+{
	1893	+ struct bnxt *bp = netdev_priv(dev);
	1894	+ struct bnxt_link_info *link_info;
	1895	+ u8 active_fec;
	1896	+ u16 fec_cfg;
	1897	+
	1898	+ link_info = &bp->link_info;
	1899	+ fec_cfg = link_info->fec_cfg;
	1900	+ active_fec = link_info->active_fec_sig_mode &
	1901	+ PORT_PHY_QCFG_RESP_ACTIVE_FEC_MASK;
	1902	+ if (fec_cfg & BNXT_FEC_NONE) {
	1903	+ fec->fec = ETHTOOL_FEC_NONE;
	1904	+ fec->active_fec = ETHTOOL_FEC_NONE;
	1905	+ return 0;
	1906	+ }
	1907	+ if (fec_cfg & BNXT_FEC_AUTONEG)
	1908	+ fec->fec \|= ETHTOOL_FEC_AUTO;
	1909	+ if (fec_cfg & BNXT_FEC_ENC_BASE_R)
	1910	+ fec->fec \|= ETHTOOL_FEC_BASER;
	1911	+ if (fec_cfg & BNXT_FEC_ENC_RS)
	1912	+ fec->fec \|= ETHTOOL_FEC_RS;
	1913	+ if (fec_cfg & BNXT_FEC_ENC_LLRS)
	1914	+ fec->fec \|= ETHTOOL_FEC_LLRS;
	1915	+
	1916	+ switch (active_fec) {
	1917	+ case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE74_ACTIVE:
	1918	+ fec->active_fec \|= ETHTOOL_FEC_BASER;
	1919	+ break;
	1920	+ case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE91_ACTIVE:
	1921	+ case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_1XN_ACTIVE:
	1922	+ case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_IEEE_ACTIVE:
	1923	+ fec->active_fec \|= ETHTOOL_FEC_RS;
	1924	+ break;
	1925	+ case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_1XN_ACTIVE:
	1926	+ case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_IEEE_ACTIVE:
	1927	+ fec->active_fec \|= ETHTOOL_FEC_LLRS;
	1928	+ break;
	1929	+ case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_NONE_ACTIVE:
	1930	+ fec->active_fec \|= ETHTOOL_FEC_OFF;
	1931	+ break;
	1932	+ }
	1933	+ return 0;
	1934	+}
	1935	+
	1936	+static u32 bnxt_ethtool_forced_fec_to_fw(struct bnxt_link_info *link_info,
	1937	+ u32 fec)
	1938	+{
	1939	+ u32 fw_fec = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE;
	1940	+
	1941	+ if (fec & ETHTOOL_FEC_BASER)
	1942	+ fw_fec \|= BNXT_FEC_BASE_R_ON(link_info);
	1943	+ else if (fec & ETHTOOL_FEC_RS)
	1944	+ fw_fec \|= BNXT_FEC_RS_ON(link_info);
	1945	+ else if (fec & ETHTOOL_FEC_LLRS)
	1946	+ fw_fec \|= BNXT_FEC_LLRS_ON;
	1947	+ return fw_fec;
	1948	+}
	1949	+
	1950	+static int bnxt_set_fecparam(struct net_device *dev,
	1951	+ struct ethtool_fecparam *fecparam)
	1952	+{
	1953	+ struct hwrm_port_phy_cfg_input req = {0};
	1954	+ struct bnxt *bp = netdev_priv(dev);
	1955	+ struct bnxt_link_info *link_info;
	1956	+ u32 new_cfg, fec = fecparam->fec;
	1957	+ u16 fec_cfg;
	1958	+ int rc;
	1959	+
	1960	+ link_info = &bp->link_info;
	1961	+ fec_cfg = link_info->fec_cfg;
	1962	+ if (fec_cfg & BNXT_FEC_NONE)
	1963	+ return -EOPNOTSUPP;
	1964	+
	1965	+ if (fec & ETHTOOL_FEC_OFF) {
	1966	+ new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE \|
	1967	+ BNXT_FEC_ALL_OFF(link_info);
	1968	+ goto apply_fec;
	1969	+ }
	1970	+ if (((fec & ETHTOOL_FEC_AUTO) && !(fec_cfg & BNXT_FEC_AUTONEG_CAP)) \|\|
	1971	+ ((fec & ETHTOOL_FEC_RS) && !(fec_cfg & BNXT_FEC_ENC_RS_CAP)) \|\|
	1972	+ ((fec & ETHTOOL_FEC_LLRS) && !(fec_cfg & BNXT_FEC_ENC_LLRS_CAP)) \|\|
	1973	+ ((fec & ETHTOOL_FEC_BASER) && !(fec_cfg & BNXT_FEC_ENC_BASE_R_CAP)))
	1974	+ return -EINVAL;
	1975	+
	1976	+ if (fec & ETHTOOL_FEC_AUTO) {
	1977	+ if (!link_info->autoneg)
	1978	+ return -EINVAL;
	1979	+ new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_ENABLE;
	1980	+ } else {
	1981	+ new_cfg = bnxt_ethtool_forced_fec_to_fw(link_info, fec);
	1982	+ }
	1983	+
	1984	+apply_fec:
	1985	+ bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
	1986	+ req.flags = cpu_to_le32(new_cfg \| PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
	1987	+ rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
	1988	+ /* update current settings */
	1989	+ if (!rc) {
	1990	+ mutex_lock(&bp->link_lock);
	1991	+ bnxt_update_link(bp, false);
	1992	+ mutex_unlock(&bp->link_lock);
	1993	+ }
1346	1994	return rc;
1347	1995	}
1348	1996
..	..	@@ -1359,6 +2007,22 @@
1359	2007	epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
1360	2008	}
1361	2009
	2010	+static void bnxt_get_pause_stats(struct net_device *dev,
	2011	+ struct ethtool_pause_stats *epstat)
	2012	+{
	2013	+ struct bnxt *bp = netdev_priv(dev);
	2014	+ u64 rx, tx;
	2015	+
	2016	+ if (BNXT_VF(bp) \|\| !(bp->flags & BNXT_FLAG_PORT_STATS))
	2017	+ return;
	2018	+
	2019	+ rx = bp->port_stats.sw_stats;
	2020	+ tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8;
	2021	+
	2022	+ epstat->rx_pause_frames = BNXT_GET_RX_PORT_STATS64(rx, rx_pause_frames);
	2023	+ epstat->tx_pause_frames = BNXT_GET_TX_PORT_STATS64(tx, tx_pause_frames);
	2024	+}
	2025	+
1362	2026	static int bnxt_set_pauseparam(struct net_device *dev,
1363	2027	struct ethtool_pauseparam *epause)
1364	2028	{
..	..	@@ -1366,7 +2030,7 @@
1366	2030	struct bnxt *bp = netdev_priv(dev);
1367	2031	struct bnxt_link_info *link_info = &bp->link_info;
1368	2032
1369		- if (!BNXT_SINGLE_PF(bp))
	2033	+ if (!BNXT_PHY_CFG_ABLE(bp))
1370	2034	return -EOPNOTSUPP;
1371	2035
1372	2036	mutex_lock(&bp->link_lock);
..	..	@@ -1377,9 +2041,7 @@
1377	2041	}
1378	2042
1379	2043	link_info->autoneg \|= BNXT_AUTONEG_FLOW_CTRL;
1380		- if (bp->hwrm_spec_code >= 0x10201)
1381		- link_info->req_flow_ctrl =
1382		- PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
	2044	+ link_info->req_flow_ctrl = 0;
1383	2045	} else {
1384	2046	/* when transition from auto pause to force pause,
1385	2047	* force a link change
..	..	@@ -1409,6 +2071,30 @@
1409	2071
1410	2072	/* TODO: handle MF, VF, driver close case */
1411	2073	return bp->link_info.link_up;
	2074	+}
	2075	+
	2076	+int bnxt_hwrm_nvm_get_dev_info(struct bnxt *bp,
	2077	+ struct hwrm_nvm_get_dev_info_output *nvm_dev_info)
	2078	+{
	2079	+ struct hwrm_nvm_get_dev_info_output *resp = bp->hwrm_cmd_resp_addr;
	2080	+ struct hwrm_nvm_get_dev_info_input req = {0};
	2081	+ int rc;
	2082	+
	2083	+ if (BNXT_VF(bp))
	2084	+ return -EOPNOTSUPP;
	2085	+
	2086	+ bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DEV_INFO, -1, -1);
	2087	+ mutex_lock(&bp->hwrm_cmd_lock);
	2088	+ rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
	2089	+ if (!rc)
	2090	+ memcpy(nvm_dev_info, resp, sizeof(*resp));
	2091	+ mutex_unlock(&bp->hwrm_cmd_lock);
	2092	+ return rc;
	2093	+}
	2094	+
	2095	+static void bnxt_print_admin_err(struct bnxt *bp)
	2096	+{
	2097	+ netdev_info(bp->dev, "PF does not have admin privileges to flash or reset the device\n");
1412	2098	}
1413	2099
1414	2100	static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
..	..	@@ -1450,18 +2136,13 @@
1450	2136	rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
1451	2137	dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
1452	2138
1453		- if (rc == HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED) {
1454		- netdev_info(dev,
1455		- "PF does not have admin privileges to flash the device\n");
1456		- rc = -EACCES;
1457		- } else if (rc) {
1458		- rc = -EIO;
1459		- }
	2139	+ if (rc == -EACCES)
	2140	+ bnxt_print_admin_err(bp);
1460	2141	return rc;
1461	2142	}
1462	2143
1463		-static int bnxt_firmware_reset(struct net_device *dev,
1464		- u16 dir_type)
	2144	+static int bnxt_hwrm_firmware_reset(struct net_device *dev, u8 proc_type,
	2145	+ u8 self_reset, u8 flags)
1465	2146	{
1466	2147	struct hwrm_fw_reset_input req = {0};
1467	2148	struct bnxt *bp = netdev_priv(dev);
..	..	@@ -1469,51 +2150,77 @@
1469	2150
1470	2151	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
1471	2152
	2153	+ req.embedded_proc_type = proc_type;
	2154	+ req.selfrst_status = self_reset;
	2155	+ req.flags = flags;
	2156	+
	2157	+ if (proc_type == FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP) {
	2158	+ rc = hwrm_send_message_silent(bp, &req, sizeof(req),
	2159	+ HWRM_CMD_TIMEOUT);
	2160	+ } else {
	2161	+ rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
	2162	+ if (rc == -EACCES)
	2163	+ bnxt_print_admin_err(bp);
	2164	+ }
	2165	+ return rc;
	2166	+}
	2167	+
	2168	+static int bnxt_firmware_reset(struct net_device *dev,
	2169	+ enum bnxt_nvm_directory_type dir_type)
	2170	+{
	2171	+ u8 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE;
	2172	+ u8 proc_type, flags = 0;
	2173	+
1472	2174	/* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
1473	2175	/* (e.g. when firmware isn't already running) */
1474	2176	switch (dir_type) {
1475	2177	case BNX_DIR_TYPE_CHIMP_PATCH:
1476	2178	case BNX_DIR_TYPE_BOOTCODE:
1477	2179	case BNX_DIR_TYPE_BOOTCODE_2:
1478		- req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
	2180	+ proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
1479	2181	/* Self-reset ChiMP upon next PCIe reset: */
1480		- req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
	2182	+ self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1481	2183	break;
1482	2184	case BNX_DIR_TYPE_APE_FW:
1483	2185	case BNX_DIR_TYPE_APE_PATCH:
1484		- req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
	2186	+ proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
1485	2187	/* Self-reset APE upon next PCIe reset: */
1486		- req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
	2188	+ self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1487	2189	break;
1488	2190	case BNX_DIR_TYPE_KONG_FW:
1489	2191	case BNX_DIR_TYPE_KONG_PATCH:
1490		- req.embedded_proc_type =
1491		- FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
	2192	+ proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
1492	2193	break;
1493	2194	case BNX_DIR_TYPE_BONO_FW:
1494	2195	case BNX_DIR_TYPE_BONO_PATCH:
1495		- req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
1496		- break;
1497		- case BNXT_FW_RESET_CHIP:
1498		- req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP;
1499		- req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP;
1500		- break;
1501		- case BNXT_FW_RESET_AP:
1502		- req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP;
	2196	+ proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
1503	2197	break;
1504	2198	default:
1505	2199	return -EINVAL;
1506	2200	}
1507	2201
1508		- rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1509		- if (rc == HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED) {
1510		- netdev_info(dev,
1511		- "PF does not have admin privileges to reset the device\n");
1512		- rc = -EACCES;
1513		- } else if (rc) {
1514		- rc = -EIO;
1515		- }
1516		- return rc;
	2202	+ return bnxt_hwrm_firmware_reset(dev, proc_type, self_reset, flags);
	2203	+}
	2204	+
	2205	+static int bnxt_firmware_reset_chip(struct net_device *dev)
	2206	+{
	2207	+ struct bnxt *bp = netdev_priv(dev);
	2208	+ u8 flags = 0;
	2209	+
	2210	+ if (bp->fw_cap & BNXT_FW_CAP_HOT_RESET)
	2211	+ flags = FW_RESET_REQ_FLAGS_RESET_GRACEFUL;
	2212	+
	2213	+ return bnxt_hwrm_firmware_reset(dev,
	2214	+ FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP,
	2215	+ FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP,
	2216	+ flags);
	2217	+}
	2218	+
	2219	+static int bnxt_firmware_reset_ap(struct net_device *dev)
	2220	+{
	2221	+ return bnxt_hwrm_firmware_reset(dev, FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP,
	2222	+ FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE,
	2223	+ 0);
1517	2224	}
1518	2225
1519	2226	static int bnxt_flash_firmware(struct net_device *dev,
..	..	@@ -1702,9 +2409,9 @@
1702	2409	rc, filename);
1703	2410	return rc;
1704	2411	}
1705		- if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
	2412	+ if (bnxt_dir_type_is_ape_bin_format(dir_type))
1706	2413	rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
1707		- else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
	2414	+ else if (bnxt_dir_type_is_other_exec_format(dir_type))
1708	2415	rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
1709	2416	else
1710	2417	rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
..	..	@@ -1713,24 +2420,25 @@
1713	2420	return rc;
1714	2421	}
1715	2422
1716		-static int bnxt_flash_package_from_file(struct net_device *dev,
1717		- char *filename, u32 install_type)
	2423	+int bnxt_flash_package_from_file(struct net_device dev, const char filename,
	2424	+ u32 install_type)
1718	2425	{
1719	2426	struct bnxt *bp = netdev_priv(dev);
1720	2427	struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
1721	2428	struct hwrm_nvm_install_update_input install = {0};
1722	2429	const struct firmware *fw;
1723		- int rc, hwrm_err = 0;
1724	2430	u32 item_len;
	2431	+ int rc = 0;
1725	2432	u16 index;
1726	2433
1727	2434	bnxt_hwrm_fw_set_time(bp);
1728	2435
1729		- if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
1730		- BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
1731		- &index, &item_len, NULL) != 0) {
	2436	+ rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
	2437	+ BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
	2438	+ &index, &item_len, NULL);
	2439	+ if (rc) {
1732	2440	netdev_err(dev, "PKG update area not created in nvram\n");
1733		- return -ENOBUFS;
	2441	+ return rc;
1734	2442	}
1735	2443
1736	2444	rc = request_firmware(&fw, filename, &dev->dev);
..	..	@@ -1741,7 +2449,7 @@
1741	2449	}
1742	2450
1743	2451	if (fw->size > item_len) {
1744		- netdev_err(dev, "PKG insufficient update area in nvram: %lu",
	2452	+ netdev_err(dev, "PKG insufficient update area in nvram: %lu\n",
1745	2453	(unsigned long)fw->size);
1746	2454	rc = -EFBIG;
1747	2455	} else {
..	..	@@ -1765,15 +2473,14 @@
1765	2473	memcpy(kmem, fw->data, fw->size);
1766	2474	modify.host_src_addr = cpu_to_le64(dma_handle);
1767	2475
1768		- hwrm_err = hwrm_send_message(bp, &modify,
1769		- sizeof(modify),
1770		- FLASH_PACKAGE_TIMEOUT);
	2476	+ rc = hwrm_send_message(bp, &modify, sizeof(modify),
	2477	+ FLASH_PACKAGE_TIMEOUT);
1771	2478	dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
1772	2479	dma_handle);
1773	2480	}
1774	2481	}
1775	2482	release_firmware(fw);
1776		- if (rc \|\| hwrm_err)
	2483	+ if (rc)
1777	2484	goto err_exit;
1778	2485
1779	2486	if ((install_type & 0xffff) == 0)
..	..	@@ -1782,20 +2489,19 @@
1782	2489	install.install_type = cpu_to_le32(install_type);
1783	2490
1784	2491	mutex_lock(&bp->hwrm_cmd_lock);
1785		- hwrm_err = _hwrm_send_message(bp, &install, sizeof(install),
1786		- INSTALL_PACKAGE_TIMEOUT);
1787		- if (hwrm_err) {
	2492	+ rc = _hwrm_send_message(bp, &install, sizeof(install),
	2493	+ INSTALL_PACKAGE_TIMEOUT);
	2494	+ if (rc) {
1788	2495	u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err;
1789	2496
1790	2497	if (resp->error_code && error_code ==
1791	2498	NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
1792	2499	install.flags \|= cpu_to_le16(
1793	2500	NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
1794		- hwrm_err = _hwrm_send_message(bp, &install,
1795		- sizeof(install),
1796		- INSTALL_PACKAGE_TIMEOUT);
	2501	+ rc = _hwrm_send_message(bp, &install, sizeof(install),
	2502	+ INSTALL_PACKAGE_TIMEOUT);
1797	2503	}
1798		- if (hwrm_err)
	2504	+ if (rc)
1799	2505	goto flash_pkg_exit;
1800	2506	}
1801	2507
..	..	@@ -1807,13 +2513,8 @@
1807	2513	flash_pkg_exit:
1808	2514	mutex_unlock(&bp->hwrm_cmd_lock);
1809	2515	err_exit:
1810		- if (hwrm_err == HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED) {
1811		- netdev_info(dev,
1812		- "PF does not have admin privileges to flash the device\n");
1813		- rc = -EACCES;
1814		- } else if (hwrm_err) {
1815		- rc = -EOPNOTSUPP;
1816		- }
	2516	+ if (rc == -EACCES)
	2517	+ bnxt_print_admin_err(bp);
1817	2518	return rc;
1818	2519	}
1819	2520
..	..	@@ -2101,7 +2802,7 @@
2101	2802	}
2102	2803
2103	2804	/* Create or re-write an NVM item: */
2104		- if (bnxt_dir_type_is_executable(type) == true)
	2805	+ if (bnxt_dir_type_is_executable(type))
2105	2806	return -EOPNOTSUPP;
2106	2807	ext = eeprom->magic & 0xffff;
2107	2808	ordinal = eeprom->offset >> 16;
..	..	@@ -2119,7 +2820,7 @@
2119	2820	u32 advertising;
2120	2821	int rc = 0;
2121	2822
2122		- if (!BNXT_SINGLE_PF(bp))
	2823	+ if (!BNXT_PHY_CFG_ABLE(bp))
2123	2824	return -EOPNOTSUPP;
2124	2825
2125	2826	if (!(bp->flags & BNXT_FLAG_EEE_CAP))
..	..	@@ -2313,7 +3014,7 @@
2313	3014	struct bnxt *bp = netdev_priv(dev);
2314	3015	struct bnxt_link_info *link_info = &bp->link_info;
2315	3016
2316		- if (!BNXT_SINGLE_PF(bp))
	3017	+ if (!BNXT_PHY_CFG_ABLE(bp))
2317	3018	return -EOPNOTSUPP;
2318	3019
2319	3020	if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
..	..	@@ -2334,7 +3035,7 @@
2334	3035	struct bnxt_led_cfg *led_cfg;
2335	3036	u8 led_state;
2336	3037	__le16 duration;
2337		- int i, rc;
	3038	+ int i;
2338	3039
2339	3040	if (!bp->num_leds \|\| BNXT_VF(bp))
2340	3041	return -EOPNOTSUPP;
..	..	@@ -2360,10 +3061,7 @@
2360	3061	led_cfg->led_blink_off = duration;
2361	3062	led_cfg->led_group_id = bp->leds[i].led_group_id;
2362	3063	}
2363		- rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2364		- if (rc)
2365		- rc = -EIO;
2366		- return rc;
	3064	+ return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2367	3065	}
2368	3066
2369	3067	static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
..	..	@@ -2427,7 +3125,8 @@
2427	3125	u16 fw_speed;
2428	3126	int rc;
2429	3127
2430		- if (!link_info->autoneg)
	3128	+ if (!link_info->autoneg \|\|
	3129	+ (bp->test_info->flags & BNXT_TEST_FL_AN_PHY_LPBK))
2431	3130	return 0;
2432	3131
2433	3132	rc = bnxt_query_force_speeds(bp, &fw_advertising);
..	..	@@ -2435,7 +3134,7 @@
2435	3134	return rc;
2436	3135
2437	3136	fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
2438		- if (netif_carrier_ok(bp->dev))
	3137	+ if (bp->link_info.link_up)
2439	3138	fw_speed = bp->link_info.link_speed;
2440	3139	else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
2441	3140	fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
..	..	@@ -2474,11 +3173,11 @@
2474	3173	return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2475	3174	}
2476	3175
2477		-static int bnxt_rx_loopback(struct bnxt bp, struct bnxt_napi bnapi,
	3176	+static int bnxt_rx_loopback(struct bnxt bp, struct bnxt_cp_ring_info cpr,
2478	3177	u32 raw_cons, int pkt_size)
2479	3178	{
2480		- struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
2481		- struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;
	3179	+ struct bnxt_napi *bnapi = cpr->bnapi;
	3180	+ struct bnxt_rx_ring_info *rxr;
2482	3181	struct bnxt_sw_rx_bd *rx_buf;
2483	3182	struct rx_cmp *rxcmp;
2484	3183	u16 cp_cons, cons;
..	..	@@ -2486,6 +3185,7 @@
2486	3185	u32 len;
2487	3186	int i;
2488	3187
	3188	+ rxr = bnapi->rx_ring;
2489	3189	cp_cons = RING_CMP(raw_cons);
2490	3190	rxcmp = (struct rx_cmp *)
2491	3191	&cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
..	..	@@ -2506,17 +3206,15 @@
2506	3206	return 0;
2507	3207	}
2508	3208
2509		-static int bnxt_poll_loopback(struct bnxt *bp, int pkt_size)
	3209	+static int bnxt_poll_loopback(struct bnxt bp, struct bnxt_cp_ring_info cpr,
	3210	+ int pkt_size)
2510	3211	{
2511		- struct bnxt_napi *bnapi = bp->bnapi[0];
2512		- struct bnxt_cp_ring_info *cpr;
2513	3212	struct tx_cmp *txcmp;
2514	3213	int rc = -EIO;
2515	3214	u32 raw_cons;
2516	3215	u32 cons;
2517	3216	int i;
2518	3217
2519		- cpr = &bnapi->cp_ring;
2520	3218	raw_cons = cpr->cp_raw_cons;
2521	3219	for (i = 0; i < 200; i++) {
2522	3220	cons = RING_CMP(raw_cons);
..	..	@@ -2532,7 +3230,7 @@
2532	3230	*/
2533	3231	dma_rmb();
2534	3232	if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) {
2535		- rc = bnxt_rx_loopback(bp, bnapi, raw_cons, pkt_size);
	3233	+ rc = bnxt_rx_loopback(bp, cpr, raw_cons, pkt_size);
2536	3234	raw_cons = NEXT_RAW_CMP(raw_cons);
2537	3235	raw_cons = NEXT_RAW_CMP(raw_cons);
2538	3236	break;
..	..	@@ -2546,12 +3244,17 @@
2546	3244	static int bnxt_run_loopback(struct bnxt *bp)
2547	3245	{
2548	3246	struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
	3247	+ struct bnxt_rx_ring_info *rxr = &bp->rx_ring[0];
	3248	+ struct bnxt_cp_ring_info *cpr;
2549	3249	int pkt_size, i = 0;
2550	3250	struct sk_buff *skb;
2551	3251	dma_addr_t map;
2552	3252	u8 *data;
2553	3253	int rc;
2554	3254
	3255	+ cpr = &rxr->bnapi->cp_ring;
	3256	+ if (bp->flags & BNXT_FLAG_CHIP_P5)
	3257	+ cpr = cpr->cp_ring_arr[BNXT_RX_HDL];
2555	3258	pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
2556	3259	skb = netdev_alloc_skb(bp->dev, pkt_size);
2557	3260	if (!skb)
..	..	@@ -2570,13 +3273,13 @@
2570	3273	dev_kfree_skb(skb);
2571	3274	return -EIO;
2572	3275	}
2573		- bnxt_xmit_xdp(bp, txr, map, pkt_size, 0);
	3276	+ bnxt_xmit_bd(bp, txr, map, pkt_size);
2574	3277
2575	3278	/* Sync BD data before updating doorbell */
2576	3279	wmb();
2577	3280
2578		- bnxt_db_write(bp, txr->tx_doorbell, DB_KEY_TX \| txr->tx_prod);
2579		- rc = bnxt_poll_loopback(bp, pkt_size);
	3281	+ bnxt_db_write(bp, &txr->tx_db, txr->tx_prod);
	3282	+ rc = bnxt_poll_loopback(bp, cpr, pkt_size);
2580	3283
2581	3284	dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE);
2582	3285	dev_kfree_skb(skb);
..	..	@@ -2615,7 +3318,7 @@
2615	3318	u8 test_mask = 0;
2616	3319	int rc = 0, i;
2617	3320
2618		- if (!bp->num_tests \|\| !BNXT_SINGLE_PF(bp))
	3321	+ if (!bp->num_tests \|\| !BNXT_PF(bp))
2619	3322	return;
2620	3323	memset(buf, 0, sizeof(u64) * bp->num_tests);
2621	3324	if (!netif_running(dev)) {
..	..	@@ -2628,9 +3331,9 @@
2628	3331	do_ext_lpbk = true;
2629	3332
2630	3333	if (etest->flags & ETH_TEST_FL_OFFLINE) {
2631		- if (bp->pf.active_vfs) {
	3334	+ if (bp->pf.active_vfs \|\| !BNXT_SINGLE_PF(bp)) {
2632	3335	etest->flags \|= ETH_TEST_FL_FAILED;
2633		- netdev_warn(dev, "Offline tests cannot be run with active VFs\n");
	3336	+ netdev_warn(dev, "Offline tests cannot be run with active VFs or on shared PF\n");
2634	3337	return;
2635	3338	}
2636	3339	offline = true;
..	..	@@ -2703,44 +3406,55 @@
2703	3406	static int bnxt_reset(struct net_device dev, u32 flags)
2704	3407	{
2705	3408	struct bnxt *bp = netdev_priv(dev);
2706		- int rc = 0;
	3409	+ bool reload = false;
	3410	+ u32 req = *flags;
	3411	+
	3412	+ if (!req)
	3413	+ return -EINVAL;
2707	3414
2708	3415	if (!BNXT_PF(bp)) {
2709	3416	netdev_err(dev, "Reset is not supported from a VF\n");
2710	3417	return -EOPNOTSUPP;
2711	3418	}
2712	3419
2713		- if (pci_vfs_assigned(bp->pdev)) {
	3420	+ if (pci_vfs_assigned(bp->pdev) &&
	3421	+ !(bp->fw_cap & BNXT_FW_CAP_HOT_RESET)) {
2714	3422	netdev_err(dev,
2715	3423	"Reset not allowed when VFs are assigned to VMs\n");
2716	3424	return -EBUSY;
2717	3425	}
2718	3426
2719		- if (*flags == ETH_RESET_ALL) {
	3427	+ if ((req & BNXT_FW_RESET_CHIP) == BNXT_FW_RESET_CHIP) {
2720	3428	/* This feature is not supported in older firmware versions */
2721		- if (bp->hwrm_spec_code < 0x10803)
2722		- return -EOPNOTSUPP;
2723		-
2724		- rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_CHIP);
2725		- if (!rc) {
2726		- netdev_info(dev, "Reset request successful. Reload driver to complete reset\n");
2727		- *flags = 0;
	3429	+ if (bp->hwrm_spec_code >= 0x10803) {
	3430	+ if (!bnxt_firmware_reset_chip(dev)) {
	3431	+ netdev_info(dev, "Firmware reset request successful.\n");
	3432	+ if (!(bp->fw_cap & BNXT_FW_CAP_HOT_RESET))
	3433	+ reload = true;
	3434	+ *flags &= ~BNXT_FW_RESET_CHIP;
	3435	+ }
	3436	+ } else if (req == BNXT_FW_RESET_CHIP) {
	3437	+ return -EOPNOTSUPP; /* only request, fail hard */
2728	3438	}
2729		- } else if (*flags == ETH_RESET_AP) {
2730		- /* This feature is not supported in older firmware versions */
2731		- if (bp->hwrm_spec_code < 0x10803)
2732		- return -EOPNOTSUPP;
2733		-
2734		- rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_AP);
2735		- if (!rc) {
2736		- netdev_info(dev, "Reset Application Processor request successful.\n");
2737		- *flags = 0;
2738		- }
2739		- } else {
2740		- rc = -EINVAL;
2741	3439	}
2742	3440
2743		- return rc;
	3441	+ if (req & BNXT_FW_RESET_AP) {
	3442	+ /* This feature is not supported in older firmware versions */
	3443	+ if (bp->hwrm_spec_code >= 0x10803) {
	3444	+ if (!bnxt_firmware_reset_ap(dev)) {
	3445	+ netdev_info(dev, "Reset application processor successful.\n");
	3446	+ reload = true;
	3447	+ *flags &= ~BNXT_FW_RESET_AP;
	3448	+ }
	3449	+ } else if (req == BNXT_FW_RESET_AP) {
	3450	+ return -EOPNOTSUPP; /* only request, fail hard */
	3451	+ }
	3452	+ }
	3453	+
	3454	+ if (reload)
	3455	+ netdev_info(dev, "Reload driver to complete reset\n");
	3456	+
	3457	+ return 0;
2744	3458	}
2745	3459
2746	3460	static int bnxt_hwrm_dbg_dma_data(struct bnxt bp, void msg, int msg_len,
..	..	@@ -2767,7 +3481,8 @@
2767	3481	mutex_lock(&bp->hwrm_cmd_lock);
2768	3482	while (1) {
2769	3483	*seq_ptr = cpu_to_le16(seq);
2770		- rc = _hwrm_send_message(bp, msg, msg_len, HWRM_CMD_TIMEOUT);
	3484	+ rc = _hwrm_send_message(bp, msg, msg_len,
	3485	+ HWRM_COREDUMP_TIMEOUT);
2771	3486	if (rc)
2772	3487	break;
2773	3488
..	..	@@ -3058,8 +3773,26 @@
3058	3773	kfree(coredump.data);
3059	3774	*dump_len += sizeof(struct bnxt_coredump_record);
3060	3775	if (rc == -ENOBUFS)
3061		- netdev_err(bp->dev, "Firmware returned large coredump buffer");
	3776	+ netdev_err(bp->dev, "Firmware returned large coredump buffer\n");
3062	3777	return rc;
	3778	+}
	3779	+
	3780	+static int bnxt_set_dump(struct net_device dev, struct ethtool_dump dump)
	3781	+{
	3782	+ struct bnxt *bp = netdev_priv(dev);
	3783	+
	3784	+ if (dump->flag > BNXT_DUMP_CRASH) {
	3785	+ netdev_info(dev, "Supports only Live(0) and Crash(1) dumps.\n");
	3786	+ return -EINVAL;
	3787	+ }
	3788	+
	3789	+ if (!IS_ENABLED(CONFIG_TEE_BNXT_FW) && dump->flag == BNXT_DUMP_CRASH) {
	3790	+ netdev_info(dev, "Cannot collect crash dump as TEE_BNXT_FW config option is not enabled.\n");
	3791	+ return -EOPNOTSUPP;
	3792	+ }
	3793	+
	3794	+ bp->dump_flag = dump->flag;
	3795	+ return 0;
3063	3796	}
3064	3797
3065	3798	static int bnxt_get_dump_flag(struct net_device dev, struct ethtool_dump dump)
..	..	@@ -3074,7 +3807,12 @@
3074	3807	bp->ver_resp.hwrm_fw_bld_8b << 8 \|
3075	3808	bp->ver_resp.hwrm_fw_rsvd_8b;
3076	3809
3077		- return bnxt_get_coredump(bp, NULL, &dump->len);
	3810	+ dump->flag = bp->dump_flag;
	3811	+ if (bp->dump_flag == BNXT_DUMP_CRASH)
	3812	+ dump->len = BNXT_CRASH_DUMP_LEN;
	3813	+ else
	3814	+ bnxt_get_coredump(bp, NULL, &dump->len);
	3815	+ return 0;
3078	3816	}
3079	3817
3080	3818	static int bnxt_get_dump_data(struct net_device dev, struct ethtool_dump dump,
..	..	@@ -3087,7 +3825,16 @@
3087	3825
3088	3826	memset(buf, 0, dump->len);
3089	3827
3090		- return bnxt_get_coredump(bp, buf, &dump->len);
	3828	+ dump->flag = bp->dump_flag;
	3829	+ if (dump->flag == BNXT_DUMP_CRASH) {
	3830	+#ifdef CONFIG_TEE_BNXT_FW
	3831	+ return tee_bnxt_copy_coredump(buf, 0, dump->len);
	3832	+#endif
	3833	+ } else {
	3834	+ return bnxt_get_coredump(bp, buf, &dump->len);
	3835	+ }
	3836	+
	3837	+ return 0;
3091	3838	}
3092	3839
3093	3840	void bnxt_ethtool_init(struct bnxt *bp)
..	..	@@ -3098,9 +3845,11 @@
3098	3845	struct net_device *dev = bp->dev;
3099	3846	int i, rc;
3100	3847
3101		- bnxt_get_pkgver(dev);
	3848	+ if (!(bp->fw_cap & BNXT_FW_CAP_PKG_VER))
	3849	+ bnxt_get_pkgver(dev);
3102	3850
3103		- if (bp->hwrm_spec_code < 0x10704 \|\| !BNXT_SINGLE_PF(bp))
	3851	+ bp->num_tests = 0;
	3852	+ if (bp->hwrm_spec_code < 0x10704 \|\| !BNXT_PF(bp))
3104	3853	return;
3105	3854
3106	3855	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1);
..	..	@@ -3109,7 +3858,9 @@
3109	3858	if (rc)
3110	3859	goto ethtool_init_exit;
3111	3860
3112		- test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
	3861	+ test_info = bp->test_info;
	3862	+ if (!test_info)
	3863	+ test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
3113	3864	if (!test_info)
3114	3865	goto ethtool_init_exit;
3115	3866
..	..	@@ -3157,11 +3908,22 @@
3157	3908	}
3158	3909
3159	3910	const struct ethtool_ops bnxt_ethtool_ops = {
	3911	+ .supported_coalesce_params = ETHTOOL_COALESCE_USECS \|
	3912	+ ETHTOOL_COALESCE_MAX_FRAMES \|
	3913	+ ETHTOOL_COALESCE_USECS_IRQ \|
	3914	+ ETHTOOL_COALESCE_MAX_FRAMES_IRQ \|
	3915	+ ETHTOOL_COALESCE_STATS_BLOCK_USECS \|
	3916	+ ETHTOOL_COALESCE_USE_ADAPTIVE_RX,
3160	3917	.get_link_ksettings = bnxt_get_link_ksettings,
3161	3918	.set_link_ksettings = bnxt_set_link_ksettings,
	3919	+ .get_fecparam = bnxt_get_fecparam,
	3920	+ .set_fecparam = bnxt_set_fecparam,
	3921	+ .get_pause_stats = bnxt_get_pause_stats,
3162	3922	.get_pauseparam = bnxt_get_pauseparam,
3163	3923	.set_pauseparam = bnxt_set_pauseparam,
3164	3924	.get_drvinfo = bnxt_get_drvinfo,
	3925	+ .get_regs_len = bnxt_get_regs_len,
	3926	+ .get_regs = bnxt_get_regs,
3165	3927	.get_wol = bnxt_get_wol,
3166	3928	.set_wol = bnxt_set_wol,
3167	3929	.get_coalesce = bnxt_get_coalesce,
..	..	@@ -3180,6 +3942,7 @@
3180	3942	.get_rxfh_indir_size = bnxt_get_rxfh_indir_size,
3181	3943	.get_rxfh_key_size = bnxt_get_rxfh_key_size,
3182	3944	.get_rxfh = bnxt_get_rxfh,
	3945	+ .set_rxfh = bnxt_set_rxfh,
3183	3946	.flash_device = bnxt_flash_device,
3184	3947	.get_eeprom_len = bnxt_get_eeprom_len,
3185	3948	.get_eeprom = bnxt_get_eeprom,
..	..	@@ -3193,6 +3956,7 @@
3193	3956	.set_phys_id = bnxt_set_phys_id,
3194	3957	.self_test = bnxt_self_test,
3195	3958	.reset = bnxt_reset,
	3959	+ .set_dump = bnxt_set_dump,
3196	3960	.get_dump_flag = bnxt_get_dump_flag,
3197	3961	.get_dump_data = bnxt_get_dump_data,
3198	3962	};