add dts config

hc

2023-12-06 08f87f769b595151be1afeff53e144f543faa614

 kernel/drivers/gpu/drm/nouveau/nouveau_dma.h
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@@ -45,17 +45,6 @@
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  */
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 #define NOUVEAU_DMA_SKIPS (128 / 4)
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-/* Hardcoded object assignments to subchannels (subchannel id). */
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-enum {
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-	NvSubCtxSurf2D  = 0,
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-	NvSubSw		= 1,
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-	NvSubImageBlit  = 2,
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-	NvSubGdiRect    = 3,
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-
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-	NvSub2D		= 3, /* DO NOT CHANGE - hardcoded for kepler gr fifo */
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-	NvSubCopy	= 4, /* DO NOT CHANGE - hardcoded for kepler gr fifo */
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-};
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-
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 /* Object handles - for stuff that's doesn't use handle == oclass. */
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 enum {
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 	NvDmaFB		= 0x80000002,
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@@ -65,23 +54,6 @@
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 	NvEvoSema0	= 0x80000010,
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 	NvEvoSema1	= 0x80000011,
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 };
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-
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-#define NV_MEMORY_TO_MEMORY_FORMAT                                    0x00000039
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-#define NV_MEMORY_TO_MEMORY_FORMAT_NAME                               0x00000000
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-#define NV_MEMORY_TO_MEMORY_FORMAT_SET_REF                            0x00000050
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-#define NV_MEMORY_TO_MEMORY_FORMAT_NOP                                0x00000100
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-#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY                             0x00000104
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-#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY_STYLE_WRITE                 0x00000000
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-#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY_STYLE_WRITE_LE_AWAKEN       0x00000001
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-#define NV_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY                         0x00000180
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-#define NV_MEMORY_TO_MEMORY_FORMAT_DMA_SOURCE                         0x00000184
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-#define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN                          0x0000030c
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-
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-#define NV50_MEMORY_TO_MEMORY_FORMAT                                  0x00005039
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-#define NV50_MEMORY_TO_MEMORY_FORMAT_UNK200                           0x00000200
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-#define NV50_MEMORY_TO_MEMORY_FORMAT_UNK21C                           0x0000021c
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-#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN_HIGH                   0x00000238
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-#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT_HIGH                  0x0000023c
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 static __must_check inline int
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 RING_SPACE(struct nouveau_channel *chan, int size)
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@@ -100,39 +72,6 @@
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 OUT_RING(struct nouveau_channel *chan, int data)
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 {
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 	nouveau_bo_wr32(chan->push.buffer, chan->dma.cur++, data);
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-}
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-
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-extern void
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-OUT_RINGp(struct nouveau_channel *chan, const void *data, unsigned nr_dwords);
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-
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-static inline void
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-BEGIN_NV04(struct nouveau_channel *chan, int subc, int mthd, int size)
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-{
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-	OUT_RING(chan, 0x00000000 | (subc << 13) | (size << 18) | mthd);
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-}
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-
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-static inline void
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-BEGIN_NI04(struct nouveau_channel *chan, int subc, int mthd, int size)
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-{
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-	OUT_RING(chan, 0x40000000 | (subc << 13) | (size << 18) | mthd);
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-}
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-
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-static inline void
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-BEGIN_NVC0(struct nouveau_channel *chan, int subc, int mthd, int size)
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-{
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-	OUT_RING(chan, 0x20000000 | (size << 16) | (subc << 13) | (mthd >> 2));
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-}
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-
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-static inline void
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-BEGIN_NIC0(struct nouveau_channel *chan, int subc, int mthd, int size)
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-{
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-	OUT_RING(chan, 0x60000000 | (size << 16) | (subc << 13) | (mthd >> 2));
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-}
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-
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-static inline void
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-BEGIN_IMC0(struct nouveau_channel *chan, int subc, int mthd, u16 data)
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-{
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-	OUT_RING(chan, 0x80000000 | (data << 16) | (subc << 13) | (mthd >> 2));
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 }
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 #define WRITE_PUT(val) do {                                                    \
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@@ -163,25 +102,6 @@
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 {
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 	chan->dma.cur = chan->dma.put;
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 }
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-
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-/* FIFO methods */
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-#define NV01_SUBCHAN_OBJECT                                          0x00000000
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-#define NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH                          0x00000010
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-#define NV84_SUBCHAN_SEMAPHORE_ADDRESS_LOW                           0x00000014
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-#define NV84_SUBCHAN_SEMAPHORE_SEQUENCE                              0x00000018
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-#define NV84_SUBCHAN_SEMAPHORE_TRIGGER                               0x0000001c
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-#define NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_EQUAL                 0x00000001
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-#define NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG                    0x00000002
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-#define NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_GEQUAL                0x00000004
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-#define NVC0_SUBCHAN_SEMAPHORE_TRIGGER_YIELD                         0x00001000
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-#define NV84_SUBCHAN_UEVENT                                          0x00000020
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-#define NV84_SUBCHAN_WRCACHE_FLUSH                                   0x00000024
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-#define NV10_SUBCHAN_REF_CNT                                         0x00000050
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-#define NV11_SUBCHAN_DMA_SEMAPHORE                                   0x00000060
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-#define NV11_SUBCHAN_SEMAPHORE_OFFSET                                0x00000064
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-#define NV11_SUBCHAN_SEMAPHORE_ACQUIRE                               0x00000068
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-#define NV11_SUBCHAN_SEMAPHORE_RELEASE                               0x0000006c
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-#define NV40_SUBCHAN_YIELD                                           0x00000080
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 /* NV_SW object class */
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 #define NV_SW_DMA_VBLSEM                                             0x0000018c