forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-12-06 08f87f769b595151be1afeff53e144f543faa614
kernel/drivers/gpu/drm/nouveau/dispnv50/atom.h
....@@ -2,6 +2,9 @@
22 #define __NV50_KMS_ATOM_H__
33 #define nv50_atom(p) container_of((p), struct nv50_atom, state)
44 #include <drm/drm_atomic.h>
5
+#include "crc.h"
6
+
7
+struct nouveau_encoder;
58
69 struct nv50_atom {
710 struct drm_atomic_state state;
....@@ -18,6 +21,7 @@
1821
1922 struct {
2023 u32 mask;
24
+ u32 owned;
2125 u32 olut;
2226 } wndw;
2327
....@@ -54,9 +58,10 @@
5458 u64 offset:40;
5559 u8 buffer:1;
5660 u8 mode:4;
57
- u8 size:2;
61
+ u16 size:11;
5862 u8 range:2;
5963 u8 output_mode:2;
64
+ void (*load)(struct drm_color_lut *, int size, void __iomem *);
6065 } olut;
6166
6267 struct {
....@@ -113,7 +118,17 @@
113118 u8 nhsync:1;
114119 u8 nvsync:1;
115120 u8 depth:4;
121
+ u8 crc_raster:2;
122
+ u8 bpc;
116123 } or;
124
+
125
+ struct nv50_crc_atom crc;
126
+
127
+ /* Currently only used for MST */
128
+ struct {
129
+ int pbn;
130
+ u8 tu:6;
131
+ } dp;
117132
118133 union nv50_head_atom_mask {
119134 struct {
....@@ -126,6 +141,7 @@
126141 bool ovly:1;
127142 bool dither:1;
128143 bool procamp:1;
144
+ bool crc:1;
129145 bool or:1;
130146 };
131147 u16 mask;
....@@ -139,6 +155,19 @@
139155 if (IS_ERR(statec))
140156 return (void *)statec;
141157 return nv50_head_atom(statec);
158
+}
159
+
160
+static inline struct drm_encoder *
161
+nv50_head_atom_get_encoder(struct nv50_head_atom *atom)
162
+{
163
+ struct drm_encoder *encoder;
164
+
165
+ /* We only ever have a single encoder */
166
+ drm_for_each_encoder_mask(encoder, atom->state.crtc->dev,
167
+ atom->state.encoder_mask)
168
+ return encoder;
169
+
170
+ return NULL;
142171 }
143172
144173 #define nv50_wndw_atom(p) container_of((p), struct nv50_wndw_atom, state)
....@@ -169,11 +198,18 @@
169198 u8 buffer:1;
170199 u8 enable:2;
171200 u8 mode:4;
172
- u8 size:2;
201
+ u16 size:11;
173202 u8 range:2;
174203 u8 output_mode:2;
204
+ void (*load)(struct drm_color_lut *, int size,
205
+ void __iomem *);
175206 } i;
176207 } xlut;
208
+
209
+ struct {
210
+ u32 matrix[12];
211
+ bool valid;
212
+ } csc;
177213
178214 struct {
179215 u8 mode:2;
....@@ -207,14 +243,23 @@
207243 u16 y;
208244 } point;
209245
246
+ struct {
247
+ u8 depth;
248
+ u8 k1;
249
+ u8 src_color:4;
250
+ u8 dst_color:4;
251
+ } blend;
252
+
210253 union nv50_wndw_atom_mask {
211254 struct {
212255 bool ntfy:1;
213256 bool sema:1;
214257 bool xlut:1;
258
+ bool csc:1;
215259 bool image:1;
216260 bool scale:1;
217261 bool point:1;
262
+ bool blend:1;
218263 };
219264 u8 mask;
220265 } set, clr;