.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * Copyright (c) 2014-2015 The Linux Foundation. All rights reserved. |
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3 | 4 | * Copyright (C) 2013 Red Hat |
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4 | 5 | * Author: Rob Clark <robdclark@gmail.com> |
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5 | | - * |
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6 | | - * This program is free software; you can redistribute it and/or modify it |
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7 | | - * under the terms of the GNU General Public License version 2 as published by |
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8 | | - * the Free Software Foundation. |
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9 | | - * |
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10 | | - * This program is distributed in the hope that it will be useful, but WITHOUT |
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11 | | - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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12 | | - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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13 | | - * more details. |
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14 | | - * |
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15 | | - * You should have received a copy of the GNU General Public License along with |
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16 | | - * this program. If not, see <http://www.gnu.org/licenses/>. |
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17 | 6 | */ |
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18 | 7 | |
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19 | 8 | #include <linux/sort.h> |
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| 9 | + |
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20 | 10 | #include <drm/drm_mode.h> |
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21 | 11 | #include <drm/drm_crtc.h> |
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22 | | -#include <drm/drm_crtc_helper.h> |
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23 | 12 | #include <drm/drm_flip_work.h> |
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| 13 | +#include <drm/drm_fourcc.h> |
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| 14 | +#include <drm/drm_probe_helper.h> |
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| 15 | +#include <drm/drm_vblank.h> |
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24 | 16 | |
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25 | 17 | #include "mdp5_kms.h" |
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26 | 18 | |
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.. | .. |
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173 | 165 | struct mdp5_kms *mdp5_kms = get_kms(&mdp5_crtc->base); |
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174 | 166 | struct msm_kms *kms = &mdp5_kms->base.base; |
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175 | 167 | |
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176 | | - msm_gem_put_iova(val, kms->aspace); |
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177 | | - drm_gem_object_put_unlocked(val); |
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| 168 | + msm_gem_unpin_iova(val, kms->aspace); |
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| 169 | + drm_gem_object_put(val); |
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178 | 170 | } |
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179 | 171 | |
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180 | 172 | static void mdp5_crtc_destroy(struct drm_crtc *crtc) |
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.. | .. |
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222 | 214 | struct mdp5_pipeline *pipeline = &mdp5_cstate->pipeline; |
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223 | 215 | struct mdp5_kms *mdp5_kms = get_kms(crtc); |
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224 | 216 | struct drm_plane *plane; |
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225 | | - const struct mdp5_cfg_hw *hw_cfg; |
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226 | 217 | struct mdp5_plane_state *pstate, *pstates[STAGE_MAX + 1] = {NULL}; |
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227 | 218 | const struct mdp_format *format; |
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228 | 219 | struct mdp5_hw_mixer *mixer = pipeline->mixer; |
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.. | .. |
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239 | 230 | u32 mixer_op_mode = 0; |
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240 | 231 | u32 val; |
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241 | 232 | #define blender(stage) ((stage) - STAGE0) |
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242 | | - |
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243 | | - hw_cfg = mdp5_cfg_get_hw_config(mdp5_kms->cfg); |
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244 | 233 | |
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245 | 234 | spin_lock_irqsave(&mdp5_crtc->lm_lock, flags); |
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246 | 235 | |
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.. | .. |
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384 | 373 | |
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385 | 374 | mode = &crtc->state->adjusted_mode; |
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386 | 375 | |
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387 | | - DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x", |
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388 | | - crtc->name, mode->base.id, mode->name, |
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389 | | - mode->vrefresh, mode->clock, |
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390 | | - mode->hdisplay, mode->hsync_start, |
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391 | | - mode->hsync_end, mode->htotal, |
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392 | | - mode->vdisplay, mode->vsync_start, |
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393 | | - mode->vsync_end, mode->vtotal, |
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394 | | - mode->type, mode->flags); |
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| 376 | + DBG("%s: set mode: " DRM_MODE_FMT, crtc->name, DRM_MODE_ARG(mode)); |
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395 | 377 | |
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396 | 378 | mixer_width = mode->hdisplay; |
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397 | 379 | if (r_mixer) |
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.. | .. |
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421 | 403 | } |
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422 | 404 | |
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423 | 405 | spin_unlock_irqrestore(&mdp5_crtc->lm_lock, flags); |
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| 406 | +} |
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| 407 | + |
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| 408 | +static struct drm_encoder *get_encoder_from_crtc(struct drm_crtc *crtc) |
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| 409 | +{ |
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| 410 | + struct drm_device *dev = crtc->dev; |
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| 411 | + struct drm_encoder *encoder; |
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| 412 | + |
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| 413 | + drm_for_each_encoder(encoder, dev) |
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| 414 | + if (encoder->crtc == crtc) |
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| 415 | + return encoder; |
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| 416 | + |
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| 417 | + return NULL; |
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| 418 | +} |
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| 419 | + |
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| 420 | +static bool mdp5_crtc_get_scanout_position(struct drm_crtc *crtc, |
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| 421 | + bool in_vblank_irq, |
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| 422 | + int *vpos, int *hpos, |
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| 423 | + ktime_t *stime, ktime_t *etime, |
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| 424 | + const struct drm_display_mode *mode) |
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| 425 | +{ |
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| 426 | + unsigned int pipe = crtc->index; |
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| 427 | + struct drm_encoder *encoder; |
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| 428 | + int line, vsw, vbp, vactive_start, vactive_end, vfp_end; |
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| 429 | + |
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| 430 | + |
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| 431 | + encoder = get_encoder_from_crtc(crtc); |
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| 432 | + if (!encoder) { |
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| 433 | + DRM_ERROR("no encoder found for crtc %d\n", pipe); |
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| 434 | + return false; |
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| 435 | + } |
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| 436 | + |
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| 437 | + vsw = mode->crtc_vsync_end - mode->crtc_vsync_start; |
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| 438 | + vbp = mode->crtc_vtotal - mode->crtc_vsync_end; |
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| 439 | + |
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| 440 | + /* |
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| 441 | + * the line counter is 1 at the start of the VSYNC pulse and VTOTAL at |
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| 442 | + * the end of VFP. Translate the porch values relative to the line |
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| 443 | + * counter positions. |
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| 444 | + */ |
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| 445 | + |
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| 446 | + vactive_start = vsw + vbp + 1; |
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| 447 | + |
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| 448 | + vactive_end = vactive_start + mode->crtc_vdisplay; |
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| 449 | + |
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| 450 | + /* last scan line before VSYNC */ |
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| 451 | + vfp_end = mode->crtc_vtotal; |
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| 452 | + |
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| 453 | + if (stime) |
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| 454 | + *stime = ktime_get(); |
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| 455 | + |
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| 456 | + line = mdp5_encoder_get_linecount(encoder); |
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| 457 | + |
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| 458 | + if (line < vactive_start) |
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| 459 | + line -= vactive_start; |
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| 460 | + else if (line > vactive_end) |
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| 461 | + line = line - vfp_end - vactive_start; |
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| 462 | + else |
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| 463 | + line -= vactive_start; |
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| 464 | + |
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| 465 | + *vpos = line; |
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| 466 | + *hpos = 0; |
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| 467 | + |
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| 468 | + if (etime) |
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| 469 | + *etime = ktime_get(); |
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| 470 | + |
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| 471 | + return true; |
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| 472 | +} |
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| 473 | + |
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| 474 | +static u32 mdp5_crtc_get_vblank_counter(struct drm_crtc *crtc) |
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| 475 | +{ |
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| 476 | + struct drm_encoder *encoder; |
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| 477 | + |
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| 478 | + encoder = get_encoder_from_crtc(crtc); |
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| 479 | + if (!encoder) |
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| 480 | + return 0; |
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| 481 | + |
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| 482 | + return mdp5_encoder_get_framecount(encoder); |
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424 | 483 | } |
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425 | 484 | |
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426 | 485 | static void mdp5_crtc_atomic_disable(struct drm_crtc *crtc, |
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.. | .. |
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455 | 514 | } |
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456 | 515 | |
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457 | 516 | mdp5_crtc->enabled = false; |
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| 517 | +} |
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| 518 | + |
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| 519 | +static void mdp5_crtc_vblank_on(struct drm_crtc *crtc) |
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| 520 | +{ |
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| 521 | + struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); |
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| 522 | + struct mdp5_interface *intf = mdp5_cstate->pipeline.intf; |
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| 523 | + u32 count; |
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| 524 | + |
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| 525 | + count = intf->mode == MDP5_INTF_DSI_MODE_COMMAND ? 0 : 0xffffffff; |
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| 526 | + drm_crtc_set_max_vblank_count(crtc, count); |
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| 527 | + |
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| 528 | + drm_crtc_vblank_on(crtc); |
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458 | 529 | } |
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459 | 530 | |
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460 | 531 | static void mdp5_crtc_atomic_enable(struct drm_crtc *crtc, |
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.. | .. |
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493 | 564 | } |
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494 | 565 | |
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495 | 566 | /* Restore vblank irq handling after power is enabled */ |
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496 | | - drm_crtc_vblank_on(crtc); |
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| 567 | + mdp5_crtc_vblank_on(crtc); |
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497 | 568 | |
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498 | 569 | mdp5_crtc_mode_set_nofb(crtc); |
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499 | 570 | |
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.. | .. |
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537 | 608 | if (ret) |
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538 | 609 | return ret; |
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539 | 610 | |
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540 | | - mdp5_mixer_release(new_crtc_state->state, old_mixer); |
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| 611 | + ret = mdp5_mixer_release(new_crtc_state->state, old_mixer); |
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| 612 | + if (ret) |
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| 613 | + return ret; |
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| 614 | + |
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541 | 615 | if (old_r_mixer) { |
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542 | | - mdp5_mixer_release(new_crtc_state->state, old_r_mixer); |
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| 616 | + ret = mdp5_mixer_release(new_crtc_state->state, old_r_mixer); |
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| 617 | + if (ret) |
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| 618 | + return ret; |
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| 619 | + |
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543 | 620 | if (!need_right_mixer) |
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544 | 621 | pipeline->r_mixer = NULL; |
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545 | 622 | } |
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.. | .. |
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662 | 739 | |
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663 | 740 | ret = mdp5_crtc_setup_pipeline(crtc, state, need_right_mixer); |
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664 | 741 | if (ret) { |
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665 | | - dev_err(dev->dev, "couldn't assign mixers %d\n", ret); |
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| 742 | + DRM_DEV_ERROR(dev->dev, "couldn't assign mixers %d\n", ret); |
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666 | 743 | return ret; |
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667 | 744 | } |
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668 | 745 | |
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.. | .. |
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679 | 756 | * and that we don't have conflicting mixer stages: |
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680 | 757 | */ |
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681 | 758 | if ((cnt + start - 1) >= hw_cfg->lm.nb_stages) { |
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682 | | - dev_err(dev->dev, "too many planes! cnt=%d, start stage=%d\n", |
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| 759 | + DRM_DEV_ERROR(dev->dev, "too many planes! cnt=%d, start stage=%d\n", |
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683 | 760 | cnt, start); |
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684 | 761 | return -EINVAL; |
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685 | 762 | } |
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.. | .. |
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789 | 866 | |
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790 | 867 | static void mdp5_crtc_restore_cursor(struct drm_crtc *crtc) |
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791 | 868 | { |
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| 869 | + const struct drm_format_info *info = drm_format_info(DRM_FORMAT_ARGB8888); |
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792 | 870 | struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); |
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793 | 871 | struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc); |
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794 | 872 | struct mdp5_kms *mdp5_kms = get_kms(crtc); |
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.. | .. |
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807 | 885 | width = mdp5_crtc->cursor.width; |
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808 | 886 | height = mdp5_crtc->cursor.height; |
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809 | 887 | |
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810 | | - stride = width * drm_format_plane_cpp(DRM_FORMAT_ARGB8888, 0); |
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| 888 | + stride = width * info->cpp[0]; |
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811 | 889 | |
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812 | 890 | get_roi(crtc, &roi_w, &roi_h); |
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813 | 891 | |
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.. | .. |
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879 | 957 | } |
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880 | 958 | |
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881 | 959 | if ((width > CURSOR_WIDTH) || (height > CURSOR_HEIGHT)) { |
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882 | | - dev_err(dev->dev, "bad cursor size: %dx%d\n", width, height); |
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| 960 | + DRM_DEV_ERROR(dev->dev, "bad cursor size: %dx%d\n", width, height); |
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883 | 961 | return -EINVAL; |
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884 | 962 | } |
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885 | 963 | |
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.. | .. |
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887 | 965 | if (!ctl) |
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888 | 966 | return -EINVAL; |
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889 | 967 | |
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890 | | - /* don't support LM cursors when we we have source split enabled */ |
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| 968 | + /* don't support LM cursors when we have source split enabled */ |
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891 | 969 | if (mdp5_cstate->pipeline.r_mixer) |
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892 | 970 | return -EINVAL; |
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893 | 971 | |
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.. | .. |
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903 | 981 | if (!cursor_bo) |
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904 | 982 | return -ENOENT; |
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905 | 983 | |
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906 | | - ret = msm_gem_get_iova(cursor_bo, kms->aspace, |
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| 984 | + ret = msm_gem_get_and_pin_iova(cursor_bo, kms->aspace, |
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907 | 985 | &mdp5_crtc->cursor.iova); |
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908 | | - if (ret) |
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| 986 | + if (ret) { |
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| 987 | + drm_gem_object_put(cursor_bo); |
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909 | 988 | return -EINVAL; |
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| 989 | + } |
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910 | 990 | |
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911 | 991 | pm_runtime_get_sync(&pdev->dev); |
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912 | 992 | |
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.. | .. |
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924 | 1004 | set_cursor: |
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925 | 1005 | ret = mdp5_ctl_set_cursor(ctl, pipeline, 0, cursor_enable); |
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926 | 1006 | if (ret) { |
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927 | | - dev_err(dev->dev, "failed to %sable cursor: %d\n", |
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| 1007 | + DRM_DEV_ERROR(dev->dev, "failed to %sable cursor: %d\n", |
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928 | 1008 | cursor_enable ? "en" : "dis", ret); |
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929 | 1009 | goto end; |
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930 | 1010 | } |
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.. | .. |
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958 | 1038 | return -EINVAL; |
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959 | 1039 | } |
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960 | 1040 | |
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961 | | - /* don't support LM cursors when we we have source split enabled */ |
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| 1041 | + /* don't support LM cursors when we have source split enabled */ |
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962 | 1042 | if (mdp5_cstate->pipeline.r_mixer) |
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963 | 1043 | return -EINVAL; |
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964 | 1044 | |
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.. | .. |
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1009 | 1089 | drm_printf(p, "\tcmd_mode=%d\n", mdp5_cstate->cmd_mode); |
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1010 | 1090 | } |
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1011 | 1091 | |
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1012 | | -static void mdp5_crtc_reset(struct drm_crtc *crtc) |
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1013 | | -{ |
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1014 | | - struct mdp5_crtc_state *mdp5_cstate; |
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1015 | | - |
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1016 | | - if (crtc->state) { |
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1017 | | - __drm_atomic_helper_crtc_destroy_state(crtc->state); |
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1018 | | - kfree(to_mdp5_crtc_state(crtc->state)); |
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1019 | | - } |
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1020 | | - |
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1021 | | - mdp5_cstate = kzalloc(sizeof(*mdp5_cstate), GFP_KERNEL); |
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1022 | | - |
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1023 | | - if (mdp5_cstate) { |
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1024 | | - mdp5_cstate->base.crtc = crtc; |
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1025 | | - crtc->state = &mdp5_cstate->base; |
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1026 | | - } |
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1027 | | -} |
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1028 | | - |
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1029 | 1092 | static struct drm_crtc_state * |
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1030 | 1093 | mdp5_crtc_duplicate_state(struct drm_crtc *crtc) |
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1031 | 1094 | { |
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.. | .. |
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1053 | 1116 | kfree(mdp5_cstate); |
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1054 | 1117 | } |
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1055 | 1118 | |
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| 1119 | +static void mdp5_crtc_reset(struct drm_crtc *crtc) |
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| 1120 | +{ |
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| 1121 | + struct mdp5_crtc_state *mdp5_cstate = |
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| 1122 | + kzalloc(sizeof(*mdp5_cstate), GFP_KERNEL); |
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| 1123 | + |
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| 1124 | + if (crtc->state) |
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| 1125 | + mdp5_crtc_destroy_state(crtc, crtc->state); |
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| 1126 | + |
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| 1127 | + __drm_atomic_helper_crtc_reset(crtc, &mdp5_cstate->base); |
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| 1128 | +} |
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| 1129 | + |
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| 1130 | +static const struct drm_crtc_funcs mdp5_crtc_no_lm_cursor_funcs = { |
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| 1131 | + .set_config = drm_atomic_helper_set_config, |
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| 1132 | + .destroy = mdp5_crtc_destroy, |
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| 1133 | + .page_flip = drm_atomic_helper_page_flip, |
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| 1134 | + .reset = mdp5_crtc_reset, |
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| 1135 | + .atomic_duplicate_state = mdp5_crtc_duplicate_state, |
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| 1136 | + .atomic_destroy_state = mdp5_crtc_destroy_state, |
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| 1137 | + .atomic_print_state = mdp5_crtc_atomic_print_state, |
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| 1138 | + .get_vblank_counter = mdp5_crtc_get_vblank_counter, |
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| 1139 | + .enable_vblank = msm_crtc_enable_vblank, |
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| 1140 | + .disable_vblank = msm_crtc_disable_vblank, |
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| 1141 | + .get_vblank_timestamp = drm_crtc_vblank_helper_get_vblank_timestamp, |
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| 1142 | +}; |
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| 1143 | + |
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1056 | 1144 | static const struct drm_crtc_funcs mdp5_crtc_funcs = { |
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1057 | 1145 | .set_config = drm_atomic_helper_set_config, |
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1058 | 1146 | .destroy = mdp5_crtc_destroy, |
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.. | .. |
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1063 | 1151 | .cursor_set = mdp5_crtc_cursor_set, |
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1064 | 1152 | .cursor_move = mdp5_crtc_cursor_move, |
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1065 | 1153 | .atomic_print_state = mdp5_crtc_atomic_print_state, |
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| 1154 | + .get_vblank_counter = mdp5_crtc_get_vblank_counter, |
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| 1155 | + .enable_vblank = msm_crtc_enable_vblank, |
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| 1156 | + .disable_vblank = msm_crtc_disable_vblank, |
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| 1157 | + .get_vblank_timestamp = drm_crtc_vblank_helper_get_vblank_timestamp, |
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1066 | 1158 | }; |
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1067 | 1159 | |
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1068 | 1160 | static const struct drm_crtc_helper_funcs mdp5_crtc_helper_funcs = { |
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.. | .. |
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1072 | 1164 | .atomic_flush = mdp5_crtc_atomic_flush, |
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1073 | 1165 | .atomic_enable = mdp5_crtc_atomic_enable, |
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1074 | 1166 | .atomic_disable = mdp5_crtc_atomic_disable, |
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| 1167 | + .get_scanout_position = mdp5_crtc_get_scanout_position, |
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1075 | 1168 | }; |
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1076 | 1169 | |
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1077 | 1170 | static void mdp5_crtc_vblank_irq(struct mdp_irq *irq, uint32_t irqstatus) |
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.. | .. |
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1105 | 1198 | struct mdp5_crtc *mdp5_crtc = container_of(irq, struct mdp5_crtc, |
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1106 | 1199 | pp_done); |
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1107 | 1200 | |
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1108 | | - complete(&mdp5_crtc->pp_completion); |
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| 1201 | + complete_all(&mdp5_crtc->pp_completion); |
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1109 | 1202 | } |
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1110 | 1203 | |
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1111 | 1204 | static void mdp5_crtc_wait_for_pp_done(struct drm_crtc *crtc) |
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.. | .. |
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1236 | 1329 | mdp5_crtc->lm_cursor_enabled = cursor_plane ? false : true; |
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1237 | 1330 | |
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1238 | 1331 | drm_crtc_init_with_planes(dev, crtc, plane, cursor_plane, |
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| 1332 | + cursor_plane ? |
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| 1333 | + &mdp5_crtc_no_lm_cursor_funcs : |
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1239 | 1334 | &mdp5_crtc_funcs, NULL); |
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1240 | 1335 | |
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1241 | 1336 | drm_flip_work_init(&mdp5_crtc->unref_cursor_work, |
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