forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-12-06 08f87f769b595151be1afeff53e144f543faa614
kernel/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
....@@ -1,13 +1,5 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
2
- *
3
- * This program is free software; you can redistribute it and/or modify
4
- * it under the terms of the GNU General Public License version 2 and
5
- * only version 2 as published by the Free Software Foundation.
6
- *
7
- * This program is distributed in the hope that it will be useful,
8
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
9
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10
- * GNU General Public License for more details.
113 */
124
135 #include "dpu_kms.h"
....@@ -15,8 +7,6 @@
157 #include "dpu_hwio.h"
168 #include "dpu_hw_lm.h"
179 #include "dpu_hw_mdss.h"
18
-#include "dpu_dbg.h"
19
-#include "dpu_kms.h"
2010
2111 #define LM_OP_MODE 0x00
2212 #define LM_OUT_SIZE 0x04
....@@ -34,11 +24,8 @@
3424 #define LM_BLEND0_FG_ALPHA 0x04
3525 #define LM_BLEND0_BG_ALPHA 0x08
3626
37
-#define LM_MISR_CTRL 0x310
38
-#define LM_MISR_SIGNATURE 0x314
39
-
40
-static struct dpu_lm_cfg *_lm_offset(enum dpu_lm mixer,
41
- struct dpu_mdss_cfg *m,
27
+static const struct dpu_lm_cfg *_lm_offset(enum dpu_lm mixer,
28
+ const struct dpu_mdss_cfg *m,
4229 void __iomem *addr,
4330 struct dpu_hw_blk_reg_map *b)
4431 {
....@@ -67,16 +54,10 @@
6754 static inline int _stage_offset(struct dpu_hw_mixer *ctx, enum dpu_stage stage)
6855 {
6956 const struct dpu_lm_sub_blks *sblk = ctx->cap->sblk;
70
- int rc;
57
+ if (stage != DPU_STAGE_BASE && stage <= sblk->maxblendstages)
58
+ return sblk->blendstage_base[stage - DPU_STAGE_0];
7159
72
- if (stage == DPU_STAGE_BASE)
73
- rc = -EINVAL;
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- else if (stage <= sblk->maxblendstages)
75
- rc = sblk->blendstage_base[stage - DPU_STAGE_0];
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- else
77
- rc = -EINVAL;
78
-
79
- return rc;
60
+ return -EINVAL;
8061 }
8162
8263 static void dpu_hw_lm_setup_out(struct dpu_hw_mixer *ctx,
....@@ -166,63 +147,27 @@
166147 DPU_REG_WRITE(c, LM_OP_MODE, op_mode);
167148 }
168149
169
-static void dpu_hw_lm_gc(struct dpu_hw_mixer *mixer,
170
- void *cfg)
171
-{
172
-}
173
-
174
-static void dpu_hw_lm_setup_misr(struct dpu_hw_mixer *ctx,
175
- bool enable, u32 frame_count)
176
-{
177
- struct dpu_hw_blk_reg_map *c = &ctx->hw;
178
- u32 config = 0;
179
-
180
- DPU_REG_WRITE(c, LM_MISR_CTRL, MISR_CTRL_STATUS_CLEAR);
181
- /* clear misr data */
182
- wmb();
183
-
184
- if (enable)
185
- config = (frame_count & MISR_FRAME_COUNT_MASK) |
186
- MISR_CTRL_ENABLE | INTF_MISR_CTRL_FREE_RUN_MASK;
187
-
188
- DPU_REG_WRITE(c, LM_MISR_CTRL, config);
189
-}
190
-
191
-static u32 dpu_hw_lm_collect_misr(struct dpu_hw_mixer *ctx)
192
-{
193
- struct dpu_hw_blk_reg_map *c = &ctx->hw;
194
-
195
- return DPU_REG_READ(c, LM_MISR_SIGNATURE);
196
-}
197
-
198
-static void _setup_mixer_ops(struct dpu_mdss_cfg *m,
150
+static void _setup_mixer_ops(const struct dpu_mdss_cfg *m,
199151 struct dpu_hw_lm_ops *ops,
200152 unsigned long features)
201153 {
202154 ops->setup_mixer_out = dpu_hw_lm_setup_out;
203
- if (IS_SDM845_TARGET(m->hwversion) || IS_SDM670_TARGET(m->hwversion))
155
+ if (m->hwversion >= DPU_HW_VER_400)
204156 ops->setup_blend_config = dpu_hw_lm_setup_blend_config_sdm845;
205157 else
206158 ops->setup_blend_config = dpu_hw_lm_setup_blend_config;
207159 ops->setup_alpha_out = dpu_hw_lm_setup_color3;
208160 ops->setup_border_color = dpu_hw_lm_setup_border_color;
209
- ops->setup_gc = dpu_hw_lm_gc;
210
- ops->setup_misr = dpu_hw_lm_setup_misr;
211
- ops->collect_misr = dpu_hw_lm_collect_misr;
212
-};
161
+}
213162
214
-static struct dpu_hw_blk_ops dpu_hw_ops = {
215
- .start = NULL,
216
- .stop = NULL,
217
-};
163
+static struct dpu_hw_blk_ops dpu_hw_ops;
218164
219165 struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
220166 void __iomem *addr,
221
- struct dpu_mdss_cfg *m)
167
+ const struct dpu_mdss_cfg *m)
222168 {
223169 struct dpu_hw_mixer *c;
224
- struct dpu_lm_cfg *cfg;
225
- int rc;
170
+ const struct dpu_lm_cfg *cfg;
226171
227172 c = kzalloc(sizeof(*c), GFP_KERNEL);
228173 if (!c)
....@@ -239,18 +184,9 @@
239184 c->cap = cfg;
240185 _setup_mixer_ops(m, &c->ops, c->cap->features);
241186
242
- rc = dpu_hw_blk_init(&c->base, DPU_HW_BLK_LM, idx, &dpu_hw_ops);
243
- if (rc) {
244
- DPU_ERROR("failed to init hw blk %d\n", rc);
245
- goto blk_init_error;
246
- }
187
+ dpu_hw_blk_init(&c->base, DPU_HW_BLK_LM, idx, &dpu_hw_ops);
247188
248189 return c;
249
-
250
-blk_init_error:
251
- kzfree(c);
252
-
253
- return ERR_PTR(rc);
254190 }
255191
256192 void dpu_hw_lm_destroy(struct dpu_hw_mixer *lm)