add dts config

hc

2023-12-06 08f87f769b595151be1afeff53e144f543faa614

 kernel/drivers/gpu/drm/bridge/rk630-tve.c
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@@ -15,7 +15,7 @@
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 #include <drm/drm_atomic_helper.h>
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 #include <drm/drm_crtc_helper.h>
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 #include <drm/drm_of.h>
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-#include <drm/drmP.h>
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+#include <drm/drm_probe_helper.h>
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 #include "../rockchip/rockchip_drm_drv.h"
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21
 
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@@ -24,12 +24,12 @@
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 		   816, 864, 0, 576, 580, 586, 625, 0,
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 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
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 		   DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
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-		   .vrefresh = 50, 0, },
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+		   0, },
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 	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 753,
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 		   815, 858, 0, 480, 483, 489, 525, 0,
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 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
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 		   DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
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-		   .vrefresh = 60, 0, },
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+		   0, },
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 };
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34
 
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 struct rk630_tve {
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@@ -59,6 +59,7 @@
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 };
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60
 
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 static struct env_config ntsc_bt656_config[] = {
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+	{ BT656_DECODER_CTRL, 0x00000001 },
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 	{ BT656_DECODER_CROP, 0x00000000 },
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 	{ BT656_DECODER_SIZE, 0x01e002d0 },
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 	{ BT656_DECODER_HTOTAL_HS_END, 0x035a003e },
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@@ -66,7 +67,6 @@
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 	{ BT656_DECODER_VTOTAL_VS_END, 0x020d0003 },
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 	{ BT656_DECODER_VS_ST_END_F1, 0x01060109 },
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 	{ BT656_DECODER_DBG_REG, 0x024002d0 },
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-	{ BT656_DECODER_CTRL, 0x00000001 },
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 };
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 static struct env_config ntsc_tve_config[] = {
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@@ -100,6 +100,7 @@
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 };
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 static struct env_config pal_bt656_config[] = {
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+	{ BT656_DECODER_CTRL, 0x00000001 },
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 	{ BT656_DECODER_CROP, 0x00000000 },
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 	{ BT656_DECODER_SIZE, 0x024002d0 },
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 	{ BT656_DECODER_HTOTAL_HS_END, 0x0360003f },
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@@ -107,7 +108,6 @@
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 	{ BT656_DECODER_VTOTAL_VS_END, 0x02710003 },
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 	{ BT656_DECODER_VS_ST_END_F1, 0x0138013b },
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 	{ BT656_DECODER_DBG_REG, 0x024002d0 },
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-	{ BT656_DECODER_CTRL, 0x00000001 },
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 };
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 static struct env_config pal_tve_config[] = {
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@@ -125,16 +125,16 @@
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 	{ TVE_LUMA_FILTER7, 0x0ffa0e43 },
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 	{ TVE_LUMA_FILTER8, 0x08200527 },
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 	{ TVE_IMAGE_POSITION, 0x001500f6 },
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-	{ TVE_ROUTING, 0x10008882 },
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+	{ TVE_ROUTING, 0x1000088a },
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 	{ TVE_SYNC_ADJUST, 0x00000000 },
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 	{ TVE_STATUS, 0x000000b0 },
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 	{ TVE_CTRL, 0x00000000 },
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 	{ TVE_INTR_STATUS, 0x00000000 },
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 	{ TVE_INTR_EN, 0x00000000 },
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 	{ TVE_INTR_CLR, 0x00000000 },
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-	{ TVE_COLOR_BUSRT_SAT, 0x00366044 },
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+	{ TVE_COLOR_BUSRT_SAT, 0x002e553c },
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 	{ TVE_CHROMA_BANDWIDTH, 0x00000022 },
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-	{ TVE_BRIGHTNESS_CONTRAST, 0x0000a300 },
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+	{ TVE_BRIGHTNESS_CONTRAST, 0x00008900 },
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 	{ TVE_ID, 0x0a010000 },
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 	{ TVE_REVISION, 0x00010108 },
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 	{ TVE_CLAMP, 0x00000000 },
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@@ -164,6 +164,7 @@
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 	.val_format_endian = REGMAP_ENDIAN_NATIVE,
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 	.rd_table = &rk630_tve_readable_table,
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 };
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+EXPORT_SYMBOL_GPL(rk630_tve_regmap_config);
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 static struct rk630_tve *bridge_to_tve(struct drm_bridge *bridge)
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 {
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@@ -194,7 +195,6 @@
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 {
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 	int ret;
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 	struct env_config *bt656_cfg, *tve_cfg;
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-	int upsample_en = tve->is_4x ? 1 : 0;
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 	switch (tve->mode) {
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 	case CVBS_PAL:
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@@ -225,7 +225,7 @@
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 				   SW_DCLK_UPSAMPLE_EN_MASK |
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 				   SW_TVE_MODE_MASK | SW_TVE_EN_MASK,
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 				   SW_TVE_DCLK_POL(0) | SW_TVE_DCLK_EN(1) |
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-				   SW_DCLK_UPSAMPLE_EN(upsample_en) |
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+				   SW_DCLK_UPSAMPLE_EN(tve->is_4x) |
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 				   SW_TVE_MODE(1) | SW_TVE_EN(1));
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 	else
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 		regmap_update_bits(tve->grf, PLUMAGE_GRF_SOC_CON0,
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@@ -234,12 +234,8 @@
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 				   SW_DCLK_UPSAMPLE_EN_MASK |
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 				   SW_TVE_MODE_MASK | SW_TVE_EN_MASK,
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 				   SW_TVE_DCLK_POL(0) | SW_TVE_DCLK_EN(1) |
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-				   SW_DCLK_UPSAMPLE_EN(upsample_en) |
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+				   SW_DCLK_UPSAMPLE_EN(tve->is_4x) |
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 				   SW_TVE_MODE(0) | SW_TVE_EN(1));
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-
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-	regmap_update_bits(tve->grf, PLUMAGE_GRF_SOC_CON3,
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-			   DCLK_UPSAMPLE_2X4X_MASK,
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-			   DCLK_UPSAMPLE_2X4X(tve->is_4x - 1));
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 	ret = rk630_tve_write_block(tve, tve_cfg, 27);
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 	if (ret < 0) {
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@@ -260,15 +256,16 @@
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 static int rk630_tve_enable(struct rk630_tve *tve)
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 {
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-	int ret;
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+	int ret, i;
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+	u32 val = 0;
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 	dev_dbg(tve->dev, "%s\n", __func__);
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 	/* config bt656 input gpio*/
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 	regmap_write(tve->grf, PLUMAGE_GRF_GPIO0A_IOMUX, 0x55555555);
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-	regmap_update_bits(tve->grf, PLUMAGE_GRF_GPIO0B_IOMUX, PIN0_SEL_MASK,
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-			   PIN0_SEL(1));
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+	regmap_update_bits(tve->grf, PLUMAGE_GRF_GPIO0B_IOMUX, GPIO0B0_SEL_MASK,
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+			   GPIO0B0_SEL(1));
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 	regmap_update_bits(tve->grf, PLUMAGE_GRF_SOC_CON3, VDAC_ENDAC0_MASK,
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 			   VDAC_ENDAC0(0));
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@@ -279,21 +276,31 @@
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 	/*config clk*/
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 	if (!tve->is_4x) {
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-		regmap_update_bits(tve->cru, CRU_GATE_CON0,
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-				   DCLK_CVBS_4X_PLL_CLK_GATE_MASK,
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-				   DCLK_CVBS_4X_PLL_CLK_GATE(1));
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+		regmap_update_bits(tve->cru, CRU_MODE_CON, CLK_SPLL_MODE_MASK,
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+				   CLK_SPLL_MODE(2));
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 	} else {
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-		regmap_update_bits(tve->cru, CRU_CLKSEL_CON1,
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-				   DCLK_CVBS_4X_DIV_CON_MASK,
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-				   DCLK_CVBS_4X_DIV_CON(0));
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+		regmap_update_bits(tve->cru, CRU_SPLL_CON1, PLLPD0_MASK,
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+				   PLLPD0(1));
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-		regmap_update_bits(tve->cru, CRU_GATE_CON0,
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-				   DCLK_CVBS_4X_PLL_CLK_GATE_MASK,
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-				   DCLK_CVBS_4X_PLL_CLK_GATE(0));
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+		regmap_update_bits(tve->cru, CRU_MODE_CON, CLK_SPLL_MODE_MASK,
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+				   CLK_SPLL_MODE(1));
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+
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+		regmap_update_bits(tve->cru, CRU_SPLL_CON1, PLLPD0_MASK,
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+				   PLLPD0(0));
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+
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+		for (i = 0; i < 10; i++) {
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+			usleep_range(1000, 2000);
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+			regmap_read(tve->cru, CRU_SPLL_CON1, &val);
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+			if (val & PLL_LOCK) {
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+				dev_dbg(tve->dev, "rk630 pll locked\n");
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+				break;
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+			}
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+		}
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+		if (!(val & PLL_LOCK)) {
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+			dev_err(tve->dev, "rk630 pll unlock\n");
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+			return -EINVAL;
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+		}
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 	}
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-
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-	/* set vdac gain */
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-	regmap_write(tve->grf, PLUMAGE_GRF_SOC_CON3, 0x003f003f);
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 	/* enable vdac */
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 	regmap_update_bits(tve->grf, PLUMAGE_GRF_SOC_CON3,
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@@ -369,8 +376,8 @@
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 static void
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 rk630_tve_bridge_mode_set(struct drm_bridge *bridge,
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-		       struct drm_display_mode *mode,
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-		       struct drm_display_mode *adjusted_mode)
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+			  const struct drm_display_mode *mode,
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+			  const struct drm_display_mode *adjusted_mode)
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 {
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 	struct rk630_tve *tve;
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@@ -401,7 +408,8 @@
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 	rk630_tve_disable(tve);
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 }
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-static int rk630_tve_bridge_attach(struct drm_bridge *bridge)
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+static int rk630_tve_bridge_attach(struct drm_bridge *bridge,
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+				   enum drm_bridge_attach_flags flags)
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 {
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 	struct rk630_tve *tve = bridge_to_tve(bridge);
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 	int ret;
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@@ -455,7 +463,6 @@
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 	struct rk630 *rk630 = dev_get_drvdata(pdev->dev.parent);
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 	struct rk630_tve *tve;
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 	struct device *dev = &pdev->dev;
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-	int ret;
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 	if (!of_device_is_available(dev->of_node))
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 		return -ENODEV;
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@@ -473,11 +480,6 @@
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 	tve->tvemap = rk630->tve;
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 	if (!tve->grf | !tve->cru | !tve->tvemap)
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 		return -ENODEV;
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-
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-	ret = device_property_read_u32(dev, "rockchip,tve-upsample",
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-				       &tve->is_4x);
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-	if (ret < 0)
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-		tve->is_4x = 0;
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 	tve->mode = CVBS_PAL;
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