forked from ~ljy/RK356X_SDK_RELEASE
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hc
2023-12-06 08f87f769b595151be1afeff53e144f543faa614 
 kernel/drivers/gpu/drm/bochs/bochs_hw.c
....@@ -1,9 +1,11 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License as published by
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- * the Free Software Foundation; either version 2 of the License, or
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- * (at your option) any later version.
63  */
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+
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+#include <linux/pci.h>
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+
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+#include <drm/drm_drv.h>
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+#include <drm/drm_fourcc.h>
79 
810 #include "bochs.h"
911 
....@@ -47,11 +49,69 @@
4749 	}
4850 }
4951 
50
-int bochs_hw_init(struct drm_device *dev, uint32_t flags)
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+static void bochs_hw_set_big_endian(struct bochs_device *bochs)
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+{
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+	if (bochs->qext_size < 8)
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+		return;
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+
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+	writel(0xbebebebe, bochs->mmio + 0x604);
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+}
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+
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+static void bochs_hw_set_little_endian(struct bochs_device *bochs)
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+{
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+	if (bochs->qext_size < 8)
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+		return;
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+
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+	writel(0x1e1e1e1e, bochs->mmio + 0x604);
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+}
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+
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+#ifdef __BIG_ENDIAN
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+#define bochs_hw_set_native_endian(_b) bochs_hw_set_big_endian(_b)
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+#else
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+#define bochs_hw_set_native_endian(_b) bochs_hw_set_little_endian(_b)
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+#endif
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+
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+static int bochs_get_edid_block(void *data, u8 *buf,
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+				unsigned int block, size_t len)
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+{
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+	struct bochs_device *bochs = data;
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+	size_t i, start = block * EDID_LENGTH;
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+
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+	if (start + len > 0x400 /* vga register offset */)
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+		return -1;
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+
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+	for (i = 0; i < len; i++) {
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+		buf[i] = readb(bochs->mmio + start + i);
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+	}
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+	return 0;
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+}
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+
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+int bochs_hw_load_edid(struct bochs_device *bochs)
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+{
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+	u8 header[8];
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+
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+	if (!bochs->mmio)
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+		return -1;
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+
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+	/* check header to detect whenever edid support is enabled in qemu */
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+	bochs_get_edid_block(bochs, header, 0, ARRAY_SIZE(header));
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+	if (drm_edid_header_is_valid(header) != 8)
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+		return -1;
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+
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+	kfree(bochs->edid);
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+	bochs->edid = drm_do_get_edid(&bochs->connector,
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+				      bochs_get_edid_block, bochs);
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+	if (bochs->edid == NULL)
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+		return -1;
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+
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+	return 0;
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+}
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+
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+int bochs_hw_init(struct drm_device *dev)
51111 {
52112 	struct bochs_device *bochs = dev->dev_private;
53113 	struct pci_dev *pdev = dev->pdev;
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-	unsigned long addr, size, mem, ioaddr, iosize, qext_size;
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+	unsigned long addr, size, mem, ioaddr, iosize;
55115 	u16 id;
56116 
57117 	if (pdev->resource[2].flags & IORESOURCE_MEM) {
....@@ -115,19 +175,14 @@
115175 		 ioaddr);
116176 
117177 	if (bochs->mmio && pdev->revision >= 2) {
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-		qext_size = readl(bochs->mmio + 0x600);
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-		if (qext_size < 4 || qext_size > iosize)
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+		bochs->qext_size = readl(bochs->mmio + 0x600);
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+		if (bochs->qext_size < 4 || bochs->qext_size > iosize) {
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+			bochs->qext_size = 0;
120181 			goto noext;
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-		DRM_DEBUG("Found qemu ext regs, size %ld\n", qext_size);
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-		if (qext_size >= 8) {
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-#ifdef __BIG_ENDIAN
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-			writel(0xbebebebe, bochs->mmio + 0x604);
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-#else
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-			writel(0x1e1e1e1e, bochs->mmio + 0x604);
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-#endif
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-			DRM_DEBUG("  qext endian: 0x%x\n",
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-				  readl(bochs->mmio + 0x604));
130182 		}
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+		DRM_DEBUG("Found qemu ext regs, size %ld\n",
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+			  bochs->qext_size);
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+		bochs_hw_set_native_endian(bochs);
131186 	}
132187 
133188 noext:
....@@ -138,6 +193,8 @@
138193 {
139194 	struct bochs_device *bochs = dev->dev_private;
140195 
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+	/* TODO: shot down existing vram mappings */
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+
141198 	if (bochs->mmio)
142199 		iounmap(bochs->mmio);
143200 	if (bochs->ioports)
....@@ -145,11 +202,17 @@
145202 	if (bochs->fb_map)
146203 		iounmap(bochs->fb_map);
147204 	pci_release_regions(dev->pdev);
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+	kfree(bochs->edid);
148206 }
149207 
150208 void bochs_hw_setmode(struct bochs_device *bochs,
151209 		      struct drm_display_mode *mode)
152210 {
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+	int idx;
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+
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+	if (!drm_dev_enter(bochs->dev, &idx))
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+		return;
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+
153216 	bochs->xres = mode->hdisplay;
154217 	bochs->yres = mode->vdisplay;
155218 	bochs->bpp = 32;
....@@ -175,19 +238,63 @@
175238 
176239 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_ENABLE,
177240 			  VBE_DISPI_ENABLED | VBE_DISPI_LFB_ENABLED);
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+
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+	drm_dev_exit(idx);
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+}
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+
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+void bochs_hw_setformat(struct bochs_device *bochs,
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+			const struct drm_format_info *format)
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+{
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+	int idx;
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+
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+	if (!drm_dev_enter(bochs->dev, &idx))
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+		return;
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+
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+	DRM_DEBUG_DRIVER("format %c%c%c%c\n",
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+			 (format->format >>  0) & 0xff,
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+			 (format->format >>  8) & 0xff,
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+			 (format->format >> 16) & 0xff,
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+			 (format->format >> 24) & 0xff);
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+
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+	switch (format->format) {
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+	case DRM_FORMAT_XRGB8888:
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+		bochs_hw_set_little_endian(bochs);
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+		break;
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+	case DRM_FORMAT_BGRX8888:
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+		bochs_hw_set_big_endian(bochs);
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+		break;
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+	default:
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+		/* should not happen */
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+		DRM_ERROR("%s: Huh? Got framebuffer format 0x%x",
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+			  __func__, format->format);
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+		break;
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+	}
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+
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+	drm_dev_exit(idx);
178274 }
179275 
180276 void bochs_hw_setbase(struct bochs_device *bochs,
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-		      int x, int y, u64 addr)
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+		      int x, int y, int stride, u64 addr)
182278 {
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-	unsigned long offset = (unsigned long)addr +
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+	unsigned long offset;
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+	unsigned int vx, vy, vwidth, idx;
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+
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+	if (!drm_dev_enter(bochs->dev, &idx))
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+		return;
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+
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+	bochs->stride = stride;
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+	offset = (unsigned long)addr +
184287 		y * bochs->stride +
185288 		x * (bochs->bpp / 8);
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-	int vy = offset / bochs->stride;
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-	int vx = (offset % bochs->stride) * 8 / bochs->bpp;
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+	vy = offset / bochs->stride;
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+	vx = (offset % bochs->stride) * 8 / bochs->bpp;
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+	vwidth = stride * 8 / bochs->bpp;
188292 
189293 	DRM_DEBUG_DRIVER("x %d, y %d, addr %llx -> offset %lx, vx %d, vy %d\n",
190294 			 x, y, addr, offset, vx, vy);
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+	bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_WIDTH, vwidth);
191296 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_X_OFFSET, vx);
192297 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_Y_OFFSET, vy);
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+
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+	drm_dev_exit(idx);
193300 }