add dts config

hc

2023-12-06 08f87f769b595151be1afeff53e144f543faa614

 kernel/drivers/gpu/arm/bifrost/backend/gpu/mali_kbase_pm_ca.c
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@@ -1,7 +1,7 @@
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 // SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
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 /*
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  *
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- * (C) COPYRIGHT 2013-2021 ARM Limited. All rights reserved.
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+ * (C) COPYRIGHT 2013-2022 ARM Limited. All rights reserved.
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  *
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  * This program is free software and is provided to you under the terms of the
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  * GNU General Public License version 2 as published by the Free Software
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@@ -26,6 +26,7 @@
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 #include <mali_kbase.h>
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 #include <mali_kbase_pm.h>
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 #include <backend/gpu/mali_kbase_pm_internal.h>
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+#include <backend/gpu/mali_kbase_model_linux.h>
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 #include <mali_kbase_dummy_job_wa.h>
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31
 
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 int kbase_pm_ca_init(struct kbase_device *kbdev)
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@@ -52,6 +53,9 @@
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 {
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 	struct kbase_pm_backend_data *pm_backend = &kbdev->pm.backend;
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 	unsigned long flags;
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+#if MALI_USE_CSF
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+	u64 old_core_mask = 0;
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+#endif
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59
 
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 	spin_lock_irqsave(&kbdev->hwaccess_lock, flags);
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61
 
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@@ -62,6 +66,8 @@
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 			core_mask, kbdev->pm.debug_core_mask);
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 		goto unlock;
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 	}
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+
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+	old_core_mask = pm_backend->ca_cores_enabled;
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 #else
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 	if (!(core_mask & kbdev->pm.debug_core_mask_all)) {
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 		dev_err(kbdev->dev, "OPP core mask 0x%llX does not intersect with debug mask 0x%llX\n",
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@@ -70,20 +76,34 @@
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 	}
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 	if (kbase_dummy_job_wa_enabled(kbdev)) {
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-		dev_err(kbdev->dev, "Dynamic core scaling not supported as dummy job WA is enabled");
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+		dev_err_once(kbdev->dev, "Dynamic core scaling not supported as dummy job WA is enabled");
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 		goto unlock;
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 	}
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 #endif /* MALI_USE_CSF */
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-
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 	pm_backend->ca_cores_enabled = core_mask;
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 	kbase_pm_update_state(kbdev);
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-
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-unlock:
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 	spin_unlock_irqrestore(&kbdev->hwaccess_lock, flags);
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+
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+#if MALI_USE_CSF
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+	/* Check if old_core_mask contained the undesired cores and wait
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+	 * for those cores to get powered down
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+	 */
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+	if ((core_mask & old_core_mask) != old_core_mask) {
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+		if (kbase_pm_wait_for_cores_down_scale(kbdev)) {
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+			dev_warn(kbdev->dev,
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+				 "Wait for update of core_mask from %llx to %llx failed",
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+				 old_core_mask, core_mask);
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+		}
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+	}
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+#endif
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 	dev_dbg(kbdev->dev, "Devfreq policy : new core mask=%llX\n",
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 			pm_backend->ca_cores_enabled);
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+
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+	return;
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+unlock:
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+	spin_unlock_irqrestore(&kbdev->hwaccess_lock, flags);
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 }
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 KBASE_EXPORT_TEST_API(kbase_devfreq_set_core_mask);
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 #endif
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@@ -120,7 +140,9 @@
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 {
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 	lockdep_assert_held(&kbdev->hwaccess_lock);
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-#if   MALI_USE_CSF
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+#if IS_ENABLED(CONFIG_MALI_BIFROST_NO_MALI)
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+	return (((1ull) << KBASE_DUMMY_MODEL_MAX_SHADER_CORES) - 1);
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+#elif MALI_USE_CSF
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 	return kbase_pm_get_ready_cores(kbdev, KBASE_PM_CORE_SHADER);
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 #else
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 	return kbdev->pm.backend.pm_shaders_core_mask;