add dts config

hc

2023-12-06 08f87f769b595151be1afeff53e144f543faa614

 kernel/drivers/dma/fsldma.h
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@@ -1,15 +1,10 @@
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+/* SPDX-License-Identifier: GPL-2.0-or-later */
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 /*
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  * Copyright (C) 2007-2010 Freescale Semiconductor, Inc. All rights reserved.
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  *
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  * Author:
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  *   Zhang Wei <wei.zhang@freescale.com>, Jul 2007
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  *   Ebony Zhu <ebony.zhu@freescale.com>, May 2007
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- *
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- * This is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License as published by
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- * the Free Software Foundation; either version 2 of the License, or
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- * (at your option) any later version.
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- *
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  */
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 #ifndef __DMA_FSLDMA_H
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 #define __DMA_FSLDMA_H
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@@ -196,39 +191,67 @@
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 #define to_fsl_desc(lh) container_of(lh, struct fsl_desc_sw, node)
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 #define tx_to_fsl_desc(tx) container_of(tx, struct fsl_desc_sw, async_tx)
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193
 
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-#ifndef __powerpc64__
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-static u64 in_be64(const u64 __iomem *addr)
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+#ifdef	CONFIG_PPC
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+#define fsl_ioread32(p)		in_le32(p)
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+#define fsl_ioread32be(p)	in_be32(p)
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+#define fsl_iowrite32(v, p)	out_le32(p, v)
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+#define fsl_iowrite32be(v, p)	out_be32(p, v)
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+
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+#ifdef __powerpc64__
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+#define fsl_ioread64(p)		in_le64(p)
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+#define fsl_ioread64be(p)	in_be64(p)
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+#define fsl_iowrite64(v, p)	out_le64(p, v)
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+#define fsl_iowrite64be(v, p)	out_be64(p, v)
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+#else
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+static u64 fsl_ioread64(const u64 __iomem *addr)
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 {
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-	return ((u64)in_be32((u32 __iomem *)addr) << 32) |
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-		(in_be32((u32 __iomem *)addr + 1));
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+	u32 val_lo = in_le32((u32 __iomem *)addr);
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+	u32 val_hi = in_le32((u32 __iomem *)addr + 1);
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+
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+	return ((u64)val_hi << 32) + val_lo;
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 }
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-static void out_be64(u64 __iomem *addr, u64 val)
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-{
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-	out_be32((u32 __iomem *)addr, val >> 32);
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-	out_be32((u32 __iomem *)addr + 1, (u32)val);
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-}
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-
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-/* There is no asm instructions for 64 bits reverse loads and stores */
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-static u64 in_le64(const u64 __iomem *addr)
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-{
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-	return ((u64)in_le32((u32 __iomem *)addr + 1) << 32) |
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-		(in_le32((u32 __iomem *)addr));
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-}
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-
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-static void out_le64(u64 __iomem *addr, u64 val)
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+static void fsl_iowrite64(u64 val, u64 __iomem *addr)
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 {
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 	out_le32((u32 __iomem *)addr + 1, val >> 32);
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 	out_le32((u32 __iomem *)addr, (u32)val);
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 }
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+
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+static u64 fsl_ioread64be(const u64 __iomem *addr)
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+{
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+	u32 val_hi = in_be32((u32 __iomem *)addr);
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+	u32 val_lo = in_be32((u32 __iomem *)addr + 1);
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+
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+	return ((u64)val_hi << 32) + val_lo;
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+}
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+
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+static void fsl_iowrite64be(u64 val, u64 __iomem *addr)
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+{
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+	out_be32((u32 __iomem *)addr, val >> 32);
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+	out_be32((u32 __iomem *)addr + 1, (u32)val);
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+}
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+#endif
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 #endif
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-#define DMA_IN(fsl_chan, addr, width)					\
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-		(((fsl_chan)->feature & FSL_DMA_BIG_ENDIAN) ?		\
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-			in_be##width(addr) : in_le##width(addr))
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-#define DMA_OUT(fsl_chan, addr, val, width)				\
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-		(((fsl_chan)->feature & FSL_DMA_BIG_ENDIAN) ?		\
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-			out_be##width(addr, val) : out_le##width(addr, val))
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+#if defined(CONFIG_ARM64) || defined(CONFIG_ARM)
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+#define fsl_ioread32(p)		ioread32(p)
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+#define fsl_ioread32be(p)	ioread32be(p)
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+#define fsl_iowrite32(v, p)	iowrite32(v, p)
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+#define fsl_iowrite32be(v, p)	iowrite32be(v, p)
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+#define fsl_ioread64(p)		ioread64(p)
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+#define fsl_ioread64be(p)	ioread64be(p)
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+#define fsl_iowrite64(v, p)	iowrite64(v, p)
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+#define fsl_iowrite64be(v, p)	iowrite64be(v, p)
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+#endif
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+
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+#define FSL_DMA_IN(fsl_dma, addr, width)			\
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+		(((fsl_dma)->feature & FSL_DMA_BIG_ENDIAN) ?	\
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+			fsl_ioread##width##be(addr) : fsl_ioread##width(addr))
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+
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+#define FSL_DMA_OUT(fsl_dma, addr, val, width)			\
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+		(((fsl_dma)->feature & FSL_DMA_BIG_ENDIAN) ?	\
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+			fsl_iowrite##width##be(val, addr) : fsl_iowrite	\
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+		##width(val, addr))
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 #define DMA_TO_CPU(fsl_chan, d, width)					\
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 		(((fsl_chan)->feature & FSL_DMA_BIG_ENDIAN) ?		\