forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-12-06 08f87f769b595151be1afeff53e144f543faa614
kernel/drivers/crypto/rockchip/rk_crypto_v2_ahash.c
....@@ -51,8 +51,8 @@
5151 CRYPTO_WRITE(rk_dev, CRYPTO_RST_CTL, tmp | tmp_mask);
5252
5353 /* This is usually done in 20 clock cycles */
54
- ret = readl_poll_timeout_atomic(rk_dev->reg + CRYPTO_RST_CTL,
55
- tmp, !tmp, 0, pool_timeout_us);
54
+ ret = read_poll_timeout_atomic(CRYPTO_READ, tmp, !tmp, 0, pool_timeout_us,
55
+ false, rk_dev, CRYPTO_RST_CTL);
5656 if (ret)
5757 dev_err(rk_dev->dev, "cipher reset pool timeout %ums.",
5858 pool_timeout_us);
....@@ -285,11 +285,11 @@
285285 int ret = 0;
286286 u32 reg_ctrl = 0;
287287
288
- ret = readl_poll_timeout_atomic(rk_dev->reg + CRYPTO_HASH_VALID,
289
- reg_ctrl,
290
- reg_ctrl & CRYPTO_HASH_IS_VALID,
291
- RK_POLL_PERIOD_US,
292
- RK_POLL_TIMEOUT_US);
288
+ ret = read_poll_timeout_atomic(CRYPTO_READ, reg_ctrl,
289
+ reg_ctrl & CRYPTO_HASH_IS_VALID,
290
+ RK_POLL_PERIOD_US,
291
+ RK_POLL_TIMEOUT_US, false,
292
+ rk_dev, CRYPTO_HASH_VALID);
293293 if (ret)
294294 goto exit;
295295