add dts config

hc

2023-12-06 08f87f769b595151be1afeff53e144f543faa614

 kernel/drivers/crypto/caam/intern.h
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@@ -4,11 +4,14 @@
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  * Private/internal definitions between modules
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  *
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  * Copyright 2008-2011 Freescale Semiconductor, Inc.
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- *
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+ * Copyright 2019 NXP
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  */
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 #ifndef INTERN_H
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 #define INTERN_H
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+
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+#include "ctrl.h"
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+#include <crypto/engine.h>
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 /* Currently comes from Kconfig param as a ^2 (driver-required) */
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 #define JOBR_DEPTH (1 << CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE)
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@@ -44,37 +47,36 @@
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 	struct caam_job_ring __iomem *rregs;	/* JobR's register space */
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 	struct tasklet_struct irqtask;
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 	int irq;			/* One per queue */
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+	bool hwrng;
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 	/* Number of scatterlist crypt transforms active on the JobR */
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 	atomic_t tfm_count ____cacheline_aligned;
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 	/* Job ring info */
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-	int ringsize;	/* Size of rings (assume input = output) */
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 	struct caam_jrentry_info *entinfo;	/* Alloc'ed 1 per ring entry */
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 	spinlock_t inplock ____cacheline_aligned; /* Input ring index lock */
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-	int inp_ring_write_index;	/* Input index "tail" */
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+	u32 inpring_avail;	/* Number of free entries in input ring */
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 	int head;			/* entinfo (s/w ring) head index */
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-	dma_addr_t *inpring;	/* Base of input ring, alloc DMA-safe */
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-	spinlock_t outlock ____cacheline_aligned; /* Output ring index lock */
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+	void *inpring;			/* Base of input ring, alloc
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+					 * DMA-safe */
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 	int out_ring_read_index;	/* Output index "tail" */
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 	int tail;			/* entinfo (s/w ring) tail index */
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-	struct jr_outentry *outring;	/* Base of output ring, DMA-safe */
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+	void *outring;			/* Base of output ring, DMA-safe */
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+	struct crypto_engine *engine;
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 };
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 /*
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  * Driver-private storage for a single CAAM block instance
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  */
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 struct caam_drv_private {
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-#ifdef CONFIG_CAAM_QI
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-	struct device *qidev;
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-#endif
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-
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 	/* Physical-presence section */
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 	struct caam_ctrl __iomem *ctrl; /* controller region */
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 	struct caam_deco __iomem *deco; /* DECO/CCB views */
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 	struct caam_assurance __iomem *assure;
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 	struct caam_queue_if __iomem *qi; /* QI control region */
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 	struct caam_job_ring __iomem *jr[4];	/* JobR's register space */
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+
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+	struct iommu_domain *domain;
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 	/*
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 	 * Detected geometry block. Filled in from device tree if powerpc,
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@@ -93,41 +95,122 @@
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 				   Handles of the RNG4 block are initialized
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 				   by this driver */
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-	struct clk *caam_ipg;
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-	struct clk *caam_mem;
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-	struct clk *caam_aclk;
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-	struct clk *caam_emi_slow;
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-
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+	struct clk_bulk_data *clks;
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+	int num_clks;
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 	/*
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 	 * debugfs entries for developer view into driver/device
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 	 * variables at runtime.
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 	 */
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 #ifdef CONFIG_DEBUG_FS
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-	struct dentry *dfs_root;
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 	struct dentry *ctl; /* controller dir */
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 	struct debugfs_blob_wrapper ctl_kek_wrap, ctl_tkek_wrap, ctl_tdsk_wrap;
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-	struct dentry *ctl_kek, *ctl_tkek, *ctl_tdsk;
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 #endif
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 };
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-void caam_jr_algapi_init(struct device *dev);
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-void caam_jr_algapi_remove(struct device *dev);
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+#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API
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-#ifdef CONFIG_DEBUG_FS
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-static int caam_debugfs_u64_get(void *data, u64 *val)
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+int caam_algapi_init(struct device *dev);
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+void caam_algapi_exit(void);
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+
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+#else
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+
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+static inline int caam_algapi_init(struct device *dev)
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 {
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-	*val = caam64_to_cpu(*(u64 *)data);
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 	return 0;
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 }
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-static int caam_debugfs_u32_get(void *data, u64 *val)
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+static inline void caam_algapi_exit(void)
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 {
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-	*val = caam32_to_cpu(*(u32 *)data);
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+}
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+
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+#endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API */
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+
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+#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API
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+
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+int caam_algapi_hash_init(struct device *dev);
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+void caam_algapi_hash_exit(void);
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+
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+#else
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+
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+static inline int caam_algapi_hash_init(struct device *dev)
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+{
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 	return 0;
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 }
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-DEFINE_SIMPLE_ATTRIBUTE(caam_fops_u32_ro, caam_debugfs_u32_get, NULL, "%llu\n");
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-DEFINE_SIMPLE_ATTRIBUTE(caam_fops_u64_ro, caam_debugfs_u64_get, NULL, "%llu\n");
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-#endif
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+static inline void caam_algapi_hash_exit(void)
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+{
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+}
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+
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+#endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API */
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+
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+#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API
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+
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+int caam_pkc_init(struct device *dev);
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+void caam_pkc_exit(void);
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+
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+#else
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+
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+static inline int caam_pkc_init(struct device *dev)
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+{
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+	return 0;
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+}
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+
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+static inline void caam_pkc_exit(void)
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+{
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+}
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+
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+#endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API */
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+
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+#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API
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+
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+int caam_rng_init(struct device *dev);
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+void caam_rng_exit(struct device *dev);
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+
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+#else
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+
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+static inline int caam_rng_init(struct device *dev)
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+{
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+	return 0;
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+}
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+
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+static inline void caam_rng_exit(struct device *dev) {}
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+
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+#endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API */
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+
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+#ifdef CONFIG_CAAM_QI
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+
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+int caam_qi_algapi_init(struct device *dev);
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+void caam_qi_algapi_exit(void);
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+
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+#else
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+
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+static inline int caam_qi_algapi_init(struct device *dev)
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+{
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+	return 0;
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+}
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+
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+static inline void caam_qi_algapi_exit(void)
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+{
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+}
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+
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+#endif /* CONFIG_CAAM_QI */
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+
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+static inline u64 caam_get_dma_mask(struct device *dev)
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+{
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+	struct device_node *nprop = dev->of_node;
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+
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+	if (caam_ptr_sz != sizeof(u64))
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+		return DMA_BIT_MASK(32);
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+
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+	if (caam_dpaa2)
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+		return DMA_BIT_MASK(49);
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+
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+	if (of_device_is_compatible(nprop, "fsl,sec-v5.0-job-ring") ||
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+	    of_device_is_compatible(nprop, "fsl,sec-v5.0"))
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+		return DMA_BIT_MASK(40);
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+
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+	return DMA_BIT_MASK(36);
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+}
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+
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 #endif /* INTERN_H */