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2023-12-06 08f87f769b595151be1afeff53e144f543faa614 
 kernel/arch/x86/include/asm/hyperv-tlfs.h
....@@ -1,4 +1,4 @@
1
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
1
+/* SPDX-License-Identifier: GPL-2.0 */
22 
33 /*
44  * This file contains definitions from Hyper-V Hypervisor Top-Level Functional
....@@ -10,7 +10,7 @@
1010 #define _ASM_X86_HYPERV_TLFS_H
1111 
1212 #include <linux/types.h>
13
-
13
+#include <asm/page.h>
1414 /*
1515  * The below CPUID leaves are present if VersionAndFeatures.HypervisorPresent
1616  * is set by CPUID(HvCpuIdFunctionVersionAndFeatures).
....@@ -28,158 +28,94 @@
2828 #define HYPERV_CPUID_MAX			0x4000ffff
2929 
3030 /*
31
- * Feature identification. EAX indicates which features are available
32
- * to the partition based upon the current partition privileges.
33
- */
34
-
35
-/* VP Runtime (HV_X64_MSR_VP_RUNTIME) available */
36
-#define HV_X64_MSR_VP_RUNTIME_AVAILABLE		(1 << 0)
37
-/* Partition Reference Counter (HV_X64_MSR_TIME_REF_COUNT) available*/
38
-#define HV_MSR_TIME_REF_COUNT_AVAILABLE		(1 << 1)
39
-/* Partition reference TSC MSR is available */
40
-#define HV_MSR_REFERENCE_TSC_AVAILABLE		(1 << 9)
41
-
42
-/* A partition's reference time stamp counter (TSC) page */
43
-#define HV_X64_MSR_REFERENCE_TSC		0x40000021
44
-
45
-/*
46
- * There is a single feature flag that signifies if the partition has access
47
- * to MSRs with local APIC and TSC frequencies.
48
- */
49
-#define HV_X64_ACCESS_FREQUENCY_MSRS		(1 << 11)
50
-
51
-/* AccessReenlightenmentControls privilege */
52
-#define HV_X64_ACCESS_REENLIGHTENMENT		BIT(13)
53
-
54
-/*
55
- * Basic SynIC MSRs (HV_X64_MSR_SCONTROL through HV_X64_MSR_EOM
56
- * and HV_X64_MSR_SINT0 through HV_X64_MSR_SINT15) available
57
- */
58
-#define HV_X64_MSR_SYNIC_AVAILABLE		(1 << 2)
59
-/*
60
- * Synthetic Timer MSRs (HV_X64_MSR_STIMER0_CONFIG through
61
- * HV_X64_MSR_STIMER3_COUNT) available
62
- */
63
-#define HV_MSR_SYNTIMER_AVAILABLE		(1 << 3)
64
-/*
65
- * APIC access MSRs (HV_X64_MSR_EOI, HV_X64_MSR_ICR and HV_X64_MSR_TPR)
66
- * are available
67
- */
68
-#define HV_X64_MSR_APIC_ACCESS_AVAILABLE	(1 << 4)
69
-/* Hypercall MSRs (HV_X64_MSR_GUEST_OS_ID and HV_X64_MSR_HYPERCALL) available*/
70
-#define HV_X64_MSR_HYPERCALL_AVAILABLE		(1 << 5)
71
-/* Access virtual processor index MSR (HV_X64_MSR_VP_INDEX) available*/
72
-#define HV_X64_MSR_VP_INDEX_AVAILABLE		(1 << 6)
73
-/* Virtual system reset MSR (HV_X64_MSR_RESET) is available*/
74
-#define HV_X64_MSR_RESET_AVAILABLE		(1 << 7)
75
- /*
76
-  * Access statistics pages MSRs (HV_X64_MSR_STATS_PARTITION_RETAIL_PAGE,
77
-  * HV_X64_MSR_STATS_PARTITION_INTERNAL_PAGE, HV_X64_MSR_STATS_VP_RETAIL_PAGE,
78
-  * HV_X64_MSR_STATS_VP_INTERNAL_PAGE) available
79
-  */
80
-#define HV_X64_MSR_STAT_PAGES_AVAILABLE		(1 << 8)
81
-
82
-/* Frequency MSRs available */
83
-#define HV_FEATURE_FREQUENCY_MSRS_AVAILABLE	(1 << 8)
84
-
85
-/* Crash MSR available */
86
-#define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE (1 << 10)
87
-
88
-/* stimer Direct Mode is available */
89
-#define HV_STIMER_DIRECT_MODE_AVAILABLE		(1 << 19)
90
-
91
-/*
92
- * Feature identification: EBX indicates which flags were specified at
93
- * partition creation. The format is the same as the partition creation
94
- * flag structure defined in section Partition Creation Flags.
95
- */
96
-#define HV_X64_CREATE_PARTITIONS		(1 << 0)
97
-#define HV_X64_ACCESS_PARTITION_ID		(1 << 1)
98
-#define HV_X64_ACCESS_MEMORY_POOL		(1 << 2)
99
-#define HV_X64_ADJUST_MESSAGE_BUFFERS		(1 << 3)
100
-#define HV_X64_POST_MESSAGES			(1 << 4)
101
-#define HV_X64_SIGNAL_EVENTS			(1 << 5)
102
-#define HV_X64_CREATE_PORT			(1 << 6)
103
-#define HV_X64_CONNECT_PORT			(1 << 7)
104
-#define HV_X64_ACCESS_STATS			(1 << 8)
105
-#define HV_X64_DEBUGGING			(1 << 11)
106
-#define HV_X64_CPU_POWER_MANAGEMENT		(1 << 12)
107
-#define HV_X64_CONFIGURE_PROFILER		(1 << 13)
108
-
109
-/*
110
- * Feature identification. EDX indicates which miscellaneous features
111
- * are available to the partition.
31
+ * Group D Features.  The bit assignments are custom to each architecture.
32
+ * On x86/x64 these are HYPERV_CPUID_FEATURES.EDX bits.
11233  */
11334 /* The MWAIT instruction is available (per section MONITOR / MWAIT) */
114
-#define HV_X64_MWAIT_AVAILABLE				(1 << 0)
35
+#define HV_X64_MWAIT_AVAILABLE				BIT(0)
11536 /* Guest debugging support is available */
116
-#define HV_X64_GUEST_DEBUGGING_AVAILABLE		(1 << 1)
37
+#define HV_X64_GUEST_DEBUGGING_AVAILABLE		BIT(1)
11738 /* Performance Monitor support is available*/
118
-#define HV_X64_PERF_MONITOR_AVAILABLE			(1 << 2)
39
+#define HV_X64_PERF_MONITOR_AVAILABLE			BIT(2)
11940 /* Support for physical CPU dynamic partitioning events is available*/
120
-#define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE	(1 << 3)
41
+#define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE	BIT(3)
12142 /*
12243  * Support for passing hypercall input parameter block via XMM
12344  * registers is available
12445  */
125
-#define HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE		(1 << 4)
46
+#define HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE		BIT(4)
12647 /* Support for a virtual guest idle state is available */
127
-#define HV_X64_GUEST_IDLE_STATE_AVAILABLE		(1 << 5)
128
-/* Guest crash data handler available */
129
-#define HV_X64_GUEST_CRASH_MSR_AVAILABLE		(1 << 10)
48
+#define HV_X64_GUEST_IDLE_STATE_AVAILABLE		BIT(5)
49
+/* Frequency MSRs available */
50
+#define HV_FEATURE_FREQUENCY_MSRS_AVAILABLE		BIT(8)
51
+/* Crash MSR available */
52
+#define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE		BIT(10)
53
+/* Support for debug MSRs available */
54
+#define HV_FEATURE_DEBUG_MSRS_AVAILABLE			BIT(11)
55
+/* stimer Direct Mode is available */
56
+#define HV_STIMER_DIRECT_MODE_AVAILABLE			BIT(19)
13057 
13158 /*
13259  * Implementation recommendations. Indicates which behaviors the hypervisor
13360  * recommends the OS implement for optimal performance.
61
+ * These are HYPERV_CPUID_ENLIGHTMENT_INFO.EAX bits.
13462  */
135
- /*
136
-  * Recommend using hypercall for address space switches rather
137
-  * than MOV to CR3 instruction
138
-  */
139
-#define HV_X64_AS_SWITCH_RECOMMENDED		(1 << 0)
63
+/*
64
+ * Recommend using hypercall for address space switches rather
65
+ * than MOV to CR3 instruction
66
+ */
67
+#define HV_X64_AS_SWITCH_RECOMMENDED			BIT(0)
14068 /* Recommend using hypercall for local TLB flushes rather
14169  * than INVLPG or MOV to CR3 instructions */
142
-#define HV_X64_LOCAL_TLB_FLUSH_RECOMMENDED	(1 << 1)
70
+#define HV_X64_LOCAL_TLB_FLUSH_RECOMMENDED		BIT(1)
14371 /*
14472  * Recommend using hypercall for remote TLB flushes rather
14573  * than inter-processor interrupts
14674  */
147
-#define HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED	(1 << 2)
75
+#define HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED		BIT(2)
14876 /*
14977  * Recommend using MSRs for accessing APIC registers
15078  * EOI, ICR and TPR rather than their memory-mapped counterparts
15179  */
152
-#define HV_X64_APIC_ACCESS_RECOMMENDED		(1 << 3)
80
+#define HV_X64_APIC_ACCESS_RECOMMENDED			BIT(3)
15381 /* Recommend using the hypervisor-provided MSR to initiate a system RESET */
154
-#define HV_X64_SYSTEM_RESET_RECOMMENDED		(1 << 4)
82
+#define HV_X64_SYSTEM_RESET_RECOMMENDED			BIT(4)
15583 /*
15684  * Recommend using relaxed timing for this partition. If used,
15785  * the VM should disable any watchdog timeouts that rely on the
15886  * timely delivery of external interrupts
15987  */
160
-#define HV_X64_RELAXED_TIMING_RECOMMENDED	(1 << 5)
88
+#define HV_X64_RELAXED_TIMING_RECOMMENDED		BIT(5)
16189 
16290 /*
16391  * Recommend not using Auto End-Of-Interrupt feature
16492  */
165
-#define HV_DEPRECATING_AEOI_RECOMMENDED		(1 << 9)
93
+#define HV_DEPRECATING_AEOI_RECOMMENDED			BIT(9)
16694 
16795 /*
16896  * Recommend using cluster IPI hypercalls.
16997  */
170
-#define HV_X64_CLUSTER_IPI_RECOMMENDED         (1 << 10)
98
+#define HV_X64_CLUSTER_IPI_RECOMMENDED			BIT(10)
17199 
172100 /* Recommend using the newer ExProcessorMasks interface */
173
-#define HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED	(1 << 11)
101
+#define HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED		BIT(11)
174102 
175103 /* Recommend using enlightened VMCS */
176
-#define HV_X64_ENLIGHTENED_VMCS_RECOMMENDED    (1 << 14)
104
+#define HV_X64_ENLIGHTENED_VMCS_RECOMMENDED		BIT(14)
177105 
178106 /*
179
- * Crash notification flags.
107
+ * Virtual processor will never share a physical core with another virtual
108
+ * processor, except for virtual processors that are reported as sibling SMT
109
+ * threads.
180110  */
181
-#define HV_CRASH_CTL_CRASH_NOTIFY_MSG	BIT_ULL(62)
182
-#define HV_CRASH_CTL_CRASH_NOTIFY	BIT_ULL(63)
111
+#define HV_X64_NO_NONARCH_CORESHARING			BIT(18)
112
+
113
+/* Nested features. These are HYPERV_CPUID_NESTED_FEATURES.EAX bits. */
114
+#define HV_X64_NESTED_DIRECT_FLUSH			BIT(17)
115
+#define HV_X64_NESTED_GUEST_MAPPING_FLUSH		BIT(18)
116
+#define HV_X64_NESTED_MSR_BITMAP			BIT(19)
117
+
118
+/* Hyper-V specific model specific registers (MSRs) */
183119 
184120 /* MSR used to identify the guest OS. */
185121 #define HV_X64_MSR_GUEST_OS_ID			0x40000000
....@@ -198,6 +134,9 @@
198134 
199135 /* MSR used to read the per-partition time reference counter */
200136 #define HV_X64_MSR_TIME_REF_COUNT		0x40000020
137
+
138
+/* A partition's reference time stamp counter (TSC) page */
139
+#define HV_X64_MSR_REFERENCE_TSC		0x40000021
201140 
202141 /* MSR used to retrieve the TSC frequency */
203142 #define HV_X64_MSR_TSC_FREQUENCY		0x40000022
....@@ -246,6 +185,9 @@
246185 #define HV_X64_MSR_STIMER3_CONFIG		0x400000B6
247186 #define HV_X64_MSR_STIMER3_COUNT		0x400000B7
248187 
188
+/* Hyper-V guest idle MSR */
189
+#define HV_X64_MSR_GUEST_IDLE			0x400000F0
190
+
249191 /* Hyper-V guest crash notification MSR's */
250192 #define HV_X64_MSR_CRASH_P0			0x40000100
251193 #define HV_X64_MSR_CRASH_P1			0x40000101
....@@ -253,9 +195,14 @@
253195 #define HV_X64_MSR_CRASH_P3			0x40000103
254196 #define HV_X64_MSR_CRASH_P4			0x40000104
255197 #define HV_X64_MSR_CRASH_CTL			0x40000105
256
-#define HV_X64_MSR_CRASH_CTL_NOTIFY		(1ULL << 63)
257
-#define HV_X64_MSR_CRASH_PARAMS		\
258
-		(1 + (HV_X64_MSR_CRASH_P4 - HV_X64_MSR_CRASH_P0))
198
+
199
+/* TSC emulation after migration */
200
+#define HV_X64_MSR_REENLIGHTENMENT_CONTROL	0x40000106
201
+#define HV_X64_MSR_TSC_EMULATION_CONTROL	0x40000107
202
+#define HV_X64_MSR_TSC_EMULATION_STATUS		0x40000108
203
+
204
+/* TSC invariant control */
205
+#define HV_X64_MSR_TSC_INVARIANT_CONTROL	0x40000118
259206 
260207 /*
261208  * Declare the MSR used to setup pages used to communicate with the hypervisor.
....@@ -266,52 +213,8 @@
266213 		u64 enable:1;
267214 		u64 reserved:11;
268215 		u64 guest_physical_address:52;
269
-	};
216
+	} __packed;
270217 };
271
-
272
-/*
273
- * TSC page layout.
274
- */
275
-struct ms_hyperv_tsc_page {
276
-	volatile u32 tsc_sequence;
277
-	u32 reserved1;
278
-	volatile u64 tsc_scale;
279
-	volatile s64 tsc_offset;
280
-	u64 reserved2[509];
281
-};
282
-
283
-/*
284
- * The guest OS needs to register the guest ID with the hypervisor.
285
- * The guest ID is a 64 bit entity and the structure of this ID is
286
- * specified in the Hyper-V specification:
287
- *
288
- * msdn.microsoft.com/en-us/library/windows/hardware/ff542653%28v=vs.85%29.aspx
289
- *
290
- * While the current guideline does not specify how Linux guest ID(s)
291
- * need to be generated, our plan is to publish the guidelines for
292
- * Linux and other guest operating systems that currently are hosted
293
- * on Hyper-V. The implementation here conforms to this yet
294
- * unpublished guidelines.
295
- *
296
- *
297
- * Bit(s)
298
- * 63 - Indicates if the OS is Open Source or not; 1 is Open Source
299
- * 62:56 - Os Type; Linux is 0x100
300
- * 55:48 - Distro specific identification
301
- * 47:16 - Linux kernel version number
302
- * 15:0  - Distro specific identification
303
- *
304
- *
305
- */
306
-
307
-#define HV_LINUX_VENDOR_ID              0x8100
308
-
309
-/* TSC emulation after migration */
310
-#define HV_X64_MSR_REENLIGHTENMENT_CONTROL	0x40000106
311
-
312
-/* Nested features (CPUID 0x4000000A) EAX */
313
-#define HV_X64_NESTED_GUEST_MAPPING_FLUSH	BIT(18)
314
-#define HV_X64_NESTED_MSR_BITMAP		BIT(19)
315218 
316219 struct hv_reenlightenment_control {
317220 	__u64 vector:8;
....@@ -319,40 +222,28 @@
319222 	__u64 enabled:1;
320223 	__u64 reserved2:15;
321224 	__u64 target_vp:32;
322
-};
323
-
324
-#define HV_X64_MSR_TSC_EMULATION_CONTROL	0x40000107
325
-#define HV_X64_MSR_TSC_EMULATION_STATUS		0x40000108
225
+}  __packed;
326226 
327227 struct hv_tsc_emulation_control {
328228 	__u64 enabled:1;
329229 	__u64 reserved:63;
330
-};
230
+} __packed;
331231 
332232 struct hv_tsc_emulation_status {
333233 	__u64 inprogress:1;
334234 	__u64 reserved:63;
335
-};
235
+} __packed;
336236 
337237 #define HV_X64_MSR_HYPERCALL_ENABLE		0x00000001
338238 #define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT	12
339239 #define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_MASK	\
340240 		(~((1ull << HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT) - 1))
341241 
242
+#define HV_X64_MSR_CRASH_PARAMS		\
243
+		(1 + (HV_X64_MSR_CRASH_P4 - HV_X64_MSR_CRASH_P0))
244
+
342245 #define HV_IPI_LOW_VECTOR	0x10
343246 #define HV_IPI_HIGH_VECTOR	0xff
344
-
345
-/* Declare the various hypercall operations. */
346
-#define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE	0x0002
347
-#define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST	0x0003
348
-#define HVCALL_NOTIFY_LONG_SPIN_WAIT		0x0008
349
-#define HVCALL_SEND_IPI				0x000b
350
-#define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX  0x0013
351
-#define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX   0x0014
352
-#define HVCALL_SEND_IPI_EX			0x0015
353
-#define HVCALL_POST_MESSAGE			0x005c
354
-#define HVCALL_SIGNAL_EVENT			0x005d
355
-#define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_SPACE 0x00af
356247 
357248 #define HV_X64_MSR_VP_ASSIST_PAGE_ENABLE	0x00000001
358249 #define HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT	12
....@@ -365,67 +256,6 @@
365256 #define HV_X64_MSR_TSC_REFERENCE_ENABLE		0x00000001
366257 #define HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT	12
367258 
368
-#define HV_PROCESSOR_POWER_STATE_C0		0
369
-#define HV_PROCESSOR_POWER_STATE_C1		1
370
-#define HV_PROCESSOR_POWER_STATE_C2		2
371
-#define HV_PROCESSOR_POWER_STATE_C3		3
372
-
373
-#define HV_FLUSH_ALL_PROCESSORS			BIT(0)
374
-#define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES	BIT(1)
375
-#define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY	BIT(2)
376
-#define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT	BIT(3)
377
-
378
-enum HV_GENERIC_SET_FORMAT {
379
-	HV_GENERIC_SET_SPARSE_4K,
380
-	HV_GENERIC_SET_ALL,
381
-};
382
-
383
-#define HV_HYPERCALL_RESULT_MASK	GENMASK_ULL(15, 0)
384
-#define HV_HYPERCALL_FAST_BIT		BIT(16)
385
-#define HV_HYPERCALL_VARHEAD_OFFSET	17
386
-#define HV_HYPERCALL_REP_COMP_OFFSET	32
387
-#define HV_HYPERCALL_REP_COMP_MASK	GENMASK_ULL(43, 32)
388
-#define HV_HYPERCALL_REP_START_OFFSET	48
389
-#define HV_HYPERCALL_REP_START_MASK	GENMASK_ULL(59, 48)
390
-
391
-/* hypercall status code */
392
-#define HV_STATUS_SUCCESS			0
393
-#define HV_STATUS_INVALID_HYPERCALL_CODE	2
394
-#define HV_STATUS_INVALID_HYPERCALL_INPUT	3
395
-#define HV_STATUS_INVALID_ALIGNMENT		4
396
-#define HV_STATUS_INVALID_PARAMETER		5
397
-#define HV_STATUS_INSUFFICIENT_MEMORY		11
398
-#define HV_STATUS_INVALID_PORT_ID		17
399
-#define HV_STATUS_INVALID_CONNECTION_ID		18
400
-#define HV_STATUS_INSUFFICIENT_BUFFERS		19
401
-
402
-typedef struct _HV_REFERENCE_TSC_PAGE {
403
-	__u32 tsc_sequence;
404
-	__u32 res1;
405
-	__u64 tsc_scale;
406
-	__s64 tsc_offset;
407
-} HV_REFERENCE_TSC_PAGE, *PHV_REFERENCE_TSC_PAGE;
408
-
409
-/* Define the number of synthetic interrupt sources. */
410
-#define HV_SYNIC_SINT_COUNT		(16)
411
-/* Define the expected SynIC version. */
412
-#define HV_SYNIC_VERSION_1		(0x1)
413
-/* Valid SynIC vectors are 16-255. */
414
-#define HV_SYNIC_FIRST_VALID_VECTOR	(16)
415
-
416
-#define HV_SYNIC_CONTROL_ENABLE		(1ULL << 0)
417
-#define HV_SYNIC_SIMP_ENABLE		(1ULL << 0)
418
-#define HV_SYNIC_SIEFP_ENABLE		(1ULL << 0)
419
-#define HV_SYNIC_SINT_MASKED		(1ULL << 16)
420
-#define HV_SYNIC_SINT_AUTO_EOI		(1ULL << 17)
421
-#define HV_SYNIC_SINT_VECTOR_MASK	(0xFF)
422
-
423
-#define HV_SYNIC_STIMER_COUNT		(4)
424
-
425
-/* Define synthetic interrupt controller message constants. */
426
-#define HV_MESSAGE_SIZE			(256)
427
-#define HV_MESSAGE_PAYLOAD_BYTE_COUNT	(240)
428
-#define HV_MESSAGE_PAYLOAD_QWORD_COUNT	(30)
429259 
430260 /* Define hypervisor message types. */
431261 enum hv_message_type {
....@@ -436,85 +266,45 @@
436266 	HVMSG_GPA_INTERCEPT		= 0x80000001,
437267 
438268 	/* Timer notification messages. */
439
-	HVMSG_TIMER_EXPIRED			= 0x80000010,
269
+	HVMSG_TIMER_EXPIRED		= 0x80000010,
440270 
441271 	/* Error messages. */
442272 	HVMSG_INVALID_VP_REGISTER_VALUE	= 0x80000020,
443273 	HVMSG_UNRECOVERABLE_EXCEPTION	= 0x80000021,
444
-	HVMSG_UNSUPPORTED_FEATURE		= 0x80000022,
274
+	HVMSG_UNSUPPORTED_FEATURE	= 0x80000022,
445275 
446276 	/* Trace buffer complete messages. */
447277 	HVMSG_EVENTLOG_BUFFERCOMPLETE	= 0x80000040,
448278 
449279 	/* Platform-specific processor intercept messages. */
450
-	HVMSG_X64_IOPORT_INTERCEPT		= 0x80010000,
280
+	HVMSG_X64_IOPORT_INTERCEPT	= 0x80010000,
451281 	HVMSG_X64_MSR_INTERCEPT		= 0x80010001,
452
-	HVMSG_X64_CPUID_INTERCEPT		= 0x80010002,
282
+	HVMSG_X64_CPUID_INTERCEPT	= 0x80010002,
453283 	HVMSG_X64_EXCEPTION_INTERCEPT	= 0x80010003,
454
-	HVMSG_X64_APIC_EOI			= 0x80010004,
455
-	HVMSG_X64_LEGACY_FP_ERROR		= 0x80010005
284
+	HVMSG_X64_APIC_EOI		= 0x80010004,
285
+	HVMSG_X64_LEGACY_FP_ERROR	= 0x80010005
456286 };
457287 
458
-/* Define synthetic interrupt controller message flags. */
459
-union hv_message_flags {
460
-	__u8 asu8;
288
+struct hv_nested_enlightenments_control {
461289 	struct {
462
-		__u8 msg_pending:1;
463
-		__u8 reserved:7;
464
-	};
465
-};
466
-
467
-/* Define port identifier type. */
468
-union hv_port_id {
469
-	__u32 asu32;
290
+		__u32 directhypercall:1;
291
+		__u32 reserved:31;
292
+	} features;
470293 	struct {
471
-		__u32 id:24;
472
-		__u32 reserved:8;
473
-	} u;
474
-};
475
-
476
-/* Define synthetic interrupt controller message header. */
477
-struct hv_message_header {
478
-	__u32 message_type;
479
-	__u8 payload_size;
480
-	union hv_message_flags message_flags;
481
-	__u8 reserved[2];
482
-	union {
483
-		__u64 sender;
484
-		union hv_port_id port;
485
-	};
486
-};
487
-
488
-/* Define synthetic interrupt controller message format. */
489
-struct hv_message {
490
-	struct hv_message_header header;
491
-	union {
492
-		__u64 payload[HV_MESSAGE_PAYLOAD_QWORD_COUNT];
493
-	} u;
494
-};
495
-
496
-/* Define the synthetic interrupt message page layout. */
497
-struct hv_message_page {
498
-	struct hv_message sint_message[HV_SYNIC_SINT_COUNT];
499
-};
500
-
501
-/* Define timer message payload structure. */
502
-struct hv_timer_message_payload {
503
-	__u32 timer_index;
504
-	__u32 reserved;
505
-	__u64 expiration_time;	/* When the timer expired */
506
-	__u64 delivery_time;	/* When the message was delivered */
507
-};
294
+		__u32 reserved;
295
+	} hypercallControls;
296
+} __packed;
508297 
509298 /* Define virtual processor assist page structure. */
510299 struct hv_vp_assist_page {
511300 	__u32 apic_assist;
512
-	__u32 reserved;
513
-	__u64 vtl_control[2];
514
-	__u64 nested_enlightenments_control[2];
515
-	__u32 enlighten_vmentry;
301
+	__u32 reserved1;
302
+	__u64 vtl_control[3];
303
+	struct hv_nested_enlightenments_control nested_control;
304
+	__u8 enlighten_vmentry;
305
+	__u8 reserved2[7];
516306 	__u64 current_nested_vmcs;
517
-};
307
+} __packed;
518308 
519309 struct hv_enlightened_vmcs {
520310 	u32 revision_id;
....@@ -527,6 +317,8 @@
527317 	u16 host_fs_selector;
528318 	u16 host_gs_selector;
529319 	u16 host_tr_selector;
320
+
321
+	u16 padding16_1;
530322 
531323 	u64 host_ia32_pat;
532324 	u64 host_ia32_efer;
....@@ -646,7 +438,7 @@
646438 	u64 ept_pointer;
647439 
648440 	u16 virtual_processor_id;
649
-	u16 padding16[3];
441
+	u16 padding16_2[3];
650442 
651443 	u64 padding64_2[5];
652444 	u64 guest_physical_address;
....@@ -682,15 +474,15 @@
682474 	u64 guest_rip;
683475 
684476 	u32 hv_clean_fields;
685
-	u32 hv_padding_32;
477
+	u32 padding32_1;
686478 	u32 hv_synthetic_controls;
687479 	struct {
688480 		u32 nested_flush_hypercall:1;
689481 		u32 msr_bitmap:1;
690482 		u32 reserved:30;
691
-	} hv_enlightenments_control;
483
+	}  __packed hv_enlightenments_control;
692484 	u32 hv_vp_id;
693
-
485
+	u32 padding32_2;
694486 	u64 hv_vm_id;
695487 	u64 partition_assist_page;
696488 	u64 padding64_4[4];
....@@ -698,7 +490,7 @@
698490 	u64 padding64_5[7];
699491 	u64 xss_exit_bitmap;
700492 	u64 padding64_6[7];
701
-};
493
+} __packed;
702494 
703495 #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE			0
704496 #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_IO_BITMAP		BIT(0)
....@@ -720,52 +512,11 @@
720512 
721513 #define HV_VMX_ENLIGHTENED_CLEAN_FIELD_ALL			0xFFFF
722514 
723
-#define HV_STIMER_ENABLE		(1ULL << 0)
724
-#define HV_STIMER_PERIODIC		(1ULL << 1)
725
-#define HV_STIMER_LAZY			(1ULL << 2)
726
-#define HV_STIMER_AUTOENABLE		(1ULL << 3)
727
-#define HV_STIMER_SINT(config)		(__u8)(((config) >> 16) & 0x0F)
728
-
729
-struct hv_vpset {
730
-	u64 format;
731
-	u64 valid_bank_mask;
732
-	u64 bank_contents[];
515
+struct hv_partition_assist_pg {
516
+	u32 tlb_lock_count;
733517 };
734518 
735
-/* HvCallSendSyntheticClusterIpi hypercall */
736
-struct hv_send_ipi {
737
-	u32 vector;
738
-	u32 reserved;
739
-	u64 cpu_mask;
740
-};
741519 
742
-/* HvCallSendSyntheticClusterIpiEx hypercall */
743
-struct hv_send_ipi_ex {
744
-	u32 vector;
745
-	u32 reserved;
746
-	struct hv_vpset vp_set;
747
-};
748
-
749
-/* HvFlushGuestPhysicalAddressSpace hypercalls */
750
-struct hv_guest_mapping_flush {
751
-	u64 address_space;
752
-	u64 flags;
753
-};
754
-
755
-/* HvFlushVirtualAddressSpace, HvFlushVirtualAddressList hypercalls */
756
-struct hv_tlb_flush {
757
-	u64 address_space;
758
-	u64 flags;
759
-	u64 processor_mask;
760
-	u64 gva_list[];
761
-};
762
-
763
-/* HvFlushVirtualAddressSpaceEx, HvFlushVirtualAddressListEx hypercalls */
764
-struct hv_tlb_flush_ex {
765
-	u64 address_space;
766
-	u64 flags;
767
-	struct hv_vpset hv_vp_set;
768
-	u64 gva_list[];
769
-};
520
+#include <asm-generic/hyperv-tlfs.h>
770521 
771522 #endif