add dts config

hc

2023-12-06 08f87f769b595151be1afeff53e144f543faa614

 kernel/arch/sparc/kernel/head_32.S
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@@ -24,7 +24,7 @@
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 #include <asm/winmacro.h>
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 #include <asm/thread_info.h>	/* TI_UWINMASK */
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 #include <asm/errno.h>
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-#include <asm/pgtsrmmu.h>	/* SRMMU_PGDIR_SHIFT */
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+#include <asm/pgtable.h>	/* PGDIR_SHIFT */
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 #include <asm/export.h>
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 	.data
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@@ -273,7 +273,7 @@
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 		lda	[%o1] ASI_M_BYPASS, %o2		! This is the 0x0 16MB pgd
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 		/* Calculate to KERNBASE entry. */
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-		add	%o1, KERNBASE >> (SRMMU_PGDIR_SHIFT - 2), %o3
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+		add	%o1, KERNBASE >> (PGDIR_SHIFT - 2), %o3
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 		/* Poke the entry into the calculated address. */
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 		sta	%o2, [%o3] ASI_M_BYPASS
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@@ -317,7 +317,7 @@
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 		sll	%g1, 0x8, %g1			! make phys addr for l1 tbl
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 		lda	[%g1] ASI_M_BYPASS, %g2		! get level1 entry for 0x0
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-		add	%g1, KERNBASE >> (SRMMU_PGDIR_SHIFT - 2), %g3
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+		add	%g1, KERNBASE >> (PGDIR_SHIFT - 2), %g3
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 		sta	%g2, [%g3] ASI_M_BYPASS		! place at KERNBASE entry
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 		b	go_to_highmem
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 		 nop					! wheee....
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@@ -341,7 +341,7 @@
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 		sll	%g1, 0x8, %g1			! make phys addr for l1 tbl
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 		lda	[%g1] ASI_M_BYPASS, %g2		! get level1 entry for 0x0
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-		add	%g1, KERNBASE >> (SRMMU_PGDIR_SHIFT - 2), %g3
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+		add	%g1, KERNBASE >> (PGDIR_SHIFT - 2), %g3
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 		sta	%g2, [%g3] ASI_M_BYPASS		! place at KERNBASE entry
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 		b	go_to_highmem
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 		 nop					! wheee....