hc
2023-12-06 08f87f769b595151be1afeff53e144f543faa614
kernel/arch/riscv/kernel/perf_event.c
....@@ -147,7 +147,7 @@
147147 return riscv_pmu->hw_events[config];
148148 }
149149
150
-int riscv_map_cache_decode(u64 config, unsigned int *type,
150
+static int riscv_map_cache_decode(u64 config, unsigned int *type,
151151 unsigned int *op, unsigned int *result)
152152 {
153153 return -ENOENT;
....@@ -185,10 +185,10 @@
185185
186186 switch (idx) {
187187 case RISCV_PMU_CYCLE:
188
- val = csr_read(cycle);
188
+ val = csr_read(CSR_CYCLE);
189189 break;
190190 case RISCV_PMU_INSTRET:
191
- val = csr_read(instret);
191
+ val = csr_read(CSR_INSTRET);
192192 break;
193193 default:
194194 WARN_ON_ONCE(idx < 0 || idx > RISCV_MAX_COUNTERS);
....@@ -342,7 +342,7 @@
342342
343343 static DEFINE_MUTEX(pmc_reserve_mutex);
344344
345
-irqreturn_t riscv_base_pmu_handle_irq(int irq_num, void *dev)
345
+static irqreturn_t riscv_base_pmu_handle_irq(int irq_num, void *dev)
346346 {
347347 return IRQ_NONE;
348348 }
....@@ -361,7 +361,7 @@
361361 return err;
362362 }
363363
364
-void release_pmc_hardware(void)
364
+static void release_pmc_hardware(void)
365365 {
366366 mutex_lock(&pmc_reserve_mutex);
367367 if (riscv_pmu->irq >= 0)
....@@ -464,7 +464,7 @@
464464 { /* sentinel value */ }
465465 };
466466
467
-int __init init_hw_perf_events(void)
467
+static int __init init_hw_perf_events(void)
468468 {
469469 struct device_node *node = of_find_node_by_type(NULL, "pmu");
470470 const struct of_device_id *of_id;
....@@ -476,6 +476,7 @@
476476
477477 if (of_id)
478478 riscv_pmu = of_id->data;
479
+ of_node_put(node);
479480 }
480481
481482 perf_pmu_register(riscv_pmu->pmu, "cpu", PERF_TYPE_RAW);