.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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1 | 2 | /* |
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2 | 3 | * Copyright (C) 2001 Dave Engebretsen IBM Corporation |
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3 | | - * |
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4 | | - * This program is free software; you can redistribute it and/or modify |
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5 | | - * it under the terms of the GNU General Public License as published by |
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6 | | - * the Free Software Foundation; either version 2 of the License, or |
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7 | | - * (at your option) any later version. |
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8 | | - * |
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9 | | - * This program is distributed in the hope that it will be useful, |
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10 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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11 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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12 | | - * GNU General Public License for more details. |
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13 | | - * |
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14 | | - * You should have received a copy of the GNU General Public License |
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15 | | - * along with this program; if not, write to the Free Software |
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16 | | - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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17 | 4 | */ |
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18 | 5 | |
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19 | 6 | #include <linux/sched.h> |
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.. | .. |
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27 | 14 | #include <asm/machdep.h> |
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28 | 15 | #include <asm/rtas.h> |
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29 | 16 | #include <asm/firmware.h> |
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| 17 | +#include <asm/mce.h> |
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30 | 18 | |
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31 | 19 | #include "pseries.h" |
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32 | 20 | |
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.. | .. |
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50 | 38 | static irqreturn_t ras_epow_interrupt(int irq, void *dev_id); |
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51 | 39 | static irqreturn_t ras_error_interrupt(int irq, void *dev_id); |
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52 | 40 | |
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| 41 | +/* RTAS pseries MCE errorlog section. */ |
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| 42 | +struct pseries_mc_errorlog { |
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| 43 | + __be32 fru_id; |
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| 44 | + __be32 proc_id; |
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| 45 | + u8 error_type; |
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| 46 | + /* |
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| 47 | + * sub_err_type (1 byte). Bit fields depends on error_type |
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| 48 | + * |
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| 49 | + * MSB0 |
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| 50 | + * | |
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| 51 | + * V |
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| 52 | + * 01234567 |
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| 53 | + * XXXXXXXX |
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| 54 | + * |
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| 55 | + * For error_type == MC_ERROR_TYPE_UE |
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| 56 | + * XXXXXXXX |
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| 57 | + * X 1: Permanent or Transient UE. |
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| 58 | + * X 1: Effective address provided. |
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| 59 | + * X 1: Logical address provided. |
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| 60 | + * XX 2: Reserved. |
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| 61 | + * XXX 3: Type of UE error. |
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| 62 | + * |
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| 63 | + * For error_type != MC_ERROR_TYPE_UE |
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| 64 | + * XXXXXXXX |
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| 65 | + * X 1: Effective address provided. |
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| 66 | + * XXXXX 5: Reserved. |
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| 67 | + * XX 2: Type of SLB/ERAT/TLB error. |
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| 68 | + */ |
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| 69 | + u8 sub_err_type; |
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| 70 | + u8 reserved_1[6]; |
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| 71 | + __be64 effective_address; |
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| 72 | + __be64 logical_address; |
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| 73 | +} __packed; |
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| 74 | + |
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| 75 | +/* RTAS pseries MCE error types */ |
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| 76 | +#define MC_ERROR_TYPE_UE 0x00 |
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| 77 | +#define MC_ERROR_TYPE_SLB 0x01 |
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| 78 | +#define MC_ERROR_TYPE_ERAT 0x02 |
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| 79 | +#define MC_ERROR_TYPE_UNKNOWN 0x03 |
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| 80 | +#define MC_ERROR_TYPE_TLB 0x04 |
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| 81 | +#define MC_ERROR_TYPE_D_CACHE 0x05 |
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| 82 | +#define MC_ERROR_TYPE_I_CACHE 0x07 |
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| 83 | + |
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| 84 | +/* RTAS pseries MCE error sub types */ |
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| 85 | +#define MC_ERROR_UE_INDETERMINATE 0 |
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| 86 | +#define MC_ERROR_UE_IFETCH 1 |
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| 87 | +#define MC_ERROR_UE_PAGE_TABLE_WALK_IFETCH 2 |
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| 88 | +#define MC_ERROR_UE_LOAD_STORE 3 |
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| 89 | +#define MC_ERROR_UE_PAGE_TABLE_WALK_LOAD_STORE 4 |
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| 90 | + |
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| 91 | +#define UE_EFFECTIVE_ADDR_PROVIDED 0x40 |
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| 92 | +#define UE_LOGICAL_ADDR_PROVIDED 0x20 |
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| 93 | + |
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| 94 | +#define MC_ERROR_SLB_PARITY 0 |
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| 95 | +#define MC_ERROR_SLB_MULTIHIT 1 |
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| 96 | +#define MC_ERROR_SLB_INDETERMINATE 2 |
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| 97 | + |
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| 98 | +#define MC_ERROR_ERAT_PARITY 1 |
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| 99 | +#define MC_ERROR_ERAT_MULTIHIT 2 |
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| 100 | +#define MC_ERROR_ERAT_INDETERMINATE 3 |
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| 101 | + |
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| 102 | +#define MC_ERROR_TLB_PARITY 1 |
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| 103 | +#define MC_ERROR_TLB_MULTIHIT 2 |
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| 104 | +#define MC_ERROR_TLB_INDETERMINATE 3 |
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| 105 | + |
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| 106 | +static inline u8 rtas_mc_error_sub_type(const struct pseries_mc_errorlog *mlog) |
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| 107 | +{ |
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| 108 | + switch (mlog->error_type) { |
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| 109 | + case MC_ERROR_TYPE_UE: |
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| 110 | + return (mlog->sub_err_type & 0x07); |
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| 111 | + case MC_ERROR_TYPE_SLB: |
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| 112 | + case MC_ERROR_TYPE_ERAT: |
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| 113 | + case MC_ERROR_TYPE_TLB: |
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| 114 | + return (mlog->sub_err_type & 0x03); |
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| 115 | + default: |
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| 116 | + return 0; |
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| 117 | + } |
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| 118 | +} |
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53 | 119 | |
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54 | 120 | /* |
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55 | 121 | * Enable the hotplug interrupt late because processing them may touch other |
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.. | .. |
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188 | 254 | break; |
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189 | 255 | |
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190 | 256 | case EPOW_SYSTEM_SHUTDOWN: |
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191 | | - handle_system_shutdown(epow_log->event_modifier); |
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| 257 | + handle_system_shutdown(modifier); |
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192 | 258 | break; |
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193 | 259 | |
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194 | 260 | case EPOW_SYSTEM_HALT: |
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.. | .. |
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236 | 302 | * hotplug events on the ras_log_buf to be handled by rtas_errd. |
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237 | 303 | */ |
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238 | 304 | if (hp_elog->resource == PSERIES_HP_ELOG_RESOURCE_MEM || |
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239 | | - hp_elog->resource == PSERIES_HP_ELOG_RESOURCE_CPU) |
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240 | | - queue_hotplug_event(hp_elog, NULL, NULL); |
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| 305 | + hp_elog->resource == PSERIES_HP_ELOG_RESOURCE_CPU || |
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| 306 | + hp_elog->resource == PSERIES_HP_ELOG_RESOURCE_PMEM) |
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| 307 | + queue_hotplug_event(hp_elog); |
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241 | 308 | else |
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242 | 309 | log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, 0); |
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243 | 310 | |
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.. | .. |
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338 | 405 | return (struct rtas_error_log *)local_paca->mce_data_buf; |
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339 | 406 | } |
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340 | 407 | |
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| 408 | +static __be64 *fwnmi_get_savep(struct pt_regs *regs) |
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| 409 | +{ |
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| 410 | + unsigned long savep_ra; |
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| 411 | + |
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| 412 | + /* Mask top two bits */ |
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| 413 | + savep_ra = regs->gpr[3] & ~(0x3UL << 62); |
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| 414 | + if (!VALID_FWNMI_BUFFER(savep_ra)) { |
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| 415 | + printk(KERN_ERR "FWNMI: corrupt r3 0x%016lx\n", regs->gpr[3]); |
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| 416 | + return NULL; |
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| 417 | + } |
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| 418 | + |
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| 419 | + return __va(savep_ra); |
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| 420 | +} |
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| 421 | + |
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341 | 422 | /* |
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342 | 423 | * Get the error information for errors coming through the |
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343 | 424 | * FWNMI vectors. The pt_regs' r3 will be updated to reflect |
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.. | .. |
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355 | 436 | */ |
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356 | 437 | static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs) |
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357 | 438 | { |
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358 | | - unsigned long *savep; |
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359 | 439 | struct rtas_error_log *h; |
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| 440 | + __be64 *savep; |
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360 | 441 | |
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361 | | - /* Mask top two bits */ |
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362 | | - regs->gpr[3] &= ~(0x3UL << 62); |
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363 | | - |
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364 | | - if (!VALID_FWNMI_BUFFER(regs->gpr[3])) { |
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365 | | - printk(KERN_ERR "FWNMI: corrupt r3 0x%016lx\n", regs->gpr[3]); |
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| 442 | + savep = fwnmi_get_savep(regs); |
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| 443 | + if (!savep) |
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366 | 444 | return NULL; |
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367 | | - } |
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368 | 445 | |
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369 | | - savep = __va(regs->gpr[3]); |
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370 | | - regs->gpr[3] = be64_to_cpu(savep[0]); /* restore original r3 */ |
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| 446 | + regs->gpr[3] = be64_to_cpu(savep[0]); /* restore original r3 */ |
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371 | 447 | |
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372 | 448 | h = (struct rtas_error_log *)&savep[1]; |
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373 | 449 | /* Use the per cpu buffer from paca to store rtas error log */ |
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.. | .. |
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391 | 467 | */ |
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392 | 468 | static void fwnmi_release_errinfo(void) |
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393 | 469 | { |
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394 | | - int ret = rtas_call(rtas_token("ibm,nmi-interlock"), 0, 1, NULL); |
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| 470 | + struct rtas_args rtas_args; |
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| 471 | + int ret; |
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| 472 | + |
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| 473 | + /* |
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| 474 | + * On pseries, the machine check stack is limited to under 4GB, so |
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| 475 | + * args can be on-stack. |
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| 476 | + */ |
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| 477 | + rtas_call_unlocked(&rtas_args, ibm_nmi_interlock_token, 0, 1, NULL); |
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| 478 | + ret = be32_to_cpu(rtas_args.rets[0]); |
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395 | 479 | if (ret != 0) |
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396 | 480 | printk(KERN_ERR "FWNMI: nmi-interlock failed: %d\n", ret); |
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397 | 481 | } |
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.. | .. |
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414 | 498 | #endif |
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415 | 499 | |
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416 | 500 | if (fwnmi_active) { |
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417 | | - struct rtas_error_log *errhdr = fwnmi_get_errinfo(regs); |
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418 | | - if (errhdr) { |
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419 | | - /* XXX Should look at FWNMI information */ |
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420 | | - } |
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421 | | - fwnmi_release_errinfo(); |
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| 501 | + __be64 *savep; |
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| 502 | + |
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| 503 | + /* |
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| 504 | + * Firmware (PowerVM and KVM) saves r3 to a save area like |
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| 505 | + * machine check, which is not exactly what PAPR (2.9) |
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| 506 | + * suggests but there is no way to detect otherwise, so this |
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| 507 | + * is the interface now. |
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| 508 | + * |
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| 509 | + * System resets do not save any error log or require an |
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| 510 | + * "ibm,nmi-interlock" rtas call to release. |
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| 511 | + */ |
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| 512 | + |
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| 513 | + savep = fwnmi_get_savep(regs); |
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| 514 | + if (savep) |
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| 515 | + regs->gpr[3] = be64_to_cpu(savep[0]); /* restore original r3 */ |
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422 | 516 | } |
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423 | 517 | |
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424 | 518 | if (smp_handle_nmi_ipi(regs)) |
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425 | 519 | return 1; |
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426 | 520 | |
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427 | 521 | return 0; /* need to perform reset */ |
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| 522 | +} |
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| 523 | + |
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| 524 | +static int mce_handle_err_realmode(int disposition, u8 error_type) |
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| 525 | +{ |
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| 526 | +#ifdef CONFIG_PPC_BOOK3S_64 |
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| 527 | + if (disposition == RTAS_DISP_NOT_RECOVERED) { |
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| 528 | + switch (error_type) { |
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| 529 | + case MC_ERROR_TYPE_SLB: |
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| 530 | + case MC_ERROR_TYPE_ERAT: |
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| 531 | + /* |
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| 532 | + * Store the old slb content in paca before flushing. |
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| 533 | + * Print this when we go to virtual mode. |
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| 534 | + * There are chances that we may hit MCE again if there |
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| 535 | + * is a parity error on the SLB entry we trying to read |
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| 536 | + * for saving. Hence limit the slb saving to single |
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| 537 | + * level of recursion. |
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| 538 | + */ |
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| 539 | + if (local_paca->in_mce == 1) |
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| 540 | + slb_save_contents(local_paca->mce_faulty_slbs); |
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| 541 | + flush_and_reload_slb(); |
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| 542 | + disposition = RTAS_DISP_FULLY_RECOVERED; |
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| 543 | + break; |
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| 544 | + default: |
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| 545 | + break; |
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| 546 | + } |
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| 547 | + } else if (disposition == RTAS_DISP_LIMITED_RECOVERY) { |
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| 548 | + /* Platform corrected itself but could be degraded */ |
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| 549 | + pr_err("MCE: limited recovery, system may be degraded\n"); |
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| 550 | + disposition = RTAS_DISP_FULLY_RECOVERED; |
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| 551 | + } |
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| 552 | +#endif |
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| 553 | + return disposition; |
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| 554 | +} |
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| 555 | + |
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| 556 | +static int mce_handle_err_virtmode(struct pt_regs *regs, |
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| 557 | + struct rtas_error_log *errp, |
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| 558 | + struct pseries_mc_errorlog *mce_log, |
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| 559 | + int disposition) |
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| 560 | +{ |
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| 561 | + struct mce_error_info mce_err = { 0 }; |
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| 562 | + int initiator = rtas_error_initiator(errp); |
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| 563 | + int severity = rtas_error_severity(errp); |
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| 564 | + unsigned long eaddr = 0, paddr = 0; |
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| 565 | + u8 error_type, err_sub_type; |
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| 566 | + |
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| 567 | + if (!mce_log) |
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| 568 | + goto out; |
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| 569 | + |
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| 570 | + error_type = mce_log->error_type; |
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| 571 | + err_sub_type = rtas_mc_error_sub_type(mce_log); |
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| 572 | + |
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| 573 | + if (initiator == RTAS_INITIATOR_UNKNOWN) |
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| 574 | + mce_err.initiator = MCE_INITIATOR_UNKNOWN; |
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| 575 | + else if (initiator == RTAS_INITIATOR_CPU) |
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| 576 | + mce_err.initiator = MCE_INITIATOR_CPU; |
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| 577 | + else if (initiator == RTAS_INITIATOR_PCI) |
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| 578 | + mce_err.initiator = MCE_INITIATOR_PCI; |
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| 579 | + else if (initiator == RTAS_INITIATOR_ISA) |
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| 580 | + mce_err.initiator = MCE_INITIATOR_ISA; |
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| 581 | + else if (initiator == RTAS_INITIATOR_MEMORY) |
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| 582 | + mce_err.initiator = MCE_INITIATOR_MEMORY; |
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| 583 | + else if (initiator == RTAS_INITIATOR_POWERMGM) |
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| 584 | + mce_err.initiator = MCE_INITIATOR_POWERMGM; |
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| 585 | + else |
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| 586 | + mce_err.initiator = MCE_INITIATOR_UNKNOWN; |
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| 587 | + |
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| 588 | + if (severity == RTAS_SEVERITY_NO_ERROR) |
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| 589 | + mce_err.severity = MCE_SEV_NO_ERROR; |
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| 590 | + else if (severity == RTAS_SEVERITY_EVENT) |
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| 591 | + mce_err.severity = MCE_SEV_WARNING; |
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| 592 | + else if (severity == RTAS_SEVERITY_WARNING) |
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| 593 | + mce_err.severity = MCE_SEV_WARNING; |
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| 594 | + else if (severity == RTAS_SEVERITY_ERROR_SYNC) |
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| 595 | + mce_err.severity = MCE_SEV_SEVERE; |
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| 596 | + else if (severity == RTAS_SEVERITY_ERROR) |
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| 597 | + mce_err.severity = MCE_SEV_SEVERE; |
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| 598 | + else if (severity == RTAS_SEVERITY_FATAL) |
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| 599 | + mce_err.severity = MCE_SEV_FATAL; |
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| 600 | + else |
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| 601 | + mce_err.severity = MCE_SEV_FATAL; |
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| 602 | + |
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| 603 | + if (severity <= RTAS_SEVERITY_ERROR_SYNC) |
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| 604 | + mce_err.sync_error = true; |
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| 605 | + else |
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| 606 | + mce_err.sync_error = false; |
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| 607 | + |
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| 608 | + mce_err.error_type = MCE_ERROR_TYPE_UNKNOWN; |
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| 609 | + mce_err.error_class = MCE_ECLASS_UNKNOWN; |
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| 610 | + |
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| 611 | + switch (error_type) { |
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| 612 | + case MC_ERROR_TYPE_UE: |
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| 613 | + mce_err.error_type = MCE_ERROR_TYPE_UE; |
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| 614 | + mce_common_process_ue(regs, &mce_err); |
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| 615 | + if (mce_err.ignore_event) |
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| 616 | + disposition = RTAS_DISP_FULLY_RECOVERED; |
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| 617 | + switch (err_sub_type) { |
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| 618 | + case MC_ERROR_UE_IFETCH: |
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| 619 | + mce_err.u.ue_error_type = MCE_UE_ERROR_IFETCH; |
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| 620 | + break; |
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| 621 | + case MC_ERROR_UE_PAGE_TABLE_WALK_IFETCH: |
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| 622 | + mce_err.u.ue_error_type = MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH; |
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| 623 | + break; |
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| 624 | + case MC_ERROR_UE_LOAD_STORE: |
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| 625 | + mce_err.u.ue_error_type = MCE_UE_ERROR_LOAD_STORE; |
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| 626 | + break; |
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| 627 | + case MC_ERROR_UE_PAGE_TABLE_WALK_LOAD_STORE: |
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| 628 | + mce_err.u.ue_error_type = MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE; |
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| 629 | + break; |
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| 630 | + case MC_ERROR_UE_INDETERMINATE: |
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| 631 | + default: |
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| 632 | + mce_err.u.ue_error_type = MCE_UE_ERROR_INDETERMINATE; |
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| 633 | + break; |
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| 634 | + } |
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| 635 | + if (mce_log->sub_err_type & UE_EFFECTIVE_ADDR_PROVIDED) |
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| 636 | + eaddr = be64_to_cpu(mce_log->effective_address); |
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| 637 | + |
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| 638 | + if (mce_log->sub_err_type & UE_LOGICAL_ADDR_PROVIDED) { |
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| 639 | + paddr = be64_to_cpu(mce_log->logical_address); |
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| 640 | + } else if (mce_log->sub_err_type & UE_EFFECTIVE_ADDR_PROVIDED) { |
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| 641 | + unsigned long pfn; |
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| 642 | + |
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| 643 | + pfn = addr_to_pfn(regs, eaddr); |
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| 644 | + if (pfn != ULONG_MAX) |
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| 645 | + paddr = pfn << PAGE_SHIFT; |
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| 646 | + } |
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| 647 | + |
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| 648 | + break; |
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| 649 | + case MC_ERROR_TYPE_SLB: |
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| 650 | + mce_err.error_type = MCE_ERROR_TYPE_SLB; |
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| 651 | + switch (err_sub_type) { |
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| 652 | + case MC_ERROR_SLB_PARITY: |
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| 653 | + mce_err.u.slb_error_type = MCE_SLB_ERROR_PARITY; |
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| 654 | + break; |
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| 655 | + case MC_ERROR_SLB_MULTIHIT: |
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| 656 | + mce_err.u.slb_error_type = MCE_SLB_ERROR_MULTIHIT; |
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| 657 | + break; |
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| 658 | + case MC_ERROR_SLB_INDETERMINATE: |
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| 659 | + default: |
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| 660 | + mce_err.u.slb_error_type = MCE_SLB_ERROR_INDETERMINATE; |
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| 661 | + break; |
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| 662 | + } |
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| 663 | + if (mce_log->sub_err_type & 0x80) |
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| 664 | + eaddr = be64_to_cpu(mce_log->effective_address); |
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| 665 | + break; |
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| 666 | + case MC_ERROR_TYPE_ERAT: |
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| 667 | + mce_err.error_type = MCE_ERROR_TYPE_ERAT; |
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| 668 | + switch (err_sub_type) { |
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| 669 | + case MC_ERROR_ERAT_PARITY: |
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| 670 | + mce_err.u.erat_error_type = MCE_ERAT_ERROR_PARITY; |
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| 671 | + break; |
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| 672 | + case MC_ERROR_ERAT_MULTIHIT: |
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| 673 | + mce_err.u.erat_error_type = MCE_ERAT_ERROR_MULTIHIT; |
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| 674 | + break; |
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| 675 | + case MC_ERROR_ERAT_INDETERMINATE: |
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| 676 | + default: |
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| 677 | + mce_err.u.erat_error_type = MCE_ERAT_ERROR_INDETERMINATE; |
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| 678 | + break; |
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| 679 | + } |
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| 680 | + if (mce_log->sub_err_type & 0x80) |
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| 681 | + eaddr = be64_to_cpu(mce_log->effective_address); |
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| 682 | + break; |
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| 683 | + case MC_ERROR_TYPE_TLB: |
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| 684 | + mce_err.error_type = MCE_ERROR_TYPE_TLB; |
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| 685 | + switch (err_sub_type) { |
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| 686 | + case MC_ERROR_TLB_PARITY: |
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| 687 | + mce_err.u.tlb_error_type = MCE_TLB_ERROR_PARITY; |
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| 688 | + break; |
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| 689 | + case MC_ERROR_TLB_MULTIHIT: |
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| 690 | + mce_err.u.tlb_error_type = MCE_TLB_ERROR_MULTIHIT; |
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| 691 | + break; |
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| 692 | + case MC_ERROR_TLB_INDETERMINATE: |
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| 693 | + default: |
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| 694 | + mce_err.u.tlb_error_type = MCE_TLB_ERROR_INDETERMINATE; |
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| 695 | + break; |
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| 696 | + } |
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| 697 | + if (mce_log->sub_err_type & 0x80) |
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| 698 | + eaddr = be64_to_cpu(mce_log->effective_address); |
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| 699 | + break; |
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| 700 | + case MC_ERROR_TYPE_D_CACHE: |
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| 701 | + mce_err.error_type = MCE_ERROR_TYPE_DCACHE; |
---|
| 702 | + break; |
---|
| 703 | + case MC_ERROR_TYPE_I_CACHE: |
---|
| 704 | + mce_err.error_type = MCE_ERROR_TYPE_DCACHE; |
---|
| 705 | + break; |
---|
| 706 | + case MC_ERROR_TYPE_UNKNOWN: |
---|
| 707 | + default: |
---|
| 708 | + mce_err.error_type = MCE_ERROR_TYPE_UNKNOWN; |
---|
| 709 | + break; |
---|
| 710 | + } |
---|
| 711 | +out: |
---|
| 712 | + save_mce_event(regs, disposition == RTAS_DISP_FULLY_RECOVERED, |
---|
| 713 | + &mce_err, regs->nip, eaddr, paddr); |
---|
| 714 | + return disposition; |
---|
| 715 | +} |
---|
| 716 | + |
---|
| 717 | +static int mce_handle_error(struct pt_regs *regs, struct rtas_error_log *errp) |
---|
| 718 | +{ |
---|
| 719 | + struct pseries_errorlog *pseries_log; |
---|
| 720 | + struct pseries_mc_errorlog *mce_log = NULL; |
---|
| 721 | + int disposition = rtas_error_disposition(errp); |
---|
| 722 | + u8 error_type; |
---|
| 723 | + |
---|
| 724 | + if (!rtas_error_extended(errp)) |
---|
| 725 | + goto out; |
---|
| 726 | + |
---|
| 727 | + pseries_log = get_pseries_errorlog(errp, PSERIES_ELOG_SECT_ID_MCE); |
---|
| 728 | + if (!pseries_log) |
---|
| 729 | + goto out; |
---|
| 730 | + |
---|
| 731 | + mce_log = (struct pseries_mc_errorlog *)pseries_log->data; |
---|
| 732 | + error_type = mce_log->error_type; |
---|
| 733 | + |
---|
| 734 | + disposition = mce_handle_err_realmode(disposition, error_type); |
---|
| 735 | + |
---|
| 736 | + /* |
---|
| 737 | + * Enable translation as we will be accessing per-cpu variables |
---|
| 738 | + * in save_mce_event() which may fall outside RMO region, also |
---|
| 739 | + * leave it enabled because subsequently we will be queuing work |
---|
| 740 | + * to workqueues where again per-cpu variables accessed, besides |
---|
| 741 | + * fwnmi_release_errinfo() crashes when called in realmode on |
---|
| 742 | + * pseries. |
---|
| 743 | + * Note: All the realmode handling like flushing SLB entries for |
---|
| 744 | + * SLB multihit is done by now. |
---|
| 745 | + */ |
---|
| 746 | +out: |
---|
| 747 | + mtmsr(mfmsr() | MSR_IR | MSR_DR); |
---|
| 748 | + disposition = mce_handle_err_virtmode(regs, errp, mce_log, |
---|
| 749 | + disposition); |
---|
| 750 | + return disposition; |
---|
428 | 751 | } |
---|
429 | 752 | |
---|
430 | 753 | /* |
---|
.. | .. |
---|
447 | 770 | * Return 1 if corrected (or delivered a signal). |
---|
448 | 771 | * Return 0 if there is nothing we can do. |
---|
449 | 772 | */ |
---|
450 | | -static int recover_mce(struct pt_regs *regs, struct rtas_error_log *err) |
---|
| 773 | +static int recover_mce(struct pt_regs *regs, struct machine_check_event *evt) |
---|
451 | 774 | { |
---|
452 | 775 | int recovered = 0; |
---|
453 | | - int disposition = rtas_error_disposition(err); |
---|
454 | 776 | |
---|
455 | 777 | if (!(regs->msr & MSR_RI)) { |
---|
456 | 778 | /* If MSR_RI isn't set, we cannot recover */ |
---|
| 779 | + pr_err("Machine check interrupt unrecoverable: MSR(RI=0)\n"); |
---|
457 | 780 | recovered = 0; |
---|
458 | | - |
---|
459 | | - } else if (disposition == RTAS_DISP_FULLY_RECOVERED) { |
---|
| 781 | + } else if (evt->disposition == MCE_DISPOSITION_RECOVERED) { |
---|
460 | 782 | /* Platform corrected itself */ |
---|
461 | 783 | recovered = 1; |
---|
462 | | - |
---|
463 | | - } else if (disposition == RTAS_DISP_LIMITED_RECOVERY) { |
---|
464 | | - /* Platform corrected itself but could be degraded */ |
---|
465 | | - printk(KERN_ERR "MCE: limited recovery, system may " |
---|
466 | | - "be degraded\n"); |
---|
467 | | - recovered = 1; |
---|
468 | | - |
---|
469 | | - } else if (user_mode(regs) && !is_global_init(current) && |
---|
470 | | - rtas_error_severity(err) == RTAS_SEVERITY_ERROR_SYNC) { |
---|
471 | | - |
---|
472 | | - /* |
---|
473 | | - * If we received a synchronous error when in userspace |
---|
474 | | - * kill the task. Firmware may report details of the fail |
---|
475 | | - * asynchronously, so we can't rely on the target and type |
---|
476 | | - * fields being valid here. |
---|
477 | | - */ |
---|
478 | | - printk(KERN_ERR "MCE: uncorrectable error, killing task " |
---|
479 | | - "%s:%d\n", current->comm, current->pid); |
---|
480 | | - |
---|
481 | | - _exception(SIGBUS, regs, BUS_MCEERR_AR, regs->nip); |
---|
482 | | - recovered = 1; |
---|
| 784 | + } else if (evt->severity == MCE_SEV_FATAL) { |
---|
| 785 | + /* Fatal machine check */ |
---|
| 786 | + pr_err("Machine check interrupt is fatal\n"); |
---|
| 787 | + recovered = 0; |
---|
483 | 788 | } |
---|
484 | 789 | |
---|
485 | | - /* Queue irq work to log this rtas event later. */ |
---|
486 | | - irq_work_queue(&mce_errlog_process_work); |
---|
| 790 | + if (!recovered && evt->sync_error) { |
---|
| 791 | + /* |
---|
| 792 | + * Try to kill processes if we get a synchronous machine check |
---|
| 793 | + * (e.g., one caused by execution of this instruction). This |
---|
| 794 | + * will devolve into a panic if we try to kill init or are in |
---|
| 795 | + * an interrupt etc. |
---|
| 796 | + * |
---|
| 797 | + * TODO: Queue up this address for hwpoisioning later. |
---|
| 798 | + * TODO: This is not quite right for d-side machine |
---|
| 799 | + * checks ->nip is not necessarily the important |
---|
| 800 | + * address. |
---|
| 801 | + */ |
---|
| 802 | + if ((user_mode(regs))) { |
---|
| 803 | + _exception(SIGBUS, regs, BUS_MCEERR_AR, regs->nip); |
---|
| 804 | + recovered = 1; |
---|
| 805 | + } else if (die_will_crash()) { |
---|
| 806 | + /* |
---|
| 807 | + * die() would kill the kernel, so better to go via |
---|
| 808 | + * the platform reboot code that will log the |
---|
| 809 | + * machine check. |
---|
| 810 | + */ |
---|
| 811 | + recovered = 0; |
---|
| 812 | + } else { |
---|
| 813 | + die("Machine check", regs, SIGBUS); |
---|
| 814 | + recovered = 1; |
---|
| 815 | + } |
---|
| 816 | + } |
---|
487 | 817 | |
---|
488 | 818 | return recovered; |
---|
489 | 819 | } |
---|
.. | .. |
---|
500 | 830 | */ |
---|
501 | 831 | int pSeries_machine_check_exception(struct pt_regs *regs) |
---|
502 | 832 | { |
---|
| 833 | + struct machine_check_event evt; |
---|
| 834 | + |
---|
| 835 | + if (!get_mce_event(&evt, MCE_EVENT_RELEASE)) |
---|
| 836 | + return 0; |
---|
| 837 | + |
---|
| 838 | + /* Print things out */ |
---|
| 839 | + if (evt.version != MCE_V1) { |
---|
| 840 | + pr_err("Machine Check Exception, Unknown event version %d !\n", |
---|
| 841 | + evt.version); |
---|
| 842 | + return 0; |
---|
| 843 | + } |
---|
| 844 | + machine_check_print_event_info(&evt, user_mode(regs), false); |
---|
| 845 | + |
---|
| 846 | + if (recover_mce(regs, &evt)) |
---|
| 847 | + return 1; |
---|
| 848 | + |
---|
| 849 | + return 0; |
---|
| 850 | +} |
---|
| 851 | + |
---|
| 852 | +long pseries_machine_check_realmode(struct pt_regs *regs) |
---|
| 853 | +{ |
---|
503 | 854 | struct rtas_error_log *errp; |
---|
| 855 | + int disposition; |
---|
504 | 856 | |
---|
505 | 857 | if (fwnmi_active) { |
---|
506 | 858 | errp = fwnmi_get_errinfo(regs); |
---|
| 859 | + /* |
---|
| 860 | + * Call to fwnmi_release_errinfo() in real mode causes kernel |
---|
| 861 | + * to panic. Hence we will call it as soon as we go into |
---|
| 862 | + * virtual mode. |
---|
| 863 | + */ |
---|
| 864 | + disposition = mce_handle_error(regs, errp); |
---|
507 | 865 | fwnmi_release_errinfo(); |
---|
508 | | - if (errp && recover_mce(regs, errp)) |
---|
| 866 | + |
---|
| 867 | + /* Queue irq work to log this rtas event later. */ |
---|
| 868 | + irq_work_queue(&mce_errlog_process_work); |
---|
| 869 | + |
---|
| 870 | + if (disposition == RTAS_DISP_FULLY_RECOVERED) |
---|
509 | 871 | return 1; |
---|
510 | 872 | } |
---|
511 | 873 | |
---|