add dts config

hc

2023-12-06 08f87f769b595151be1afeff53e144f543faa614

 kernel/arch/powerpc/include/asm/processor.h
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@@ -1,13 +1,9 @@
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+/* SPDX-License-Identifier: GPL-2.0-or-later */
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 #ifndef _ASM_POWERPC_PROCESSOR_H
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 #define _ASM_POWERPC_PROCESSOR_H
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4
 
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 /*
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  * Copyright (C) 2001 PPC 64 Team, IBM Corp
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- *
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- * This program is free software; you can redistribute it and/or
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- * modify it under the terms of the GNU General Public License
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- * as published by the Free Software Foundation; either version
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- * 2 of the License, or (at your option) any later version.
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  */
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8
 
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 #include <asm/reg.h>
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@@ -32,15 +28,15 @@
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 /* Default SMT priority is set to 3. Use 11- 13bits to save priority. */
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 #define PPR_PRIORITY 3
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 #ifdef __ASSEMBLY__
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-#define INIT_PPR (PPR_PRIORITY << 50)
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+#define DEFAULT_PPR (PPR_PRIORITY << 50)
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 #else
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-#define INIT_PPR ((u64)PPR_PRIORITY << 50)
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+#define DEFAULT_PPR ((u64)PPR_PRIORITY << 50)
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 #endif /* __ASSEMBLY__ */
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 #endif /* CONFIG_PPC64 */
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 #ifndef __ASSEMBLY__
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 #include <linux/types.h>
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-#include <asm/thread_info.h>
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+#include <linux/thread_info.h>
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 #include <asm/ptrace.h>
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 #include <asm/hw_breakpoint.h>
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@@ -67,12 +63,6 @@
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 #endif /* defined(__KERNEL__) && defined(CONFIG_PPC32) */
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65
 
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-/*
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- * Default implementation of macro that returns current
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- * instruction pointer ("program counter").
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- */
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-#define current_text_addr() ({ __label__ _l; _l: &&_l;})
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-
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 /* Macros for adjusting thread priority (hardware multi-threading) */
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 #define HMT_very_low()   asm volatile("or 31,31,31   # very low priority")
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 #define HMT_low()	 asm volatile("or 1,1,1	     # low priority")
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@@ -83,109 +73,15 @@
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 #ifdef __KERNEL__
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+#ifdef CONFIG_PPC64
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+#include <asm/task_size_64.h>
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+#else
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+#include <asm/task_size_32.h>
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+#endif
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+
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 struct task_struct;
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 void start_thread(struct pt_regs *regs, unsigned long fdptr, unsigned long sp);
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 void release_thread(struct task_struct *);
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-
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-#ifdef CONFIG_PPC32
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-
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-#if CONFIG_TASK_SIZE > CONFIG_KERNEL_START
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-#error User TASK_SIZE overlaps with KERNEL_START address
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-#endif
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-#define TASK_SIZE	(CONFIG_TASK_SIZE)
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-
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-/* This decides where the kernel will search for a free chunk of vm
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- * space during mmap's.
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- */
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-#define TASK_UNMAPPED_BASE	(TASK_SIZE / 8 * 3)
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-#endif
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-
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-#ifdef CONFIG_PPC64
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-/*
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- * 64-bit user address space can have multiple limits
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- * For now supported values are:
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- */
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-#define TASK_SIZE_64TB  (0x0000400000000000UL)
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-#define TASK_SIZE_128TB (0x0000800000000000UL)
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-#define TASK_SIZE_512TB (0x0002000000000000UL)
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-#define TASK_SIZE_1PB   (0x0004000000000000UL)
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-#define TASK_SIZE_2PB   (0x0008000000000000UL)
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-/*
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- * With 52 bits in the address we can support
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- * upto 4PB of range.
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- */
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-#define TASK_SIZE_4PB   (0x0010000000000000UL)
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-
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-/*
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- * For now 512TB is only supported with book3s and 64K linux page size.
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- */
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-#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_PPC_64K_PAGES)
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-/*
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- * Max value currently used:
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- */
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-#define TASK_SIZE_USER64		TASK_SIZE_4PB
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-#define DEFAULT_MAP_WINDOW_USER64	TASK_SIZE_128TB
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-#define TASK_CONTEXT_SIZE		TASK_SIZE_512TB
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-#else
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-#define TASK_SIZE_USER64		TASK_SIZE_64TB
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-#define DEFAULT_MAP_WINDOW_USER64	TASK_SIZE_64TB
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-/*
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- * We don't need to allocate extended context ids for 4K page size, because
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- * we limit the max effective address on this config to 64TB.
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- */
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-#define TASK_CONTEXT_SIZE		TASK_SIZE_64TB
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-#endif
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-
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-/*
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- * 32-bit user address space is 4GB - 1 page
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- * (this 1 page is needed so referencing of 0xFFFFFFFF generates EFAULT
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- */
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-#define TASK_SIZE_USER32 (0x0000000100000000UL - (1*PAGE_SIZE))
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-
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-#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
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-		TASK_SIZE_USER32 : TASK_SIZE_USER64)
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-#define TASK_SIZE	  TASK_SIZE_OF(current)
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-/* This decides where the kernel will search for a free chunk of vm
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- * space during mmap's.
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- */
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-#define TASK_UNMAPPED_BASE_USER32 (PAGE_ALIGN(TASK_SIZE_USER32 / 4))
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-#define TASK_UNMAPPED_BASE_USER64 (PAGE_ALIGN(DEFAULT_MAP_WINDOW_USER64 / 4))
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-
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-#define TASK_UNMAPPED_BASE ((is_32bit_task()) ? \
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-		TASK_UNMAPPED_BASE_USER32 : TASK_UNMAPPED_BASE_USER64 )
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-#endif
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-
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-/*
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- * Initial task size value for user applications. For book3s 64 we start
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- * with 128TB and conditionally enable upto 512TB
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- */
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-#ifdef CONFIG_PPC_BOOK3S_64
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-#define DEFAULT_MAP_WINDOW	((is_32bit_task()) ?			\
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-				 TASK_SIZE_USER32 : DEFAULT_MAP_WINDOW_USER64)
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-#else
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-#define DEFAULT_MAP_WINDOW	TASK_SIZE
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-#endif
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-
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-#ifdef __powerpc64__
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-
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-#define STACK_TOP_USER64 DEFAULT_MAP_WINDOW_USER64
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-#define STACK_TOP_USER32 TASK_SIZE_USER32
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-
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-#define STACK_TOP (is_32bit_task() ? \
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-		   STACK_TOP_USER32 : STACK_TOP_USER64)
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-
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-#define STACK_TOP_MAX TASK_SIZE_USER64
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-
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-#else /* __powerpc64__ */
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-
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-#define STACK_TOP TASK_SIZE
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-#define STACK_TOP_MAX	STACK_TOP
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-
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-#endif /* __powerpc64__ */
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-
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-typedef struct {
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-	unsigned long seg;
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-} mm_segment_t;
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 #define TS_FPR(i) fp_state.fpr[i][TS_FPROFFSET]
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 #define TS_CKFPR(i) ckfp_state.fpr[i][TS_FPROFFSET]
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@@ -248,7 +144,6 @@
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 	unsigned long	ksp_vsid;
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 #endif
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 	struct pt_regs	*regs;		/* Pointer to saved register state */
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-	mm_segment_t	addr_limit;	/* for get_fs() validation */
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 #ifdef CONFIG_BOOKE
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 	/* BookE base exception scratch space; align on cacheline */
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 	unsigned long	normsave[8] ____cacheline_aligned;
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@@ -256,6 +151,22 @@
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 #ifdef CONFIG_PPC32
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 	void		*pgdir;		/* root of page-table tree */
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 	unsigned long	ksp_limit;	/* if ksp <= ksp_limit stack overflow */
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+#ifdef CONFIG_PPC_RTAS
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+	unsigned long	rtas_sp;	/* stack pointer for when in RTAS */
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+#endif
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+#endif
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+#if defined(CONFIG_PPC_BOOK3S_32) && defined(CONFIG_PPC_KUAP)
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+	unsigned long	kuap;		/* opened segments for user access */
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+#endif
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+#ifdef CONFIG_VMAP_STACK
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+	unsigned long	srr0;
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+	unsigned long	srr1;
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+	unsigned long	dar;
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+	unsigned long	dsisr;
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+#ifdef CONFIG_PPC_BOOK3S_32
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+	unsigned long	r0, r3, r4, r5, r6, r8, r9, r11;
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+	unsigned long	lr, ctr;
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+#endif
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 #endif
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 	/* Debug Registers */
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 	struct debug_reg debug;
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@@ -264,15 +175,16 @@
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 	int		fpexc_mode;	/* floating-point exception mode */
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 	unsigned int	align_ctl;	/* alignment handling control */
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 #ifdef CONFIG_HAVE_HW_BREAKPOINT
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-	struct perf_event *ptrace_bps[HBP_NUM];
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+	struct perf_event *ptrace_bps[HBP_NUM_MAX];
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 	/*
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 	 * Helps identify source of single-step exception and subsequent
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 	 * hw-breakpoint enablement
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 	 */
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-	struct perf_event *last_hit_ubp;
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+	struct perf_event *last_hit_ubp[HBP_NUM_MAX];
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 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
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-	struct arch_hw_breakpoint hw_brk; /* info on the hardware breakpoint */
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+	struct arch_hw_breakpoint hw_brk[HBP_NUM_MAX]; /* hardware breakpoint info */
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 	unsigned long	trap_nr;	/* last trap # on this thread */
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+	u8 load_slb;			/* Ages out SLB preload cache entries */
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 	u8 load_fp;
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 #ifdef CONFIG_ALTIVEC
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 	u8 load_vec;
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@@ -303,6 +215,7 @@
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 	unsigned long	tm_tar;
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 	unsigned long	tm_ppr;
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 	unsigned long	tm_dscr;
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+	unsigned long   tm_amr;
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 	/*
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 	 * Checkpointed FP and VSX 0-31 register set.
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@@ -320,7 +233,6 @@
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 #ifdef CONFIG_PPC_MEM_KEYS
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 	unsigned long	amr;
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 	unsigned long	iamr;
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-	unsigned long	uamor;
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 #endif
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 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
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 	void*		kvm_shadow_vcpu; /* KVM internal data */
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@@ -341,7 +253,6 @@
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 	 * onwards.
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 	 */
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 	int		dscr_inherit;
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-	unsigned long	ppr;	/* used to save/restore SMT priority */
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 	unsigned long	tidr;
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 #endif
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 #ifdef CONFIG_PPC_BOOK3S_64
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@@ -356,15 +267,17 @@
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 	unsigned 	mmcr0;
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 	unsigned 	used_ebb;
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-	unsigned int	used_vas;
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+	unsigned long   mmcr3;
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+	unsigned long   sier2;
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+	unsigned long   sier3;
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+
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 #endif
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 };
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 #define ARCH_MIN_TASKALIGN 16
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 #define INIT_SP		(sizeof(init_stack) + (unsigned long) &init_stack)
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-#define INIT_SP_LIMIT \
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-	(_ALIGN_UP(sizeof(init_thread_info), 16) + (unsigned long) &init_stack)
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+#define INIT_SP_LIMIT	((unsigned long)&init_stack)
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 #ifdef CONFIG_SPE
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 #define SPEFSCR_INIT \
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@@ -378,7 +291,6 @@
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 #define INIT_THREAD { \
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 	.ksp = INIT_SP, \
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 	.ksp_limit = INIT_SP_LIMIT, \
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-	.addr_limit = KERNEL_DS, \
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 	.pgdir = swapper_pg_dir, \
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 	.fpexc_mode = MSR_FE0 | MSR_FE1, \
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 	SPEFSCR_INIT \
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@@ -386,14 +298,11 @@
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 #else
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 #define INIT_THREAD  { \
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 	.ksp = INIT_SP, \
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-	.addr_limit = KERNEL_DS, \
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 	.fpexc_mode = 0, \
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-	.ppr = INIT_PPR, \
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-	.fscr = FSCR_TAR | FSCR_EBB \
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 }
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 #endif
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-#define task_pt_regs(tsk)	((struct pt_regs *)(tsk)->thread.regs)
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+#define task_pt_regs(tsk)	((tsk)->thread.regs)
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 unsigned long get_wchan(struct task_struct *p);
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@@ -440,8 +349,6 @@
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 #define spin_begin()	HMT_low()
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 #define spin_cpu_relax()	barrier()
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-
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-#define spin_cpu_yield()	spin_cpu_relax()
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 #define spin_end()	HMT_medium()
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@@ -505,24 +412,24 @@
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 }
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 #endif
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+/* asm stubs */
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+extern unsigned long isa300_idle_stop_noloss(unsigned long psscr_val);
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+extern unsigned long isa300_idle_stop_mayloss(unsigned long psscr_val);
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+extern unsigned long isa206_idle_insn_mayloss(unsigned long type);
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+#ifdef CONFIG_PPC_970_NAP
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+extern void power4_idle_nap(void);
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+#endif
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+
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 extern unsigned long cpuidle_disable;
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 enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};
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 extern int powersave_nap;	/* set if nap mode can be used in idle loop */
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-extern unsigned long power7_idle_insn(unsigned long type); /* PNV_THREAD_NAP/etc*/
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+
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 extern void power7_idle_type(unsigned long type);
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-extern unsigned long power9_idle_stop(unsigned long psscr_val);
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-extern unsigned long power9_offline_stop(unsigned long psscr_val);
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-extern void power9_idle_type(unsigned long stop_psscr_val,
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+extern void arch300_idle_type(unsigned long stop_psscr_val,
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 			      unsigned long stop_psscr_mask);
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-extern void flush_instruction_cache(void);
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-extern void hard_reset_now(void);
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-extern void poweroff_now(void);
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 extern int fix_alignment(struct pt_regs *);
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-extern void cvt_fd(float *from, double *to);
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-extern void cvt_df(double *from, float *to);
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-extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
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 #ifdef CONFIG_PPC64
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 /*