| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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| 1 | 2 | /* |
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| 2 | 3 | * Keymile kmcent2 Device Tree Source, based on T1040RDB DTS |
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| 3 | 4 | * |
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| .. | .. |
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| 5 | 6 | * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com |
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| 6 | 7 | * |
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| 7 | 8 | * Copyright 2014 - 2015 Freescale Semiconductor Inc. |
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| 8 | | - * |
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| 9 | | - * This program is free software; you can redistribute it and/or modify it |
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| 10 | | - * under the terms of the GNU General Public License as published by the |
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| 11 | | - * Free Software Foundation; either version 2 of the License, or (at your |
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| 12 | | - * option) any later version. |
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| 13 | 9 | */ |
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| 14 | 10 | |
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| 15 | 11 | /include/ "t104xsi-pre.dtsi" |
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| .. | .. |
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| 214 | 210 | |
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| 215 | 211 | fman@400000 { |
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| 216 | 212 | ethernet@e0000 { |
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| 217 | | - fixed-link = <0 1 1000 0 0>; |
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| 218 | | - phy-connection-type = "sgmii"; |
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| 213 | + phy-mode = "sgmii"; |
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| 214 | + fixed-link { |
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| 215 | + speed = <1000>; |
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| 216 | + full-duplex; |
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| 217 | + }; |
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| 219 | 218 | }; |
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| 220 | 219 | |
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| 221 | 220 | ethernet@e2000 { |
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| 222 | | - fixed-link = <1 1 1000 0 0>; |
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| 223 | | - phy-connection-type = "sgmii"; |
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| 221 | + phy-mode = "sgmii"; |
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| 222 | + fixed-link { |
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| 223 | + speed = <1000>; |
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| 224 | + full-duplex; |
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| 225 | + }; |
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| 224 | 226 | }; |
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| 225 | 227 | |
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| 226 | 228 | ethernet@e4000 { |
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| .. | .. |
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| 233 | 235 | |
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| 234 | 236 | ethernet@e8000 { |
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| 235 | 237 | phy-handle = <&front_phy>; |
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| 236 | | - phy-connection-type = "rgmii"; |
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| 238 | + phy-mode = "rgmii-id"; |
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| 237 | 239 | }; |
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| 238 | 240 | |
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| 239 | 241 | mdio0: mdio@fc000 { |
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| .. | .. |
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| 262 | 264 | |
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| 263 | 265 | pci1: pcie@ffe250000 { |
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| 264 | 266 | status = "disabled"; |
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| 267 | + reg = <0xf 0xfe250000 0 0x10000>; |
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| 268 | + ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000 |
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| 269 | + 0x01000000 0 0 0xf 0xf8010000 0 0x00010000>; |
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| 270 | + pcie@0 { |
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| 271 | + ranges = <0x02000000 0 0xe0000000 |
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| 272 | + 0x02000000 0 0xe0000000 |
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| 273 | + 0 0x10000000 |
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| 274 | + |
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| 275 | + 0x01000000 0 0x00000000 |
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| 276 | + 0x01000000 0 0x00000000 |
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| 277 | + 0 0x00010000>; |
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| 278 | + }; |
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| 265 | 279 | }; |
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| 266 | 280 | |
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| 267 | 281 | pci2: pcie@ffe260000 { |
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| 268 | 282 | status = "disabled"; |
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| 283 | + reg = <0xf 0xfe260000 0 0x10000>; |
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| 284 | + ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000 |
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| 285 | + 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; |
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| 286 | + pcie@0 { |
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| 287 | + ranges = <0x02000000 0 0xe0000000 |
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| 288 | + 0x02000000 0 0xe0000000 |
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| 289 | + 0 0x10000000 |
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| 290 | + |
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| 291 | + 0x01000000 0 0x00000000 |
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| 292 | + 0x01000000 0 0x00000000 |
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| 293 | + 0 0x00010000>; |
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| 294 | + }; |
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| 269 | 295 | }; |
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| 270 | 296 | |
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| 271 | 297 | pci3: pcie@ffe270000 { |
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| 272 | 298 | status = "disabled"; |
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| 299 | + reg = <0xf 0xfe270000 0 0x10000>; |
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| 300 | + ranges = <0x02000000 0 0xe0000000 0xc 0x30000000 0 0x10000000 |
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| 301 | + 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>; |
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| 302 | + pcie@0 { |
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| 303 | + ranges = <0x02000000 0 0xe0000000 |
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| 304 | + 0x02000000 0 0xe0000000 |
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| 305 | + 0 0x10000000 |
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| 306 | + |
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| 307 | + 0x01000000 0 0x00000000 |
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| 308 | + 0x01000000 0 0x00000000 |
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| 309 | + 0 0x00010000>; |
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| 310 | + }; |
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| 273 | 311 | }; |
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| 274 | 312 | |
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| 275 | 313 | qe: qe@ffe140000 { |
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