hc
2023-12-06 08f87f769b595151be1afeff53e144f543faa614
kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
....@@ -69,7 +69,9 @@
6969 regulator-name = "vcc3v3_pcie";
7070 regulator-min-microvolt = <3300000>;
7171 regulator-max-microvolt = <3300000>;
72
+ regulator-always-on;
7273 enable-active-high;
74
+ regulator-boot-on;
7375 gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
7476 startup-delay-us = <5000>;
7577 vin-supply = <&dc_12v>;
....@@ -148,17 +150,10 @@
148150 gpio_function = <0>;
149151 };
150152
151
- usb_ogt {
152
- gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; //OTG_EN_OC_GPIO0_C2
153
+ wifi_power_en {
154
+ gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
153155 gpio_function = <0>;
154156 };
155
-
156
- m2_wifi_pwr {
157
- gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;//WIFI_PWREN_GPIO3_C6_1V8
158
- gpio_function = <0>;
159
- };
160
-
161
-
162157 #if 0
163158 do1 {
164159 gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
....@@ -225,8 +220,9 @@
225220 compatible = "simple-panel";
226221 backlight = <&backlight>;
227222 power-supply = <&vcc3v3_lcd0_n>;
228
- enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
229
- edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_PWBLK_H_GPIO0_B7
223
+ enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
224
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
225
+ edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
230226 edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
231227 bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
232228 bpc = <8>;
....@@ -239,8 +235,8 @@
239235 nodka-lvds = <15>;
240236
241237 display-timings {
242
- native-mode = <&timing>;
243
- timing: timing {
238
+ native-mode = <&timing0>;
239
+ timing0: timing0 {
244240 clock-frequency = <72500000>;
245241 hactive = <1280>;
246242 vactive = <800>;
....@@ -256,9 +252,9 @@
256252 pixelclk-active = <0>;
257253 };
258254 };
259
- port {
260
- panel_in_lvds: endpoint {
261
- remote-endpoint = <&lvds_out>;
255
+ ports {
256
+ panel_in: endpoint {
257
+ remote-endpoint = <&edp_out>;
262258 };
263259 };
264260 };
....@@ -348,6 +344,10 @@
348344 * video_phy1 needs to be enabled
349345 * when dsi1 is enabled
350346 */
347
+
348
+&video_phy1 {
349
+ status = "okay";
350
+};
351351 &dsi1 {
352352 status = "disabled";
353353 };
....@@ -357,39 +357,40 @@
357357 };
358358
359359 &dsi1_in_vp1 {
360
- status = "disabled";
360
+ status = "okay";
361361 };
362362
363363 &dsi1_panel {
364
- power-supply = <&vcc3v3_lcd1_n>;
364
+ power-supply = <&vcc3v3_lcd1_n>; //MIPI_3V3EN_GPIO3_A3_d_3V3
365
+ vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
366
+ reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
367
+ vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
368
+ pinctrl-names = "default";
369
+ pinctrl-0 = <&lcd1_rst_gpio>;
365370 };
371
+
372
+&route_dsi1 {
373
+ status = "disabled";
374
+ connect = <&vp1_out_dsi1>;
375
+};
376
+
377
+
378
+/*
379
+* edp_start
380
+*/
366381
367382 &edp {
368
- //hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
369383 force-hpd;
370384 status = "okay";
371
-};
372
-
373
-&lvds {
374
- status = "disabled";
375385 ports {
376386 port@1 {
377387 reg = <1>;
378
- lvds_out: endpoint {
379
- remote-endpoint = <&panel_in_lvds>;
388
+ edp_out: endpoint {
389
+ remote-endpoint = <&panel_in>;
380390 };
381391 };
382392
383393 };
384
-};
385
-
386
-&route_lvds{
387
- status = "disabled";
388
- connect = <&vp2_out_lvds>;
389
-};
390
-
391
-&lvds_in_vp2 {
392
- status = "disabled";
393394 };
394395
395396 &edp_phy {
....@@ -410,7 +411,9 @@
410411 connect = <&vp1_out_edp>;
411412 };
412413
413
-
414
+&route_edp {
415
+ status = "okay";
416
+};
414417 /*
415418 * edp_end
416419 */
....@@ -625,20 +628,14 @@
625628 };
626629 };
627630
628
-&video_phy0 {
629
- status = "okay";
630
-};
631631
632
-&video_phy1 {
633
- status = "disabled";
634
-};
635632
636633 &pcie30phy {
637634 status = "okay";
638635 };
639636
640
-&pcie3x2 {
641
- reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
637
+&pcie2x1 {
638
+ reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
642639 vpcie3v3-supply = <&vcc3v3_pcie>;
643640 status = "okay";
644641 };
....@@ -694,10 +691,6 @@
694691 <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
695692 <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
696693 <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
697
- <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, //12
698
- <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, //13
699
- <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, //16
700
- <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, //17
701694 <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,//93 SPI2_CS0_M1_3V3
702695 <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,//94 SPI2_MOSI_M1_3V3
703696 <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>,//95 SPI2_MISO_M1_3V3
....@@ -799,13 +792,13 @@
799792 };
800793
801794 &uart0 {
802
- status = "disabled";
795
+ status = "okay";
803796 };
804797
805798 &uart1 {
806799 pinctrl-names = "default";
807800 pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
808
- status = "disabled";
801
+ status = "okay";
809802 };
810803
811804 &uart3 {
....@@ -824,11 +817,11 @@
824817 };
825818
826819 &uart7 {
827
- status = "disabled";
820
+ status = "okay";
828821 pinctrl-0 = <&uart7m1_xfer>;
829822 };
830823
831824 &uart9 {
832
- status = "disabled";
825
+ status = "okay";
833826 pinctrl-0 = <&uart9m1_xfer>;
834827 };