add dts config

hc

2023-12-06 08f87f769b595151be1afeff53e144f543faa614

 kernel/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
..
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@@ -22,10 +22,13 @@
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 		stdout-path = "serial0:115200n8";
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 	};
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-	memory@48000000 {
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-		device_type = "memory";
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-		/* first 128MB is reserved for secure area. */
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-		reg = <0 0x48000000 0 0x78000000>;
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+	d1_8v: regulator-2 {
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+		compatible = "regulator-fixed";
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+		regulator-name = "D1.8V";
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+		regulator-min-microvolt = <1800000>;
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+		regulator-max-microvolt = <1800000>;
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+		regulator-boot-on;
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+		regulator-always-on;
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 	};
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 	d3_3v: regulator-0 {
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@@ -37,6 +40,47 @@
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 		regulator-always-on;
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 	};
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+	hdmi-out {
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+		compatible = "hdmi-connector";
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+		type = "a";
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+
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+		port {
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+			hdmi_con: endpoint {
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+				remote-endpoint = <&adv7511_out>;
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+			};
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+		};
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+	};
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+
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+	lvds-decoder {
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+		compatible = "thine,thc63lvd1024";
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+		vcc-supply = <&d3_3v>;
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+
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+		ports {
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+			#address-cells = <1>;
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+			#size-cells = <0>;
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+
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+			port@0 {
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+				reg = <0>;
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+				thc63lvd1024_in: endpoint {
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+					remote-endpoint = <&lvds0_out>;
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+				};
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+			};
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+
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+			port@2 {
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+				reg = <2>;
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+				thc63lvd1024_out: endpoint {
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+					remote-endpoint = <&adv7511_in>;
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+				};
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+			};
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+		};
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+	};
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+
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+	memory@48000000 {
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+		device_type = "memory";
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+		/* first 128MB is reserved for secure area. */
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+		reg = <0 0x48000000 0 0x78000000>;
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+	};
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+
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 	vddq_vin01: regulator-1 {
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 		compatible = "regulator-fixed";
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 		regulator-name = "VDDQ_VIN01";
..
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@@ -44,6 +88,12 @@
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 		regulator-max-microvolt = <1800000>;
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 		regulator-boot-on;
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 		regulator-always-on;
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+	};
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+
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+	x1_clk: x1-clock {
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+		compatible = "fixed-clock";
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+		#clock-cells = <0>;
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+		clock-frequency = <148500000>;
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 	};
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 };
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..
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@@ -55,6 +105,13 @@
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 	channel0 {
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 		status = "okay";
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 	};
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+};
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+
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+&du {
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+	clocks = <&cpg CPG_MOD 724>,
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+		 <&x1_clk>;
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+	clock-names = "du.0", "dclkin.0";
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+	status = "okay";
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 };
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 &extal_clk {
..
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@@ -102,6 +159,53 @@
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 		gpio-controller;
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 		#gpio-cells = <2>;
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 	};
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+
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+	hdmi@39 {
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+		compatible = "adi,adv7511w";
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+		reg = <0x39>;
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+		interrupt-parent = <&gpio1>;
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+		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
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+		avdd-supply = <&d1_8v>;
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+		dvdd-supply = <&d1_8v>;
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+		pvdd-supply = <&d1_8v>;
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+		bgvdd-supply = <&d1_8v>;
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+		dvdd-3v-supply = <&d3_3v>;
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+
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+		adi,input-depth = <8>;
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+		adi,input-colorspace = "rgb";
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+		adi,input-clock = "1x";
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+
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+		ports {
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+			#address-cells = <1>;
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+			#size-cells = <0>;
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+
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+			port@0 {
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+				reg = <0>;
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+				adv7511_in: endpoint {
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+					remote-endpoint = <&thc63lvd1024_out>;
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+				};
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+			};
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+
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+			port@1 {
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+				reg = <1>;
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+				adv7511_out: endpoint {
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+					remote-endpoint = <&hdmi_con>;
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+				};
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+			};
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+		};
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+	};
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+};
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+
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+&lvds0 {
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+	status = "okay";
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+
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+	ports {
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+		port@1 {
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+			lvds0_out: endpoint {
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+				remote-endpoint = <&thc63lvd1024_in>;
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+			};
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+		};
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+	};
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 };
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 &mmc0 {
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@@ -114,6 +218,18 @@
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 	mmc-hs200-1_8v;
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 	bus-width = <8>;
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 	non-removable;
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+	status = "okay";
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+};
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+
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+&pciec {
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+	status = "okay";
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+};
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+
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+&pcie_bus_clk {
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+	clock-frequency = <100000000>;
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+};
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+
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+&pcie_phy {
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 	status = "okay";
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 };
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..
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@@ -146,6 +262,11 @@
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 		power-source = <1800>;
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 	};
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+	qspi0_pins: qspi0 {
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+		groups = "qspi0_ctrl", "qspi0_data4";
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+		function = "qspi0";
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+	};
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+
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 	scif0_pins: scif0 {
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 		groups = "scif0_data";
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 		function = "scif0";
..
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@@ -157,6 +278,73 @@
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 	};
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 };
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+&rpc {
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+	pinctrl-0 = <&qspi0_pins>;
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+	pinctrl-names = "default";
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+
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+	status = "okay";
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+
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+	flash@0 {
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+		compatible = "spansion,s25fs512s", "jedec,spi-nor";
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+		reg = <0>;
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+		spi-max-frequency = <50000000>;
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+		spi-rx-bus-width = <4>;
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+
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+		partitions {
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+			compatible = "fixed-partitions";
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+			#address-cells = <1>;
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+			#size-cells = <1>;
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+
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+			bootparam@0 {
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+				reg = <0x00000000 0x040000>;
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+				read-only;
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+			};
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+			cr7@40000 {
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+				reg = <0x00040000 0x080000>;
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+				read-only;
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+			};
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+			cert_header_sa3@c0000 {
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+				reg = <0x000c0000 0x080000>;
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+				read-only;
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+			};
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+			bl2@140000 {
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+				reg = <0x00140000 0x040000>;
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+				read-only;
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+			};
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+			cert_header_sa6@180000 {
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+				reg = <0x00180000 0x040000>;
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+				read-only;
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+			};
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+			bl31@1c0000 {
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+				reg = <0x001c0000 0x460000>;
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+				read-only;
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+			};
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+			uboot@640000 {
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+				reg = <0x00640000 0x0c0000>;
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+				read-only;
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+			};
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+			uboot-env@700000 {
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+				reg = <0x00700000 0x040000>;
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+				read-only;
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+			};
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+			dtb@740000 {
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+				reg = <0x00740000 0x080000>;
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+			};
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+			kernel@7c0000 {
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+				reg = <0x007c0000 0x1400000>;
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+			};
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+			user@1bc0000 {
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+				reg = <0x01bc0000 0x2440000>;
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+			};
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+		};
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+	};
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+};
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+
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+&rwdt {
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+	timeout-sec = <60>;
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+	status = "okay";
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+};
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+
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 &scif0 {
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 	pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
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 	pinctrl-names = "default";