add dts config

hc

2023-12-06 08f87f769b595151be1afeff53e144f543faa614

 kernel/arch/arm64/boot/dts/renesas/r8a77970.dtsi
..
..
@@ -1,6 +1,6 @@
1
1
 // SPDX-License-Identifier: GPL-2.0
2
2
 /*
3
- * Device Tree Source for the r8a77970 SoC
3
+ * Device Tree Source for the R-Car V3M (R8A77970) SoC
4
4
  *
5
5
  * Copyright (C) 2016-2017 Renesas Electronics Corp.
6
6
  * Copyright (C) 2017 Cogent Embedded, Inc.
..
..
@@ -24,13 +24,20 @@
24
24
 		i2c4 = &i2c4;
25
25
 	};
26
26
 
27
+	/* External CAN clock - to be overridden by boards that provide it */
28
+	can_clk: can {
29
+		compatible = "fixed-clock";
30
+		#clock-cells = <0>;
31
+		clock-frequency = <0>;
32
+	};
33
+
27
34
 	cpus {
28
35
 		#address-cells = <1>;
29
36
 		#size-cells = <0>;
30
37
 
31
38
 		a53_0: cpu@0 {
32
39
 			device_type = "cpu";
33
-			compatible = "arm,cortex-a53", "arm,armv8";
40
+			compatible = "arm,cortex-a53";
34
41
 			reg = <0>;
35
42
 			clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
36
43
 			power-domains = <&sysc R8A77970_PD_CA53_CPU0>;
..
..
@@ -40,7 +47,7 @@
40
47
 
41
48
 		a53_1: cpu@1 {
42
49
 			device_type = "cpu";
43
-			compatible = "arm,cortex-a53", "arm,armv8";
50
+			compatible = "arm,cortex-a53";
44
51
 			reg = <1>;
45
52
 			clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
46
53
 			power-domains = <&sysc R8A77970_PD_CA53_CPU1>;
..
..
@@ -80,13 +87,6 @@
80
87
 	psci {
81
88
 		compatible = "arm,psci-1.0", "arm,psci-0.2";
82
89
 		method = "smc";
83
-	};
84
-
85
-	/* External CAN clock - to be overridden by boards that provide it */
86
-	can_clk: can {
87
-		compatible = "fixed-clock";
88
-		#clock-cells = <0>;
89
-		clock-frequency = <0>;
90
90
 	};
91
91
 
92
92
 	/* External SCIF clock - to be overridden by boards that provide it */
..
..
@@ -204,9 +204,79 @@
204
204
 			resets = <&cpg 907>;
205
205
 		};
206
206
 
207
-		pfc: pin-controller@e6060000 {
207
+		pfc: pinctrl@e6060000 {
208
208
 			compatible = "renesas,pfc-r8a77970";
209
209
 			reg = <0 0xe6060000 0 0x504>;
210
+		};
211
+
212
+		cmt0: timer@e60f0000 {
213
+			compatible = "renesas,r8a77970-cmt0",
214
+				     "renesas,rcar-gen3-cmt0";
215
+			reg = <0 0xe60f0000 0 0x1004>;
216
+			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
217
+				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
218
+			clocks = <&cpg CPG_MOD 303>;
219
+			clock-names = "fck";
220
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
221
+			resets = <&cpg 303>;
222
+			status = "disabled";
223
+		};
224
+
225
+		cmt1: timer@e6130000 {
226
+			compatible = "renesas,r8a77970-cmt1",
227
+				     "renesas,rcar-gen3-cmt1";
228
+			reg = <0 0xe6130000 0 0x1004>;
229
+			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
230
+				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
231
+				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
232
+				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
233
+				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
234
+				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
235
+				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
236
+				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
237
+			clocks = <&cpg CPG_MOD 302>;
238
+			clock-names = "fck";
239
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
240
+			resets = <&cpg 302>;
241
+			status = "disabled";
242
+		};
243
+
244
+		cmt2: timer@e6140000 {
245
+			compatible = "renesas,r8a77970-cmt1",
246
+				     "renesas,rcar-gen3-cmt1";
247
+			reg = <0 0xe6140000 0 0x1004>;
248
+			interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
249
+				     <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
250
+				     <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
251
+				     <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
252
+				     <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
253
+				     <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
254
+				     <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
255
+				     <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
256
+			clocks = <&cpg CPG_MOD 301>;
257
+			clock-names = "fck";
258
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
259
+			resets = <&cpg 301>;
260
+			status = "disabled";
261
+		};
262
+
263
+		cmt3: timer@e6148000 {
264
+			compatible = "renesas,r8a77970-cmt1",
265
+				     "renesas,rcar-gen3-cmt1";
266
+			reg = <0 0xe6148000 0 0x1004>;
267
+			interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
268
+				     <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
269
+				     <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
270
+				     <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
271
+				     <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
272
+				     <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
273
+				     <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
274
+				     <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
275
+			clocks = <&cpg CPG_MOD 300>;
276
+			clock-names = "fck";
277
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
278
+			resets = <&cpg 300>;
279
+			status = "disabled";
210
280
 		};
211
281
 
212
282
 		cpg: clock-controller@e6150000 {
..
..
@@ -230,20 +300,98 @@
230
300
 			#power-domain-cells = <1>;
231
301
 		};
232
302
 
303
+		thermal: thermal@e6190000 {
304
+			compatible = "renesas,thermal-r8a77970";
305
+			reg = <0 0xe6190000 0 0x10>,
306
+			      <0 0xe6190100 0 0x120>;
307
+			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
308
+				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
309
+				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
310
+			clocks = <&cpg CPG_MOD 522>;
311
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
312
+			resets = <&cpg 522>;
313
+			#thermal-sensor-cells = <0>;
314
+		};
315
+
233
316
 		intc_ex: interrupt-controller@e61c0000 {
234
317
 			compatible = "renesas,intc-ex-r8a77970", "renesas,irqc";
235
318
 			#interrupt-cells = <2>;
236
319
 			interrupt-controller;
237
320
 			reg = <0 0xe61c0000 0 0x200>;
238
-			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
239
-				      GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
240
-				      GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
241
-				      GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
242
-				      GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
243
-				      GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
321
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
322
+				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
323
+				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
324
+				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
325
+				     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
326
+				     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
244
327
 			clocks = <&cpg CPG_MOD 407>;
245
328
 			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
246
329
 			resets = <&cpg 407>;
330
+		};
331
+
332
+		tmu0: timer@e61e0000 {
333
+			compatible = "renesas,tmu-r8a77970", "renesas,tmu";
334
+			reg = <0 0xe61e0000 0 0x30>;
335
+			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
336
+				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
337
+				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
338
+			clocks = <&cpg CPG_MOD 125>;
339
+			clock-names = "fck";
340
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
341
+			resets = <&cpg 125>;
342
+			status = "disabled";
343
+		};
344
+
345
+		tmu1: timer@e6fc0000 {
346
+			compatible = "renesas,tmu-r8a77970", "renesas,tmu";
347
+			reg = <0 0xe6fc0000 0 0x30>;
348
+			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
349
+				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
350
+				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
351
+			clocks = <&cpg CPG_MOD 124>;
352
+			clock-names = "fck";
353
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
354
+			resets = <&cpg 124>;
355
+			status = "disabled";
356
+		};
357
+
358
+		tmu2: timer@e6fd0000 {
359
+			compatible = "renesas,tmu-r8a77970", "renesas,tmu";
360
+			reg = <0 0xe6fd0000 0 0x30>;
361
+			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
362
+				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
363
+				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
364
+			clocks = <&cpg CPG_MOD 123>;
365
+			clock-names = "fck";
366
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
367
+			resets = <&cpg 123>;
368
+			status = "disabled";
369
+		};
370
+
371
+		tmu3: timer@e6fe0000 {
372
+			compatible = "renesas,tmu-r8a77970", "renesas,tmu";
373
+			reg = <0 0xe6fe0000 0 0x30>;
374
+			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
375
+				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
376
+				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
377
+			clocks = <&cpg CPG_MOD 122>;
378
+			clock-names = "fck";
379
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
380
+			resets = <&cpg 122>;
381
+			status = "disabled";
382
+		};
383
+
384
+		tmu4: timer@ffc00000 {
385
+			compatible = "renesas,tmu-r8a77970", "renesas,tmu";
386
+			reg = <0 0xffc00000 0 0x30>;
387
+			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
388
+				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
389
+				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
390
+			clocks = <&cpg CPG_MOD 121>;
391
+			clock-names = "fck";
392
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
393
+			resets = <&cpg 121>;
394
+			status = "disabled";
247
395
 		};
248
396
 
249
397
 		i2c0: i2c@e6500000 {
..
..
@@ -473,6 +621,56 @@
473
621
 			status = "disabled";
474
622
 		};
475
623
 
624
+		pwm0: pwm@e6e30000 {
625
+			compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
626
+			reg = <0 0xe6e30000 0 8>;
627
+			#pwm-cells = <2>;
628
+			clocks = <&cpg CPG_MOD 523>;
629
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
630
+			resets = <&cpg 523>;
631
+			status = "disabled";
632
+		};
633
+
634
+		pwm1: pwm@e6e31000 {
635
+			compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
636
+			reg = <0 0xe6e31000 0 8>;
637
+			#pwm-cells = <2>;
638
+			clocks = <&cpg CPG_MOD 523>;
639
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
640
+			resets = <&cpg 523>;
641
+			status = "disabled";
642
+		};
643
+
644
+		pwm2: pwm@e6e32000 {
645
+			compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
646
+			reg = <0 0xe6e32000 0 8>;
647
+			#pwm-cells = <2>;
648
+			clocks = <&cpg CPG_MOD 523>;
649
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
650
+			resets = <&cpg 523>;
651
+			status = "disabled";
652
+		};
653
+
654
+		pwm3: pwm@e6e33000 {
655
+			compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
656
+			reg = <0 0xe6e33000 0 8>;
657
+			#pwm-cells = <2>;
658
+			clocks = <&cpg CPG_MOD 523>;
659
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
660
+			resets = <&cpg 523>;
661
+			status = "disabled";
662
+		};
663
+
664
+		pwm4: pwm@e6e34000 {
665
+			compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
666
+			reg = <0 0xe6e34000 0 8>;
667
+			#pwm-cells = <2>;
668
+			clocks = <&cpg CPG_MOD 523>;
669
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
670
+			resets = <&cpg 523>;
671
+			status = "disabled";
672
+		};
673
+
476
674
 		scif0: serial@e6e60000 {
477
675
 			compatible = "renesas,scif-r8a77970",
478
676
 				     "renesas,rcar-gen3-scif",
..
..
@@ -544,6 +742,80 @@
544
742
 			status = "disabled";
545
743
 		};
546
744
 
745
+		tpu: pwm@e6e80000 {
746
+			compatible = "renesas,tpu-r8a77970", "renesas,tpu";
747
+			reg = <0 0xe6e80000 0 0x148>;
748
+			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
749
+			clocks = <&cpg CPG_MOD 304>;
750
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
751
+			resets = <&cpg 304>;
752
+			#pwm-cells = <3>;
753
+			status = "disabled";
754
+		};
755
+
756
+		msiof0: spi@e6e90000 {
757
+			compatible = "renesas,msiof-r8a77970",
758
+				     "renesas,rcar-gen3-msiof";
759
+			reg = <0 0xe6e90000 0 0x64>;
760
+			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
761
+			clocks = <&cpg CPG_MOD 211>;
762
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
763
+			resets = <&cpg 211>;
764
+			dmas = <&dmac1 0x41>, <&dmac1 0x40>,
765
+			       <&dmac2 0x41>, <&dmac2 0x40>;
766
+			dma-names = "tx", "rx", "tx", "rx";
767
+			#address-cells = <1>;
768
+			#size-cells = <0>;
769
+			status = "disabled";
770
+		};
771
+
772
+		msiof1: spi@e6ea0000 {
773
+			compatible = "renesas,msiof-r8a77970",
774
+				     "renesas,rcar-gen3-msiof";
775
+			reg = <0 0xe6ea0000 0 0x0064>;
776
+			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
777
+			clocks = <&cpg CPG_MOD 210>;
778
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
779
+			resets = <&cpg 210>;
780
+			dmas = <&dmac1 0x43>, <&dmac1 0x42>,
781
+			       <&dmac2 0x43>, <&dmac2 0x42>;
782
+			dma-names = "tx", "rx", "tx", "rx";
783
+			#address-cells = <1>;
784
+			#size-cells = <0>;
785
+			status = "disabled";
786
+		};
787
+
788
+		msiof2: spi@e6c00000 {
789
+			compatible = "renesas,msiof-r8a77970",
790
+				     "renesas,rcar-gen3-msiof";
791
+			reg = <0 0xe6c00000 0 0x0064>;
792
+			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
793
+			clocks = <&cpg CPG_MOD 209>;
794
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
795
+			resets = <&cpg 209>;
796
+			dmas = <&dmac1 0x45>, <&dmac1 0x44>,
797
+			       <&dmac2 0x45>, <&dmac2 0x44>;
798
+			dma-names = "tx", "rx", "tx", "rx";
799
+			#address-cells = <1>;
800
+			#size-cells = <0>;
801
+			status = "disabled";
802
+		};
803
+
804
+		msiof3: spi@e6c10000 {
805
+			compatible = "renesas,msiof-r8a77970",
806
+				     "renesas,rcar-gen3-msiof";
807
+			reg = <0 0xe6c10000 0 0x0064>;
808
+			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
809
+			clocks = <&cpg CPG_MOD 208>;
810
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
811
+			resets = <&cpg 208>;
812
+			dmas = <&dmac1 0x47>, <&dmac1 0x46>,
813
+			       <&dmac2 0x47>, <&dmac2 0x46>;
814
+			dma-names = "tx", "rx", "tx", "rx";
815
+			#address-cells = <1>;
816
+			#size-cells = <0>;
817
+			status = "disabled";
818
+		};
547
819
 
548
820
 		vin0: video@e6ef0000 {
549
821
 			compatible = "renesas,vin-r8a77970";
..
..
@@ -567,7 +839,7 @@
567
839
 
568
840
 					vin0csi40: endpoint@2 {
569
841
 						reg = <2>;
570
-						remote-endpoint= <&csi40vin0>;
842
+						remote-endpoint = <&csi40vin0>;
571
843
 					};
572
844
 				};
573
845
 			};
..
..
@@ -595,7 +867,7 @@
595
867
 
596
868
 					vin1csi40: endpoint@2 {
597
869
 						reg = <2>;
598
-						remote-endpoint= <&csi40vin1>;
870
+						remote-endpoint = <&csi40vin1>;
599
871
 					};
600
872
 				};
601
873
 			};
..
..
@@ -623,7 +895,7 @@
623
895
 
624
896
 					vin2csi40: endpoint@2 {
625
897
 						reg = <2>;
626
-						remote-endpoint= <&csi40vin2>;
898
+						remote-endpoint = <&csi40vin2>;
627
899
 					};
628
900
 				};
629
901
 			};
..
..
@@ -651,7 +923,7 @@
651
923
 
652
924
 					vin3csi40: endpoint@2 {
653
925
 						reg = <2>;
654
-						remote-endpoint= <&csi40vin3>;
926
+						remote-endpoint = <&csi40vin3>;
655
927
 					};
656
928
 				};
657
929
 			};
..
..
@@ -661,15 +933,15 @@
661
933
 			compatible = "renesas,dmac-r8a77970",
662
934
 				     "renesas,rcar-dmac";
663
935
 			reg = <0 0xe7300000 0 0x10000>;
664
-			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
665
-				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
666
-				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
667
-				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
668
-				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
669
-				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
670
-				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
671
-				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
672
-				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
936
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
937
+				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
938
+				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
939
+				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
940
+				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
941
+				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
942
+				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
943
+				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
944
+				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
673
945
 			interrupt-names = "error",
674
946
 					  "ch0", "ch1", "ch2", "ch3",
675
947
 					  "ch4", "ch5", "ch6", "ch7";
..
..
@@ -689,15 +961,15 @@
689
961
 			compatible = "renesas,dmac-r8a77970",
690
962
 				     "renesas,rcar-dmac";
691
963
 			reg = <0 0xe7310000 0 0x10000>;
692
-			interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
693
-				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
694
-				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
695
-				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
696
-				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
697
-				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
698
-				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
699
-				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
700
-				      GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
964
+			interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
965
+				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
966
+				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
967
+				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
968
+				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
969
+				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
970
+				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
971
+				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
972
+				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
701
973
 			interrupt-names = "error",
702
974
 					  "ch0", "ch1", "ch2", "ch3",
703
975
 					  "ch4", "ch5", "ch6", "ch7";
..
..
@@ -713,7 +985,7 @@
713
985
 			       <&ipmmu_ds1 22>, <&ipmmu_ds1 23>;
714
986
 		};
715
987
 
716
-		ipmmu_ds1: mmu@e7740000 {
988
+		ipmmu_ds1: iommu@e7740000 {
717
989
 			compatible = "renesas,ipmmu-r8a77970";
718
990
 			reg = <0 0xe7740000 0 0x1000>;
719
991
 			renesas,ipmmu-main = <&ipmmu_mm 0>;
..
..
@@ -721,7 +993,7 @@
721
993
 			#iommu-cells = <1>;
722
994
 		};
723
995
 
724
-		ipmmu_ir: mmu@ff8b0000 {
996
+		ipmmu_ir: iommu@ff8b0000 {
725
997
 			compatible = "renesas,ipmmu-r8a77970";
726
998
 			reg = <0 0xff8b0000 0 0x1000>;
727
999
 			renesas,ipmmu-main = <&ipmmu_mm 3>;
..
..
@@ -729,7 +1001,7 @@
729
1001
 			#iommu-cells = <1>;
730
1002
 		};
731
1003
 
732
-		ipmmu_mm: mmu@e67b0000 {
1004
+		ipmmu_mm: iommu@e67b0000 {
733
1005
 			compatible = "renesas,ipmmu-r8a77970";
734
1006
 			reg = <0 0xe67b0000 0 0x1000>;
735
1007
 			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
..
..
@@ -738,7 +1010,7 @@
738
1010
 			#iommu-cells = <1>;
739
1011
 		};
740
1012
 
741
-		ipmmu_rt: mmu@ffc80000 {
1013
+		ipmmu_rt: iommu@ffc80000 {
742
1014
 			compatible = "renesas,ipmmu-r8a77970";
743
1015
 			reg = <0 0xffc80000 0 0x1000>;
744
1016
 			renesas,ipmmu-main = <&ipmmu_mm 7>;
..
..
@@ -746,12 +1018,42 @@
746
1018
 			#iommu-cells = <1>;
747
1019
 		};
748
1020
 
749
-		ipmmu_vi0: mmu@febd0000 {
1021
+		ipmmu_vi0: iommu@febd0000 {
750
1022
 			compatible = "renesas,ipmmu-r8a77970";
751
1023
 			reg = <0 0xfebd0000 0 0x1000>;
752
1024
 			renesas,ipmmu-main = <&ipmmu_mm 9>;
753
1025
 			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
754
1026
 			#iommu-cells = <1>;
1027
+		};
1028
+
1029
+		mmc0: mmc@ee140000 {
1030
+			compatible = "renesas,sdhi-r8a77970",
1031
+				     "renesas,rcar-gen3-sdhi";
1032
+			reg = <0 0xee140000 0 0x2000>;
1033
+			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1034
+			clocks = <&cpg CPG_MOD 314>;
1035
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1036
+			resets = <&cpg 314>;
1037
+			max-frequency = <200000000>;
1038
+			iommus = <&ipmmu_ds1 32>;
1039
+			status = "disabled";
1040
+		};
1041
+
1042
+		rpc: spi@ee200000 {
1043
+			compatible = "renesas,r8a77970-rpc-if",
1044
+				     "renesas,rcar-gen3-rpc-if";
1045
+			reg = <0 0xee200000 0 0x200>,
1046
+			      <0 0x08000000 0 0x4000000>,
1047
+			      <0 0xee208000 0 0x100>;
1048
+			reg-names = "regs", "dirmap", "wbuf";
1049
+			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1050
+			clocks = <&cpg CPG_MOD 917>;
1051
+			clock-names = "rpc";
1052
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1053
+			resets = <&cpg 917>;
1054
+			#address-cells = <1>;
1055
+			#size-cells = <0>;
1056
+			status = "disabled";
755
1057
 		};
756
1058
 
757
1059
 		gic: interrupt-controller@f1010000 {
..
..
@@ -836,7 +1138,9 @@
836
1138
 			clock-names = "du.0";
837
1139
 			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
838
1140
 			resets = <&cpg 724>;
839
-			vsps = <&vspd0>;
1141
+			reset-names = "du.0";
1142
+			renesas,vsps = <&vspd0 0>;
1143
+
840
1144
 			status = "disabled";
841
1145
 
842
1146
 			ports {
..
..
@@ -891,6 +1195,25 @@
891
1195
 		};
892
1196
 	};
893
1197
 
1198
+	thermal-zones {
1199
+		cpu-thermal {
1200
+			polling-delay-passive = <250>;
1201
+			polling-delay = <1000>;
1202
+			thermal-sensors = <&thermal>;
1203
+
1204
+			cooling-maps {
1205
+			};
1206
+
1207
+			trips {
1208
+				cpu-crit {
1209
+					temperature = <120000>;
1210
+					hysteresis = <2000>;
1211
+					type = "critical";
1212
+				};
1213
+			};
1214
+		};
1215
+	};
1216
+
894
1217
 	timer {
895
1218
 		compatible = "arm,armv8-timer";
896
1219
 		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,