~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,6 +1,6 @@
1	1	// SPDX-License-Identifier: GPL-2.0
2	2	/*
3		- * Device Tree Source for the r8a77965 SoC
	3	+ * Device Tree Source for the R-Car M3-N (R8A77965) SoC
4	4	*
5	5	* Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6	6	*
..	..	@@ -12,7 +12,7 @@
12	12	#include <dt-bindings/interrupt-controller/arm-gic.h>
13	13	#include <dt-bindings/power/r8a77965-sysc.h>
14	14
15		-#define CPG_AUDIO_CLK_I 10
	15	+#define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4
16	16
17	17	/ {
18	18	compatible = "renesas,r8a77965";
..	..	@@ -60,26 +60,74 @@
60	60	clock-frequency = <0>;
61	61	};
62	62
	63	+ cluster0_opp: opp_table0 {
	64	+ compatible = "operating-points-v2";
	65	+ opp-shared;
	66	+
	67	+ opp-500000000 {
	68	+ opp-hz = /bits/ 64 <500000000>;
	69	+ opp-microvolt = <830000>;
	70	+ clock-latency-ns = <300000>;
	71	+ };
	72	+ opp-1000000000 {
	73	+ opp-hz = /bits/ 64 <1000000000>;
	74	+ opp-microvolt = <830000>;
	75	+ clock-latency-ns = <300000>;
	76	+ };
	77	+ opp-1500000000 {
	78	+ opp-hz = /bits/ 64 <1500000000>;
	79	+ opp-microvolt = <830000>;
	80	+ clock-latency-ns = <300000>;
	81	+ opp-suspend;
	82	+ };
	83	+ opp-1600000000 {
	84	+ opp-hz = /bits/ 64 <1600000000>;
	85	+ opp-microvolt = <900000>;
	86	+ clock-latency-ns = <300000>;
	87	+ turbo-mode;
	88	+ };
	89	+ opp-1700000000 {
	90	+ opp-hz = /bits/ 64 <1700000000>;
	91	+ opp-microvolt = <900000>;
	92	+ clock-latency-ns = <300000>;
	93	+ turbo-mode;
	94	+ };
	95	+ opp-1800000000 {
	96	+ opp-hz = /bits/ 64 <1800000000>;
	97	+ opp-microvolt = <960000>;
	98	+ clock-latency-ns = <300000>;
	99	+ turbo-mode;
	100	+ };
	101	+ };
	102	+
63	103	cpus {
64	104	#address-cells = <1>;
65	105	#size-cells = <0>;
66	106
67	107	a57_0: cpu@0 {
68		- compatible = "arm,cortex-a57", "arm,armv8";
	108	+ compatible = "arm,cortex-a57";
69	109	reg = <0x0>;
70	110	device_type = "cpu";
71	111	power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
72	112	next-level-cache = <&L2_CA57>;
73	113	enable-method = "psci";
	114	+ cpu-idle-states = <&CPU_SLEEP_0>;
	115	+ #cooling-cells = <2>;
	116	+ dynamic-power-coefficient = <854>;
	117	+ clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
	118	+ operating-points-v2 = <&cluster0_opp>;
74	119	};
75	120
76	121	a57_1: cpu@1 {
77		- compatible = "arm,cortex-a57", "arm,armv8";
	122	+ compatible = "arm,cortex-a57";
78	123	reg = <0x1>;
79	124	device_type = "cpu";
80	125	power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
81	126	next-level-cache = <&L2_CA57>;
82	127	enable-method = "psci";
	128	+ cpu-idle-states = <&CPU_SLEEP_0>;
	129	+ clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
	130	+ operating-points-v2 = <&cluster0_opp>;
83	131	};
84	132
85	133	L2_CA57: cache-controller-0 {
..	..	@@ -87,6 +135,19 @@
87	135	power-domains = <&sysc R8A77965_PD_CA57_SCU>;
88	136	cache-unified;
89	137	cache-level = <2>;
	138	+ };
	139	+
	140	+ idle-states {
	141	+ entry-method = "psci";
	142	+
	143	+ CPU_SLEEP_0: cpu-sleep-0 {
	144	+ compatible = "arm,idle-state";
	145	+ arm,psci-suspend-param = <0x0010000>;
	146	+ local-timer-stop;
	147	+ entry-latency-us = <400>;
	148	+ exit-latency-us = <500>;
	149	+ min-residency-us = <4000>;
	150	+ };
90	151	};
91	152	};
92	153
..	..	@@ -268,9 +329,79 @@
268	329	resets = <&cpg 905>;
269	330	};
270	331
271		- pfc: pin-controller@e6060000 {
	332	+ pfc: pinctrl@e6060000 {
272	333	compatible = "renesas,pfc-r8a77965";
273	334	reg = <0 0xe6060000 0 0x50c>;
	335	+ };
	336	+
	337	+ cmt0: timer@e60f0000 {
	338	+ compatible = "renesas,r8a77965-cmt0",
	339	+ "renesas,rcar-gen3-cmt0";
	340	+ reg = <0 0xe60f0000 0 0x1004>;
	341	+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
	342	+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
	343	+ clocks = <&cpg CPG_MOD 303>;
	344	+ clock-names = "fck";
	345	+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
	346	+ resets = <&cpg 303>;
	347	+ status = "disabled";
	348	+ };
	349	+
	350	+ cmt1: timer@e6130000 {
	351	+ compatible = "renesas,r8a77965-cmt1",
	352	+ "renesas,rcar-gen3-cmt1";
	353	+ reg = <0 0xe6130000 0 0x1004>;
	354	+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
	355	+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
	356	+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
	357	+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
	358	+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
	359	+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
	360	+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
	361	+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
	362	+ clocks = <&cpg CPG_MOD 302>;
	363	+ clock-names = "fck";
	364	+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
	365	+ resets = <&cpg 302>;
	366	+ status = "disabled";
	367	+ };
	368	+
	369	+ cmt2: timer@e6140000 {
	370	+ compatible = "renesas,r8a77965-cmt1",
	371	+ "renesas,rcar-gen3-cmt1";
	372	+ reg = <0 0xe6140000 0 0x1004>;
	373	+ interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
	374	+ <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
	375	+ <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
	376	+ <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
	377	+ <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
	378	+ <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
	379	+ <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
	380	+ <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
	381	+ clocks = <&cpg CPG_MOD 301>;
	382	+ clock-names = "fck";
	383	+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
	384	+ resets = <&cpg 301>;
	385	+ status = "disabled";
	386	+ };
	387	+
	388	+ cmt3: timer@e6148000 {
	389	+ compatible = "renesas,r8a77965-cmt1",
	390	+ "renesas,rcar-gen3-cmt1";
	391	+ reg = <0 0xe6148000 0 0x1004>;
	392	+ interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
	393	+ <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
	394	+ <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
	395	+ <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
	396	+ <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
	397	+ <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
	398	+ <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
	399	+ <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
	400	+ clocks = <&cpg CPG_MOD 300>;
	401	+ clock-names = "fck";
	402	+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
	403	+ resets = <&cpg 300>;
	404	+ status = "disabled";
274	405	};
275	406
276	407	cpg: clock-controller@e6150000 {
..	..	@@ -306,7 +437,6 @@
306	437	power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
307	438	resets = <&cpg 522>;
308	439	#thermal-sensor-cells = <1>;
309		- status = "okay";
310	440	};
311	441
312	442	intc_ex: interrupt-controller@e61c0000 {
..	..	@@ -314,12 +444,12 @@
314	444	#interrupt-cells = <2>;
315	445	interrupt-controller;
316	446	reg = <0 0xe61c0000 0 0x200>;
317		- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
318		- GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
319		- GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
320		- GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
321		- GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
322		- GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
	447	+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
	448	+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
	449	+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
	450	+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
	451	+ <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
	452	+ <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
323	453	clocks = <&cpg CPG_MOD 407>;
324	454	power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
325	455	resets = <&cpg 407>;
..	..	@@ -547,17 +677,17 @@
547	677	hsusb: usb@e6590000 {
548	678	compatible = "renesas,usbhs-r8a77965",
549	679	"renesas,rcar-gen3-usbhs";
550		- reg = <0 0xe6590000 0 0x100>;
	680	+ reg = <0 0xe6590000 0 0x200>;
551	681	interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
552		- clocks = <&cpg CPG_MOD 704>;
	682	+ clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
553	683	dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
554	684	<&usb_dmac1 0>, <&usb_dmac1 1>;
555	685	dma-names = "ch0", "ch1", "ch2", "ch3";
556	686	renesas,buswait = <11>;
557		- phys = <&usb2_phy0>;
	687	+ phys = <&usb2_phy0 3>;
558	688	phy-names = "usb";
559	689	power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
560		- resets = <&cpg 704>;
	690	+ resets = <&cpg 704>, <&cpg 703>;
561	691	status = "disabled";
562	692	};
563	693
..	..	@@ -565,8 +695,8 @@
565	695	compatible = "renesas,r8a77965-usb-dmac",
566	696	"renesas,usb-dmac";
567	697	reg = <0 0xe65a0000 0 0x100>;
568		- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
569		- GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
	698	+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
	699	+ <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
570	700	interrupt-names = "ch0", "ch1";
571	701	clocks = <&cpg CPG_MOD 330>;
572	702	power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
..	..	@@ -579,8 +709,8 @@
579	709	compatible = "renesas,r8a77965-usb-dmac",
580	710	"renesas,usb-dmac";
581	711	reg = <0 0xe65b0000 0 0x100>;
582		- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
583		- GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
	712	+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
	713	+ <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
584	714	interrupt-names = "ch0", "ch1";
585	715	clocks = <&cpg CPG_MOD 331>;
586	716	power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
..	..	@@ -602,27 +732,36 @@
602	732	status = "disabled";
603	733	};
604	734
	735	+ arm_cc630p: crypto@e6601000 {
	736	+ compatible = "arm,cryptocell-630p-ree";
	737	+ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
	738	+ reg = <0x0 0xe6601000 0 0x1000>;
	739	+ clocks = <&cpg CPG_MOD 229>;
	740	+ resets = <&cpg 229>;
	741	+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
	742	+ };
	743	+
605	744	dmac0: dma-controller@e6700000 {
606	745	compatible = "renesas,dmac-r8a77965",
607	746	"renesas,rcar-dmac";
608	747	reg = <0 0xe6700000 0 0x10000>;
609		- interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
610		- GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
611		- GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
612		- GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
613		- GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
614		- GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
615		- GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
616		- GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
617		- GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
618		- GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
619		- GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
620		- GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
621		- GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
622		- GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
623		- GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
624		- GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
625		- GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
	748	+ interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
	749	+ <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
	750	+ <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
	751	+ <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
	752	+ <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
	753	+ <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
	754	+ <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
	755	+ <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
	756	+ <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
	757	+ <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
	758	+ <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
	759	+ <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
	760	+ <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
	761	+ <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
	762	+ <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
	763	+ <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
	764	+ <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
626	765	interrupt-names = "error",
627	766	"ch0", "ch1", "ch2", "ch3",
628	767	"ch4", "ch5", "ch6", "ch7",
..	..	@@ -648,23 +787,23 @@
648	787	compatible = "renesas,dmac-r8a77965",
649	788	"renesas,rcar-dmac";
650	789	reg = <0 0xe7300000 0 0x10000>;
651		- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
652		- GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
653		- GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
654		- GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
655		- GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
656		- GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
657		- GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
658		- GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
659		- GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
660		- GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
661		- GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
662		- GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
663		- GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
664		- GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
665		- GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
666		- GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
667		- GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
	790	+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
	791	+ <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
	792	+ <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
	793	+ <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
	794	+ <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
	795	+ <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
	796	+ <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
	797	+ <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
	798	+ <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
	799	+ <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
	800	+ <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
	801	+ <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
	802	+ <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
	803	+ <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
	804	+ <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
	805	+ <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
	806	+ <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
668	807	interrupt-names = "error",
669	808	"ch0", "ch1", "ch2", "ch3",
670	809	"ch4", "ch5", "ch6", "ch7",
..	..	@@ -690,23 +829,23 @@
690	829	compatible = "renesas,dmac-r8a77965",
691	830	"renesas,rcar-dmac";
692	831	reg = <0 0xe7310000 0 0x10000>;
693		- interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
694		- GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
695		- GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
696		- GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
697		- GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
698		- GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
699		- GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
700		- GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
701		- GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
702		- GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
703		- GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
704		- GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
705		- GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
706		- GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
707		- GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
708		- GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
709		- GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
	832	+ interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
	833	+ <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
	834	+ <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
	835	+ <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
	836	+ <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
	837	+ <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
	838	+ <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
	839	+ <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
	840	+ <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
	841	+ <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
	842	+ <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
	843	+ <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
	844	+ <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
	845	+ <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
	846	+ <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
	847	+ <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
	848	+ <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
710	849	interrupt-names = "error",
711	850	"ch0", "ch1", "ch2", "ch3",
712	851	"ch4", "ch5", "ch6", "ch7",
..	..	@@ -728,7 +867,7 @@
728	867	<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
729	868	};
730	869
731		- ipmmu_ds0: mmu@e6740000 {
	870	+ ipmmu_ds0: iommu@e6740000 {
732	871	compatible = "renesas,ipmmu-r8a77965";
733	872	reg = <0 0xe6740000 0 0x1000>;
734	873	renesas,ipmmu-main = <&ipmmu_mm 0>;
..	..	@@ -736,7 +875,7 @@
736	875	#iommu-cells = <1>;
737	876	};
738	877
739		- ipmmu_ds1: mmu@e7740000 {
	878	+ ipmmu_ds1: iommu@e7740000 {
740	879	compatible = "renesas,ipmmu-r8a77965";
741	880	reg = <0 0xe7740000 0 0x1000>;
742	881	renesas,ipmmu-main = <&ipmmu_mm 1>;
..	..	@@ -744,7 +883,7 @@
744	883	#iommu-cells = <1>;
745	884	};
746	885
747		- ipmmu_hc: mmu@e6570000 {
	886	+ ipmmu_hc: iommu@e6570000 {
748	887	compatible = "renesas,ipmmu-r8a77965";
749	888	reg = <0 0xe6570000 0 0x1000>;
750	889	renesas,ipmmu-main = <&ipmmu_mm 2>;
..	..	@@ -752,15 +891,7 @@
752	891	#iommu-cells = <1>;
753	892	};
754	893
755		- ipmmu_ir: mmu@ff8b0000 {
756		- compatible = "renesas,ipmmu-r8a77965";
757		- reg = <0 0xff8b0000 0 0x1000>;
758		- renesas,ipmmu-main = <&ipmmu_mm 3>;
759		- power-domains = <&sysc R8A77965_PD_A3IR>;
760		- #iommu-cells = <1>;
761		- };
762		-
763		- ipmmu_mm: mmu@e67b0000 {
	894	+ ipmmu_mm: iommu@e67b0000 {
764	895	compatible = "renesas,ipmmu-r8a77965";
765	896	reg = <0 0xe67b0000 0 0x1000>;
766	897	interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
..	..	@@ -769,7 +900,7 @@
769	900	#iommu-cells = <1>;
770	901	};
771	902
772		- ipmmu_mp: mmu@ec670000 {
	903	+ ipmmu_mp: iommu@ec670000 {
773	904	compatible = "renesas,ipmmu-r8a77965";
774	905	reg = <0 0xec670000 0 0x1000>;
775	906	renesas,ipmmu-main = <&ipmmu_mm 4>;
..	..	@@ -777,7 +908,7 @@
777	908	#iommu-cells = <1>;
778	909	};
779	910
780		- ipmmu_pv0: mmu@fd800000 {
	911	+ ipmmu_pv0: iommu@fd800000 {
781	912	compatible = "renesas,ipmmu-r8a77965";
782	913	reg = <0 0xfd800000 0 0x1000>;
783	914	renesas,ipmmu-main = <&ipmmu_mm 6>;
..	..	@@ -785,7 +916,7 @@
785	916	#iommu-cells = <1>;
786	917	};
787	918
788		- ipmmu_rt: mmu@ffc80000 {
	919	+ ipmmu_rt: iommu@ffc80000 {
789	920	compatible = "renesas,ipmmu-r8a77965";
790	921	reg = <0 0xffc80000 0 0x1000>;
791	922	renesas,ipmmu-main = <&ipmmu_mm 10>;
..	..	@@ -793,7 +924,7 @@
793	924	#iommu-cells = <1>;
794	925	};
795	926
796		- ipmmu_vc0: mmu@fe6b0000 {
	927	+ ipmmu_vc0: iommu@fe6b0000 {
797	928	compatible = "renesas,ipmmu-r8a77965";
798	929	reg = <0 0xfe6b0000 0 0x1000>;
799	930	renesas,ipmmu-main = <&ipmmu_mm 12>;
..	..	@@ -801,7 +932,7 @@
801	932	#iommu-cells = <1>;
802	933	};
803	934
804		- ipmmu_vi0: mmu@febd0000 {
	935	+ ipmmu_vi0: iommu@febd0000 {
805	936	compatible = "renesas,ipmmu-r8a77965";
806	937	reg = <0 0xfebd0000 0 0x1000>;
807	938	renesas,ipmmu-main = <&ipmmu_mm 14>;
..	..	@@ -809,7 +940,7 @@
809	940	#iommu-cells = <1>;
810	941	};
811	942
812		- ipmmu_vp0: mmu@fe990000 {
	943	+ ipmmu_vp0: iommu@fe990000 {
813	944	compatible = "renesas,ipmmu-r8a77965";
814	945	reg = <0 0xfe990000 0 0x1000>;
815	946	renesas,ipmmu-main = <&ipmmu_mm 16>;
..	..	@@ -857,9 +988,67 @@
857	988	power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
858	989	resets = <&cpg 812>;
859	990	phy-mode = "rgmii";
	991	+ iommus = <&ipmmu_ds0 16>;
860	992	#address-cells = <1>;
861	993	#size-cells = <0>;
862	994	status = "disabled";
	995	+ };
	996	+
	997	+ can0: can@e6c30000 {
	998	+ compatible = "renesas,can-r8a77965",
	999	+ "renesas,rcar-gen3-can";
	1000	+ reg = <0 0xe6c30000 0 0x1000>;
	1001	+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
	1002	+ clocks = <&cpg CPG_MOD 916>,
	1003	+ <&cpg CPG_CORE R8A77965_CLK_CANFD>,
	1004	+ <&can_clk>;
	1005	+ clock-names = "clkp1", "clkp2", "can_clk";
	1006	+ assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
	1007	+ assigned-clock-rates = <40000000>;
	1008	+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
	1009	+ resets = <&cpg 916>;
	1010	+ status = "disabled";
	1011	+ };
	1012	+
	1013	+ can1: can@e6c38000 {
	1014	+ compatible = "renesas,can-r8a77965",
	1015	+ "renesas,rcar-gen3-can";
	1016	+ reg = <0 0xe6c38000 0 0x1000>;
	1017	+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
	1018	+ clocks = <&cpg CPG_MOD 915>,
	1019	+ <&cpg CPG_CORE R8A77965_CLK_CANFD>,
	1020	+ <&can_clk>;
	1021	+ clock-names = "clkp1", "clkp2", "can_clk";
	1022	+ assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
	1023	+ assigned-clock-rates = <40000000>;
	1024	+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
	1025	+ resets = <&cpg 915>;
	1026	+ status = "disabled";
	1027	+ };
	1028	+
	1029	+ canfd: can@e66c0000 {
	1030	+ compatible = "renesas,r8a77965-canfd",
	1031	+ "renesas,rcar-gen3-canfd";
	1032	+ reg = <0 0xe66c0000 0 0x8000>;
	1033	+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
	1034	+ <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
	1035	+ clocks = <&cpg CPG_MOD 914>,
	1036	+ <&cpg CPG_CORE R8A77965_CLK_CANFD>,
	1037	+ <&can_clk>;
	1038	+ clock-names = "fck", "canfd", "can_clk";
	1039	+ assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
	1040	+ assigned-clock-rates = <40000000>;
	1041	+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
	1042	+ resets = <&cpg 914>;
	1043	+ status = "disabled";
	1044	+
	1045	+ channel0 {
	1046	+ status = "disabled";
	1047	+ };
	1048	+
	1049	+ channel1 {
	1050	+ status = "disabled";
	1051	+ };
863	1052	};
864	1053
865	1054	pwm0: pwm@e6e30000 {
..	..	@@ -1032,6 +1221,17 @@
1032	1221	status = "disabled";
1033	1222	};
1034	1223
	1224	+ tpu: pwm@e6e80000 {
	1225	+ compatible = "renesas,tpu-r8a77965", "renesas,tpu";
	1226	+ reg = <0 0xe6e80000 0 0x148>;
	1227	+ interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
	1228	+ clocks = <&cpg CPG_MOD 304>;
	1229	+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
	1230	+ resets = <&cpg 304>;
	1231	+ #pwm-cells = <3>;
	1232	+ status = "disabled";
	1233	+ };
	1234	+
1035	1235	msiof0: spi@e6e90000 {
1036	1236	compatible = "renesas,msiof-r8a77965",
1037	1237	"renesas,rcar-gen3-msiof";
..	..	@@ -1116,11 +1316,11 @@
1116	1316
1117	1317	vin0csi20: endpoint@0 {
1118	1318	reg = <0>;
1119		- remote-endpoint= <&csi20vin0>;
	1319	+ remote-endpoint = <&csi20vin0>;
1120	1320	};
1121	1321	vin0csi40: endpoint@2 {
1122	1322	reg = <2>;
1123		- remote-endpoint= <&csi40vin0>;
	1323	+ remote-endpoint = <&csi40vin0>;
1124	1324	};
1125	1325	};
1126	1326	};
..	..	@@ -1148,11 +1348,11 @@
1148	1348
1149	1349	vin1csi20: endpoint@0 {
1150	1350	reg = <0>;
1151		- remote-endpoint= <&csi20vin1>;
	1351	+ remote-endpoint = <&csi20vin1>;
1152	1352	};
1153	1353	vin1csi40: endpoint@2 {
1154	1354	reg = <2>;
1155		- remote-endpoint= <&csi40vin1>;
	1355	+ remote-endpoint = <&csi40vin1>;
1156	1356	};
1157	1357	};
1158	1358	};
..	..	@@ -1180,11 +1380,11 @@
1180	1380
1181	1381	vin2csi20: endpoint@0 {
1182	1382	reg = <0>;
1183		- remote-endpoint= <&csi20vin2>;
	1383	+ remote-endpoint = <&csi20vin2>;
1184	1384	};
1185	1385	vin2csi40: endpoint@2 {
1186	1386	reg = <2>;
1187		- remote-endpoint= <&csi40vin2>;
	1387	+ remote-endpoint = <&csi40vin2>;
1188	1388	};
1189	1389	};
1190	1390	};
..	..	@@ -1212,11 +1412,11 @@
1212	1412
1213	1413	vin3csi20: endpoint@0 {
1214	1414	reg = <0>;
1215		- remote-endpoint= <&csi20vin3>;
	1415	+ remote-endpoint = <&csi20vin3>;
1216	1416	};
1217	1417	vin3csi40: endpoint@2 {
1218	1418	reg = <2>;
1219		- remote-endpoint= <&csi40vin3>;
	1419	+ remote-endpoint = <&csi40vin3>;
1220	1420	};
1221	1421	};
1222	1422	};
..	..	@@ -1244,11 +1444,11 @@
1244	1444
1245	1445	vin4csi20: endpoint@0 {
1246	1446	reg = <0>;
1247		- remote-endpoint= <&csi20vin4>;
	1447	+ remote-endpoint = <&csi20vin4>;
1248	1448	};
1249	1449	vin4csi40: endpoint@2 {
1250	1450	reg = <2>;
1251		- remote-endpoint= <&csi40vin4>;
	1451	+ remote-endpoint = <&csi40vin4>;
1252	1452	};
1253	1453	};
1254	1454	};
..	..	@@ -1276,11 +1476,11 @@
1276	1476
1277	1477	vin5csi20: endpoint@0 {
1278	1478	reg = <0>;
1279		- remote-endpoint= <&csi20vin5>;
	1479	+ remote-endpoint = <&csi20vin5>;
1280	1480	};
1281	1481	vin5csi40: endpoint@2 {
1282	1482	reg = <2>;
1283		- remote-endpoint= <&csi40vin5>;
	1483	+ remote-endpoint = <&csi40vin5>;
1284	1484	};
1285	1485	};
1286	1486	};
..	..	@@ -1308,11 +1508,11 @@
1308	1508
1309	1509	vin6csi20: endpoint@0 {
1310	1510	reg = <0>;
1311		- remote-endpoint= <&csi20vin6>;
	1511	+ remote-endpoint = <&csi20vin6>;
1312	1512	};
1313	1513	vin6csi40: endpoint@2 {
1314	1514	reg = <2>;
1315		- remote-endpoint= <&csi40vin6>;
	1515	+ remote-endpoint = <&csi40vin6>;
1316	1516	};
1317	1517	};
1318	1518	};
..	..	@@ -1340,55 +1540,489 @@
1340	1540
1341	1541	vin7csi20: endpoint@0 {
1342	1542	reg = <0>;
1343		- remote-endpoint= <&csi20vin7>;
	1543	+ remote-endpoint = <&csi20vin7>;
1344	1544	};
1345	1545	vin7csi40: endpoint@2 {
1346	1546	reg = <2>;
1347		- remote-endpoint= <&csi40vin7>;
	1547	+ remote-endpoint = <&csi40vin7>;
1348	1548	};
1349	1549	};
1350	1550	};
1351	1551	};
1352	1552
1353	1553	rcar_sound: sound@ec500000 {
	1554	+ /*
	1555	+ * #sound-dai-cells is required
	1556	+ *
	1557	+ * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
	1558	+ * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
	1559	+ */
	1560	+ /*
	1561	+ * #clock-cells is required for audio_clkout0/1/2/3
	1562	+ *
	1563	+ * clkout : #clock-cells = <0>; <&rcar_sound>;
	1564	+ * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
	1565	+ */
	1566	+ compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
1354	1567	reg = <0 0xec500000 0 0x1000>, /* SCU */
1355	1568	<0 0xec5a0000 0 0x100>, /* ADG */
1356	1569	<0 0xec540000 0 0x1000>, /* SSIU */
1357	1570	<0 0xec541000 0 0x280>, /* SSI */
1358		- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1359		- /* placeholder */
	1571	+ <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
	1572	+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
	1573	+
	1574	+ clocks = <&cpg CPG_MOD 1005>,
	1575	+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
	1576	+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
	1577	+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
	1578	+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
	1579	+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
	1580	+ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
	1581	+ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
	1582	+ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
	1583	+ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
	1584	+ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
	1585	+ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
	1586	+ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
	1587	+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
	1588	+ <&audio_clk_a>, <&audio_clk_b>,
	1589	+ <&audio_clk_c>,
	1590	+ <&cpg CPG_CORE R8A77965_CLK_S0D4>;
	1591	+ clock-names = "ssi-all",
	1592	+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
	1593	+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
	1594	+ "ssi.1", "ssi.0",
	1595	+ "src.9", "src.8", "src.7", "src.6",
	1596	+ "src.5", "src.4", "src.3", "src.2",
	1597	+ "src.1", "src.0",
	1598	+ "mix.1", "mix.0",
	1599	+ "ctu.1", "ctu.0",
	1600	+ "dvc.0", "dvc.1",
	1601	+ "clk_a", "clk_b", "clk_c", "clk_i";
	1602	+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
	1603	+ resets = <&cpg 1005>,
	1604	+ <&cpg 1006>, <&cpg 1007>,
	1605	+ <&cpg 1008>, <&cpg 1009>,
	1606	+ <&cpg 1010>, <&cpg 1011>,
	1607	+ <&cpg 1012>, <&cpg 1013>,
	1608	+ <&cpg 1014>, <&cpg 1015>;
	1609	+ reset-names = "ssi-all",
	1610	+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
	1611	+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
	1612	+ "ssi.1", "ssi.0";
	1613	+ status = "disabled";
1360	1614
1361	1615	rcar_sound,dvc {
1362	1616	dvc0: dvc-0 {
	1617	+ dmas = <&audma1 0xbc>;
	1618	+ dma-names = "tx";
1363	1619	};
1364	1620	dvc1: dvc-1 {
	1621	+ dmas = <&audma1 0xbe>;
	1622	+ dma-names = "tx";
1365	1623	};
	1624	+ };
	1625	+
	1626	+ rcar_sound,mix {
	1627	+ mix0: mix-0 { };
	1628	+ mix1: mix-1 { };
	1629	+ };
	1630	+
	1631	+ rcar_sound,ctu {
	1632	+ ctu00: ctu-0 { };
	1633	+ ctu01: ctu-1 { };
	1634	+ ctu02: ctu-2 { };
	1635	+ ctu03: ctu-3 { };
	1636	+ ctu10: ctu-4 { };
	1637	+ ctu11: ctu-5 { };
	1638	+ ctu12: ctu-6 { };
	1639	+ ctu13: ctu-7 { };
1366	1640	};
1367	1641
1368	1642	rcar_sound,src {
1369	1643	src0: src-0 {
	1644	+ interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
	1645	+ dmas = <&audma0 0x85>, <&audma1 0x9a>;
	1646	+ dma-names = "rx", "tx";
1370	1647	};
1371	1648	src1: src-1 {
	1649	+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
	1650	+ dmas = <&audma0 0x87>, <&audma1 0x9c>;
	1651	+ dma-names = "rx", "tx";
	1652	+ };
	1653	+ src2: src-2 {
	1654	+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
	1655	+ dmas = <&audma0 0x89>, <&audma1 0x9e>;
	1656	+ dma-names = "rx", "tx";
	1657	+ };
	1658	+ src3: src-3 {
	1659	+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
	1660	+ dmas = <&audma0 0x8b>, <&audma1 0xa0>;
	1661	+ dma-names = "rx", "tx";
	1662	+ };
	1663	+ src4: src-4 {
	1664	+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
	1665	+ dmas = <&audma0 0x8d>, <&audma1 0xb0>;
	1666	+ dma-names = "rx", "tx";
	1667	+ };
	1668	+ src5: src-5 {
	1669	+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
	1670	+ dmas = <&audma0 0x8f>, <&audma1 0xb2>;
	1671	+ dma-names = "rx", "tx";
	1672	+ };
	1673	+ src6: src-6 {
	1674	+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
	1675	+ dmas = <&audma0 0x91>, <&audma1 0xb4>;
	1676	+ dma-names = "rx", "tx";
	1677	+ };
	1678	+ src7: src-7 {
	1679	+ interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
	1680	+ dmas = <&audma0 0x93>, <&audma1 0xb6>;
	1681	+ dma-names = "rx", "tx";
	1682	+ };
	1683	+ src8: src-8 {
	1684	+ interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
	1685	+ dmas = <&audma0 0x95>, <&audma1 0xb8>;
	1686	+ dma-names = "rx", "tx";
	1687	+ };
	1688	+ src9: src-9 {
	1689	+ interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
	1690	+ dmas = <&audma0 0x97>, <&audma1 0xba>;
	1691	+ dma-names = "rx", "tx";
	1692	+ };
	1693	+ };
	1694	+
	1695	+ rcar_sound,ssiu {
	1696	+ ssiu00: ssiu-0 {
	1697	+ dmas = <&audma0 0x15>, <&audma1 0x16>;
	1698	+ dma-names = "rx", "tx";
	1699	+ };
	1700	+ ssiu01: ssiu-1 {
	1701	+ dmas = <&audma0 0x35>, <&audma1 0x36>;
	1702	+ dma-names = "rx", "tx";
	1703	+ };
	1704	+ ssiu02: ssiu-2 {
	1705	+ dmas = <&audma0 0x37>, <&audma1 0x38>;
	1706	+ dma-names = "rx", "tx";
	1707	+ };
	1708	+ ssiu03: ssiu-3 {
	1709	+ dmas = <&audma0 0x47>, <&audma1 0x48>;
	1710	+ dma-names = "rx", "tx";
	1711	+ };
	1712	+ ssiu04: ssiu-4 {
	1713	+ dmas = <&audma0 0x3F>, <&audma1 0x40>;
	1714	+ dma-names = "rx", "tx";
	1715	+ };
	1716	+ ssiu05: ssiu-5 {
	1717	+ dmas = <&audma0 0x43>, <&audma1 0x44>;
	1718	+ dma-names = "rx", "tx";
	1719	+ };
	1720	+ ssiu06: ssiu-6 {
	1721	+ dmas = <&audma0 0x4F>, <&audma1 0x50>;
	1722	+ dma-names = "rx", "tx";
	1723	+ };
	1724	+ ssiu07: ssiu-7 {
	1725	+ dmas = <&audma0 0x53>, <&audma1 0x54>;
	1726	+ dma-names = "rx", "tx";
	1727	+ };
	1728	+ ssiu10: ssiu-8 {
	1729	+ dmas = <&audma0 0x49>, <&audma1 0x4a>;
	1730	+ dma-names = "rx", "tx";
	1731	+ };
	1732	+ ssiu11: ssiu-9 {
	1733	+ dmas = <&audma0 0x4B>, <&audma1 0x4C>;
	1734	+ dma-names = "rx", "tx";
	1735	+ };
	1736	+ ssiu12: ssiu-10 {
	1737	+ dmas = <&audma0 0x57>, <&audma1 0x58>;
	1738	+ dma-names = "rx", "tx";
	1739	+ };
	1740	+ ssiu13: ssiu-11 {
	1741	+ dmas = <&audma0 0x59>, <&audma1 0x5A>;
	1742	+ dma-names = "rx", "tx";
	1743	+ };
	1744	+ ssiu14: ssiu-12 {
	1745	+ dmas = <&audma0 0x5F>, <&audma1 0x60>;
	1746	+ dma-names = "rx", "tx";
	1747	+ };
	1748	+ ssiu15: ssiu-13 {
	1749	+ dmas = <&audma0 0xC3>, <&audma1 0xC4>;
	1750	+ dma-names = "rx", "tx";
	1751	+ };
	1752	+ ssiu16: ssiu-14 {
	1753	+ dmas = <&audma0 0xC7>, <&audma1 0xC8>;
	1754	+ dma-names = "rx", "tx";
	1755	+ };
	1756	+ ssiu17: ssiu-15 {
	1757	+ dmas = <&audma0 0xCB>, <&audma1 0xCC>;
	1758	+ dma-names = "rx", "tx";
	1759	+ };
	1760	+ ssiu20: ssiu-16 {
	1761	+ dmas = <&audma0 0x63>, <&audma1 0x64>;
	1762	+ dma-names = "rx", "tx";
	1763	+ };
	1764	+ ssiu21: ssiu-17 {
	1765	+ dmas = <&audma0 0x67>, <&audma1 0x68>;
	1766	+ dma-names = "rx", "tx";
	1767	+ };
	1768	+ ssiu22: ssiu-18 {
	1769	+ dmas = <&audma0 0x6B>, <&audma1 0x6C>;
	1770	+ dma-names = "rx", "tx";
	1771	+ };
	1772	+ ssiu23: ssiu-19 {
	1773	+ dmas = <&audma0 0x6D>, <&audma1 0x6E>;
	1774	+ dma-names = "rx", "tx";
	1775	+ };
	1776	+ ssiu24: ssiu-20 {
	1777	+ dmas = <&audma0 0xCF>, <&audma1 0xCE>;
	1778	+ dma-names = "rx", "tx";
	1779	+ };
	1780	+ ssiu25: ssiu-21 {
	1781	+ dmas = <&audma0 0xEB>, <&audma1 0xEC>;
	1782	+ dma-names = "rx", "tx";
	1783	+ };
	1784	+ ssiu26: ssiu-22 {
	1785	+ dmas = <&audma0 0xED>, <&audma1 0xEE>;
	1786	+ dma-names = "rx", "tx";
	1787	+ };
	1788	+ ssiu27: ssiu-23 {
	1789	+ dmas = <&audma0 0xEF>, <&audma1 0xF0>;
	1790	+ dma-names = "rx", "tx";
	1791	+ };
	1792	+ ssiu30: ssiu-24 {
	1793	+ dmas = <&audma0 0x6f>, <&audma1 0x70>;
	1794	+ dma-names = "rx", "tx";
	1795	+ };
	1796	+ ssiu31: ssiu-25 {
	1797	+ dmas = <&audma0 0x21>, <&audma1 0x22>;
	1798	+ dma-names = "rx", "tx";
	1799	+ };
	1800	+ ssiu32: ssiu-26 {
	1801	+ dmas = <&audma0 0x23>, <&audma1 0x24>;
	1802	+ dma-names = "rx", "tx";
	1803	+ };
	1804	+ ssiu33: ssiu-27 {
	1805	+ dmas = <&audma0 0x25>, <&audma1 0x26>;
	1806	+ dma-names = "rx", "tx";
	1807	+ };
	1808	+ ssiu34: ssiu-28 {
	1809	+ dmas = <&audma0 0x27>, <&audma1 0x28>;
	1810	+ dma-names = "rx", "tx";
	1811	+ };
	1812	+ ssiu35: ssiu-29 {
	1813	+ dmas = <&audma0 0x29>, <&audma1 0x2A>;
	1814	+ dma-names = "rx", "tx";
	1815	+ };
	1816	+ ssiu36: ssiu-30 {
	1817	+ dmas = <&audma0 0x2B>, <&audma1 0x2C>;
	1818	+ dma-names = "rx", "tx";
	1819	+ };
	1820	+ ssiu37: ssiu-31 {
	1821	+ dmas = <&audma0 0x2D>, <&audma1 0x2E>;
	1822	+ dma-names = "rx", "tx";
	1823	+ };
	1824	+ ssiu40: ssiu-32 {
	1825	+ dmas = <&audma0 0x71>, <&audma1 0x72>;
	1826	+ dma-names = "rx", "tx";
	1827	+ };
	1828	+ ssiu41: ssiu-33 {
	1829	+ dmas = <&audma0 0x17>, <&audma1 0x18>;
	1830	+ dma-names = "rx", "tx";
	1831	+ };
	1832	+ ssiu42: ssiu-34 {
	1833	+ dmas = <&audma0 0x19>, <&audma1 0x1A>;
	1834	+ dma-names = "rx", "tx";
	1835	+ };
	1836	+ ssiu43: ssiu-35 {
	1837	+ dmas = <&audma0 0x1B>, <&audma1 0x1C>;
	1838	+ dma-names = "rx", "tx";
	1839	+ };
	1840	+ ssiu44: ssiu-36 {
	1841	+ dmas = <&audma0 0x1D>, <&audma1 0x1E>;
	1842	+ dma-names = "rx", "tx";
	1843	+ };
	1844	+ ssiu45: ssiu-37 {
	1845	+ dmas = <&audma0 0x1F>, <&audma1 0x20>;
	1846	+ dma-names = "rx", "tx";
	1847	+ };
	1848	+ ssiu46: ssiu-38 {
	1849	+ dmas = <&audma0 0x31>, <&audma1 0x32>;
	1850	+ dma-names = "rx", "tx";
	1851	+ };
	1852	+ ssiu47: ssiu-39 {
	1853	+ dmas = <&audma0 0x33>, <&audma1 0x34>;
	1854	+ dma-names = "rx", "tx";
	1855	+ };
	1856	+ ssiu50: ssiu-40 {
	1857	+ dmas = <&audma0 0x73>, <&audma1 0x74>;
	1858	+ dma-names = "rx", "tx";
	1859	+ };
	1860	+ ssiu60: ssiu-41 {
	1861	+ dmas = <&audma0 0x75>, <&audma1 0x76>;
	1862	+ dma-names = "rx", "tx";
	1863	+ };
	1864	+ ssiu70: ssiu-42 {
	1865	+ dmas = <&audma0 0x79>, <&audma1 0x7a>;
	1866	+ dma-names = "rx", "tx";
	1867	+ };
	1868	+ ssiu80: ssiu-43 {
	1869	+ dmas = <&audma0 0x7b>, <&audma1 0x7c>;
	1870	+ dma-names = "rx", "tx";
	1871	+ };
	1872	+ ssiu90: ssiu-44 {
	1873	+ dmas = <&audma0 0x7d>, <&audma1 0x7e>;
	1874	+ dma-names = "rx", "tx";
	1875	+ };
	1876	+ ssiu91: ssiu-45 {
	1877	+ dmas = <&audma0 0x7F>, <&audma1 0x80>;
	1878	+ dma-names = "rx", "tx";
	1879	+ };
	1880	+ ssiu92: ssiu-46 {
	1881	+ dmas = <&audma0 0x81>, <&audma1 0x82>;
	1882	+ dma-names = "rx", "tx";
	1883	+ };
	1884	+ ssiu93: ssiu-47 {
	1885	+ dmas = <&audma0 0x83>, <&audma1 0x84>;
	1886	+ dma-names = "rx", "tx";
	1887	+ };
	1888	+ ssiu94: ssiu-48 {
	1889	+ dmas = <&audma0 0xA3>, <&audma1 0xA4>;
	1890	+ dma-names = "rx", "tx";
	1891	+ };
	1892	+ ssiu95: ssiu-49 {
	1893	+ dmas = <&audma0 0xA5>, <&audma1 0xA6>;
	1894	+ dma-names = "rx", "tx";
	1895	+ };
	1896	+ ssiu96: ssiu-50 {
	1897	+ dmas = <&audma0 0xA7>, <&audma1 0xA8>;
	1898	+ dma-names = "rx", "tx";
	1899	+ };
	1900	+ ssiu97: ssiu-51 {
	1901	+ dmas = <&audma0 0xA9>, <&audma1 0xAA>;
	1902	+ dma-names = "rx", "tx";
1372	1903	};
1373	1904	};
1374	1905
1375	1906	rcar_sound,ssi {
1376	1907	ssi0: ssi-0 {
	1908	+ interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
	1909	+ dmas = <&audma0 0x01>, <&audma1 0x02>;
	1910	+ dma-names = "rx", "tx";
1377	1911	};
1378	1912	ssi1: ssi-1 {
	1913	+ interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
	1914	+ dmas = <&audma0 0x03>, <&audma1 0x04>;
	1915	+ dma-names = "rx", "tx";
	1916	+ };
	1917	+ ssi2: ssi-2 {
	1918	+ interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
	1919	+ dmas = <&audma0 0x05>, <&audma1 0x06>;
	1920	+ dma-names = "rx", "tx";
	1921	+ };
	1922	+ ssi3: ssi-3 {
	1923	+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
	1924	+ dmas = <&audma0 0x07>, <&audma1 0x08>;
	1925	+ dma-names = "rx", "tx";
	1926	+ };
	1927	+ ssi4: ssi-4 {
	1928	+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
	1929	+ dmas = <&audma0 0x09>, <&audma1 0x0a>;
	1930	+ dma-names = "rx", "tx";
	1931	+ };
	1932	+ ssi5: ssi-5 {
	1933	+ interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
	1934	+ dmas = <&audma0 0x0b>, <&audma1 0x0c>;
	1935	+ dma-names = "rx", "tx";
	1936	+ };
	1937	+ ssi6: ssi-6 {
	1938	+ interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
	1939	+ dmas = <&audma0 0x0d>, <&audma1 0x0e>;
	1940	+ dma-names = "rx", "tx";
	1941	+ };
	1942	+ ssi7: ssi-7 {
	1943	+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
	1944	+ dmas = <&audma0 0x0f>, <&audma1 0x10>;
	1945	+ dma-names = "rx", "tx";
	1946	+ };
	1947	+ ssi8: ssi-8 {
	1948	+ interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
	1949	+ dmas = <&audma0 0x11>, <&audma1 0x12>;
	1950	+ dma-names = "rx", "tx";
	1951	+ };
	1952	+ ssi9: ssi-9 {
	1953	+ interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
	1954	+ dmas = <&audma0 0x13>, <&audma1 0x14>;
	1955	+ dma-names = "rx", "tx";
1379	1956	};
1380	1957	};
	1958	+ };
1381	1959
1382		- ports {
1383		- #address-cells = <1>;
1384		- #size-cells = <0>;
1385		- port@0 {
1386		- reg = <0>;
1387		- };
1388		- port@1 {
1389		- reg = <1>;
1390		- };
1391		- };
	1960	+ audma0: dma-controller@ec700000 {
	1961	+ compatible = "renesas,dmac-r8a77965",
	1962	+ "renesas,rcar-dmac";
	1963	+ reg = <0 0xec700000 0 0x10000>;
	1964	+ interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
	1965	+ <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
	1966	+ <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
	1967	+ <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
	1968	+ <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
	1969	+ <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
	1970	+ <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
	1971	+ <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
	1972	+ <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
	1973	+ <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
	1974	+ <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
	1975	+ <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
	1976	+ <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
	1977	+ <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
	1978	+ <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
	1979	+ <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
	1980	+ <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
	1981	+ interrupt-names = "error",
	1982	+ "ch0", "ch1", "ch2", "ch3",
	1983	+ "ch4", "ch5", "ch6", "ch7",
	1984	+ "ch8", "ch9", "ch10", "ch11",
	1985	+ "ch12", "ch13", "ch14", "ch15";
	1986	+ clocks = <&cpg CPG_MOD 502>;
	1987	+ clock-names = "fck";
	1988	+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
	1989	+ resets = <&cpg 502>;
	1990	+ #dma-cells = <1>;
	1991	+ dma-channels = <16>;
	1992	+ };
	1993	+
	1994	+ audma1: dma-controller@ec720000 {
	1995	+ compatible = "renesas,dmac-r8a77965",
	1996	+ "renesas,rcar-dmac";
	1997	+ reg = <0 0xec720000 0 0x10000>;
	1998	+ interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
	1999	+ <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
	2000	+ <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
	2001	+ <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
	2002	+ <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
	2003	+ <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
	2004	+ <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
	2005	+ <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
	2006	+ <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
	2007	+ <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
	2008	+ <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
	2009	+ <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
	2010	+ <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
	2011	+ <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
	2012	+ <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
	2013	+ <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
	2014	+ <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
	2015	+ interrupt-names = "error",
	2016	+ "ch0", "ch1", "ch2", "ch3",
	2017	+ "ch4", "ch5", "ch6", "ch7",
	2018	+ "ch8", "ch9", "ch10", "ch11",
	2019	+ "ch12", "ch13", "ch14", "ch15";
	2020	+ clocks = <&cpg CPG_MOD 501>;
	2021	+ clock-names = "fck";
	2022	+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
	2023	+ resets = <&cpg 501>;
	2024	+ #dma-cells = <1>;
	2025	+ dma-channels = <16>;
1392	2026	};
1393	2027
1394	2028	xhci0: usb@ee000000 {
..	..	@@ -1417,11 +2051,11 @@
1417	2051	compatible = "generic-ohci";
1418	2052	reg = <0 0xee080000 0 0x100>;
1419	2053	interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1420		- clocks = <&cpg CPG_MOD 703>;
1421		- phys = <&usb2_phy0>;
	2054	+ clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
	2055	+ phys = <&usb2_phy0 1>;
1422	2056	phy-names = "usb";
1423	2057	power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1424		- resets = <&cpg 703>;
	2058	+ resets = <&cpg 703>, <&cpg 704>;
1425	2059	status = "disabled";
1426	2060	};
1427	2061
..	..	@@ -1430,7 +2064,7 @@
1430	2064	reg = <0 0xee0a0000 0 0x100>;
1431	2065	interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1432	2066	clocks = <&cpg CPG_MOD 702>;
1433		- phys = <&usb2_phy1>;
	2067	+ phys = <&usb2_phy1 1>;
1434	2068	phy-names = "usb";
1435	2069	power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1436	2070	resets = <&cpg 702>;
..	..	@@ -1441,12 +2075,12 @@
1441	2075	compatible = "generic-ehci";
1442	2076	reg = <0 0xee080100 0 0x100>;
1443	2077	interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1444		- clocks = <&cpg CPG_MOD 703>;
1445		- phys = <&usb2_phy0>;
	2078	+ clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
	2079	+ phys = <&usb2_phy0 2>;
1446	2080	phy-names = "usb";
1447	2081	companion = <&ohci0>;
1448	2082	power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1449		- resets = <&cpg 703>;
	2083	+ resets = <&cpg 703>, <&cpg 704>;
1450	2084	status = "disabled";
1451	2085	};
1452	2086
..	..	@@ -1455,7 +2089,7 @@
1455	2089	reg = <0 0xee0a0100 0 0x100>;
1456	2090	interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1457	2091	clocks = <&cpg CPG_MOD 702>;
1458		- phys = <&usb2_phy1>;
	2092	+ phys = <&usb2_phy1 2>;
1459	2093	phy-names = "usb";
1460	2094	companion = <&ohci1>;
1461	2095	power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
..	..	@@ -1468,10 +2102,10 @@
1468	2102	"renesas,rcar-gen3-usb2-phy";
1469	2103	reg = <0 0xee080200 0 0x700>;
1470	2104	interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1471		- clocks = <&cpg CPG_MOD 703>;
	2105	+ clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1472	2106	power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1473		- resets = <&cpg 703>;
1474		- #phy-cells = <0>;
	2107	+ resets = <&cpg 703>, <&cpg 704>;
	2108	+ #phy-cells = <1>;
1475	2109	status = "disabled";
1476	2110	};
1477	2111
..	..	@@ -1482,11 +2116,11 @@
1482	2116	clocks = <&cpg CPG_MOD 702>;
1483	2117	power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1484	2118	resets = <&cpg 702>;
1485		- #phy-cells = <0>;
	2119	+ #phy-cells = <1>;
1486	2120	status = "disabled";
1487	2121	};
1488	2122
1489		- sdhi0: sd@ee100000 {
	2123	+ sdhi0: mmc@ee100000 {
1490	2124	compatible = "renesas,sdhi-r8a77965",
1491	2125	"renesas,rcar-gen3-sdhi";
1492	2126	reg = <0 0xee100000 0 0x2000>;
..	..	@@ -1495,10 +2129,11 @@
1495	2129	max-frequency = <200000000>;
1496	2130	power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1497	2131	resets = <&cpg 314>;
	2132	+ iommus = <&ipmmu_ds1 32>;
1498	2133	status = "disabled";
1499	2134	};
1500	2135
1501		- sdhi1: sd@ee120000 {
	2136	+ sdhi1: mmc@ee120000 {
1502	2137	compatible = "renesas,sdhi-r8a77965",
1503	2138	"renesas,rcar-gen3-sdhi";
1504	2139	reg = <0 0xee120000 0 0x2000>;
..	..	@@ -1507,10 +2142,11 @@
1507	2142	max-frequency = <200000000>;
1508	2143	power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1509	2144	resets = <&cpg 313>;
	2145	+ iommus = <&ipmmu_ds1 33>;
1510	2146	status = "disabled";
1511	2147	};
1512	2148
1513		- sdhi2: sd@ee140000 {
	2149	+ sdhi2: mmc@ee140000 {
1514	2150	compatible = "renesas,sdhi-r8a77965",
1515	2151	"renesas,rcar-gen3-sdhi";
1516	2152	reg = <0 0xee140000 0 0x2000>;
..	..	@@ -1519,10 +2155,11 @@
1519	2155	max-frequency = <200000000>;
1520	2156	power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1521	2157	resets = <&cpg 312>;
	2158	+ iommus = <&ipmmu_ds1 34>;
1522	2159	status = "disabled";
1523	2160	};
1524	2161
1525		- sdhi3: sd@ee160000 {
	2162	+ sdhi3: mmc@ee160000 {
1526	2163	compatible = "renesas,sdhi-r8a77965",
1527	2164	"renesas,rcar-gen3-sdhi";
1528	2165	reg = <0 0xee160000 0 0x2000>;
..	..	@@ -1531,6 +2168,18 @@
1531	2168	max-frequency = <200000000>;
1532	2169	power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1533	2170	resets = <&cpg 311>;
	2171	+ iommus = <&ipmmu_ds1 35>;
	2172	+ status = "disabled";
	2173	+ };
	2174	+
	2175	+ sata: sata@ee300000 {
	2176	+ compatible = "renesas,sata-r8a77965",
	2177	+ "renesas,rcar-gen3-sata";
	2178	+ reg = <0 0xee300000 0 0x200000>;
	2179	+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
	2180	+ clocks = <&cpg CPG_MOD 815>;
	2181	+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
	2182	+ resets = <&cpg 815>;
1534	2183	status = "disabled";
1535	2184	};
1536	2185
..	..	@@ -1559,10 +2208,10 @@
1559	2208	#size-cells = <2>;
1560	2209	bus-range = <0x00 0xff>;
1561	2210	device_type = "pci";
1562		- ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1563		- 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1564		- 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1565		- 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
	2211	+ ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
	2212	+ <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
	2213	+ <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
	2214	+ <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1566	2215	/* Map all possible DDR as inbound ranges */
1567	2216	dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1568	2217	interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
..	..	@@ -1586,10 +2235,10 @@
1586	2235	#size-cells = <2>;
1587	2236	bus-range = <0x00 0xff>;
1588	2237	device_type = "pci";
1589		- ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1590		- 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1591		- 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1592		- 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
	2238	+ ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
	2239	+ <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
	2240	+ <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
	2241	+ <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1593	2242	/* Map all possible DDR as inbound ranges */
1594	2243	dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1595	2244	interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
..	..	@@ -1603,6 +2252,16 @@
1603	2252	power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1604	2253	resets = <&cpg 318>;
1605	2254	status = "disabled";
	2255	+ };
	2256	+
	2257	+ fdp1@fe940000 {
	2258	+ compatible = "renesas,fdp1";
	2259	+ reg = <0 0xfe940000 0 0x2400>;
	2260	+ interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
	2261	+ clocks = <&cpg CPG_MOD 119>;
	2262	+ power-domains = <&sysc R8A77965_PD_A3VP>;
	2263	+ resets = <&cpg 119>;
	2264	+ renesas,fcp = <&fcpf0>;
1606	2265	};
1607	2266
1608	2267	fcpf0: fcp@fe950000 {
..	..	@@ -1624,14 +2283,6 @@
1624	2283	renesas,fcp = <&fcpvb0>;
1625	2284	};
1626	2285
1627		- fcpvb0: fcp@fe96f000 {
1628		- compatible = "renesas,fcpv";
1629		- reg = <0 0xfe96f000 0 0x200>;
1630		- clocks = <&cpg CPG_MOD 607>;
1631		- power-domains = <&sysc R8A77965_PD_A3VP>;
1632		- resets = <&cpg 607>;
1633		- };
1634		-
1635	2286	vspi0: vsp@fe9a0000 {
1636	2287	compatible = "renesas,vsp2";
1637	2288	reg = <0 0xfe9a0000 0 0x8000>;
..	..	@@ -1641,14 +2292,6 @@
1641	2292	resets = <&cpg 631>;
1642	2293
1643	2294	renesas,fcp = <&fcpvi0>;
1644		- };
1645		-
1646		- fcpvi0: fcp@fe9af000 {
1647		- compatible = "renesas,fcpv";
1648		- reg = <0 0xfe9af000 0 0x200>;
1649		- clocks = <&cpg CPG_MOD 611>;
1650		- power-domains = <&sysc R8A77965_PD_A3VP>;
1651		- resets = <&cpg 611>;
1652	2295	};
1653	2296
1654	2297	vspd0: vsp@fea20000 {
..	..	@@ -1662,14 +2305,6 @@
1662	2305	renesas,fcp = <&fcpvd0>;
1663	2306	};
1664	2307
1665		- fcpvd0: fcp@fea27000 {
1666		- compatible = "renesas,fcpv";
1667		- reg = <0 0xfea27000 0 0x200>;
1668		- clocks = <&cpg CPG_MOD 603>;
1669		- power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1670		- resets = <&cpg 603>;
1671		- };
1672		-
1673	2308	vspd1: vsp@fea28000 {
1674	2309	compatible = "renesas,vsp2";
1675	2310	reg = <0 0xfea28000 0 0x5000>;
..	..	@@ -1681,12 +2316,63 @@
1681	2316	renesas,fcp = <&fcpvd1>;
1682	2317	};
1683	2318
	2319	+ fcpvb0: fcp@fe96f000 {
	2320	+ compatible = "renesas,fcpv";
	2321	+ reg = <0 0xfe96f000 0 0x200>;
	2322	+ clocks = <&cpg CPG_MOD 607>;
	2323	+ power-domains = <&sysc R8A77965_PD_A3VP>;
	2324	+ resets = <&cpg 607>;
	2325	+ };
	2326	+
	2327	+ fcpvd0: fcp@fea27000 {
	2328	+ compatible = "renesas,fcpv";
	2329	+ reg = <0 0xfea27000 0 0x200>;
	2330	+ clocks = <&cpg CPG_MOD 603>;
	2331	+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
	2332	+ resets = <&cpg 603>;
	2333	+ };
	2334	+
1684	2335	fcpvd1: fcp@fea2f000 {
1685	2336	compatible = "renesas,fcpv";
1686	2337	reg = <0 0xfea2f000 0 0x200>;
1687	2338	clocks = <&cpg CPG_MOD 602>;
1688	2339	power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1689	2340	resets = <&cpg 602>;
	2341	+ };
	2342	+
	2343	+ fcpvi0: fcp@fe9af000 {
	2344	+ compatible = "renesas,fcpv";
	2345	+ reg = <0 0xfe9af000 0 0x200>;
	2346	+ clocks = <&cpg CPG_MOD 611>;
	2347	+ power-domains = <&sysc R8A77965_PD_A3VP>;
	2348	+ resets = <&cpg 611>;
	2349	+ };
	2350	+
	2351	+ cmm0: cmm@fea40000 {
	2352	+ compatible = "renesas,r8a77965-cmm",
	2353	+ "renesas,rcar-gen3-cmm";
	2354	+ reg = <0 0xfea40000 0 0x1000>;
	2355	+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
	2356	+ clocks = <&cpg CPG_MOD 711>;
	2357	+ resets = <&cpg 711>;
	2358	+ };
	2359	+
	2360	+ cmm1: cmm@fea50000 {
	2361	+ compatible = "renesas,r8a77965-cmm",
	2362	+ "renesas,rcar-gen3-cmm";
	2363	+ reg = <0 0xfea50000 0 0x1000>;
	2364	+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
	2365	+ clocks = <&cpg CPG_MOD 710>;
	2366	+ resets = <&cpg 710>;
	2367	+ };
	2368	+
	2369	+ cmm3: cmm@fea70000 {
	2370	+ compatible = "renesas,r8a77965-cmm",
	2371	+ "renesas,rcar-gen3-cmm";
	2372	+ reg = <0 0xfea70000 0 0x1000>;
	2373	+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
	2374	+ clocks = <&cpg CPG_MOD 708>;
	2375	+ resets = <&cpg 708>;
1690	2376	};
1691	2377
1692	2378	csi20: csi2@fea80000 {
..	..	@@ -1829,17 +2515,19 @@
1829	2515	du: display@feb00000 {
1830	2516	compatible = "renesas,du-r8a77965";
1831	2517	reg = <0 0xfeb00000 0 0x80000>;
1832		- reg-names = "du";
1833	2518	interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1834	2519	<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1835	2520	<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
1836		- clocks = <&cpg CPG_MOD 724>,
1837		- <&cpg CPG_MOD 723>,
	2521	+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1838	2522	<&cpg CPG_MOD 721>;
1839	2523	clock-names = "du.0", "du.1", "du.3";
1840		- status = "disabled";
	2524	+ resets = <&cpg 724>, <&cpg 722>;
	2525	+ reset-names = "du.0", "du.3";
1841	2526
1842		- vsps = <&vspd0 0 &vspd1 0 &vspd0 1>;
	2527	+ renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
	2528	+ renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
	2529	+
	2530	+ status = "disabled";
1843	2531
1844	2532	ports {
1845	2533	#address-cells = <1>;
..	..	@@ -1859,6 +2547,33 @@
1859	2547	port@2 {
1860	2548	reg = <2>;
1861	2549	du_out_lvds0: endpoint {
	2550	+ remote-endpoint = <&lvds0_in>;
	2551	+ };
	2552	+ };
	2553	+ };
	2554	+ };
	2555	+
	2556	+ lvds0: lvds@feb90000 {
	2557	+ compatible = "renesas,r8a77965-lvds";
	2558	+ reg = <0 0xfeb90000 0 0x14>;
	2559	+ clocks = <&cpg CPG_MOD 727>;
	2560	+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
	2561	+ resets = <&cpg 727>;
	2562	+ status = "disabled";
	2563	+
	2564	+ ports {
	2565	+ #address-cells = <1>;
	2566	+ #size-cells = <0>;
	2567	+
	2568	+ port@0 {
	2569	+ reg = <0>;
	2570	+ lvds0_in: endpoint {
	2571	+ remote-endpoint = <&du_out_lvds0>;
	2572	+ };
	2573	+ };
	2574	+ port@1 {
	2575	+ reg = <1>;
	2576	+ lvds0_out: endpoint {
1862	2577	};
1863	2578	};
1864	2579	};
..	..	@@ -1870,19 +2585,12 @@
1870	2585	};
1871	2586	};
1872	2587
1873		- timer {
1874		- compatible = "arm,armv8-timer";
1875		- interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) \| IRQ_TYPE_LEVEL_LOW)>,
1876		- <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) \| IRQ_TYPE_LEVEL_LOW)>,
1877		- <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) \| IRQ_TYPE_LEVEL_LOW)>,
1878		- <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) \| IRQ_TYPE_LEVEL_LOW)>;
1879		- };
1880		-
1881	2588	thermal-zones {
1882	2589	sensor_thermal1: sensor-thermal1 {
1883	2590	polling-delay-passive = <250>;
1884	2591	polling-delay = <1000>;
1885	2592	thermal-sensors = <&tsc 0>;
	2593	+ sustainable-power = <2439>;
1886	2594
1887	2595	trips {
1888	2596	sensor1_crit: sensor1-crit {
..	..	@@ -1897,6 +2605,7 @@
1897	2605	polling-delay-passive = <250>;
1898	2606	polling-delay = <1000>;
1899	2607	thermal-sensors = <&tsc 1>;
	2608	+ sustainable-power = <2439>;
1900	2609
1901	2610	trips {
1902	2611	sensor2_crit: sensor2-crit {
..	..	@@ -1911,17 +2620,41 @@
1911	2620	polling-delay-passive = <250>;
1912	2621	polling-delay = <1000>;
1913	2622	thermal-sensors = <&tsc 2>;
	2623	+ sustainable-power = <2439>;
1914	2624
1915	2625	trips {
	2626	+ target: trip-point1 {
	2627	+ /* miliCelsius */
	2628	+ temperature = <100000>;
	2629	+ hysteresis = <1000>;
	2630	+ type = "passive";
	2631	+ };
	2632	+
1916	2633	sensor3_crit: sensor3-crit {
1917	2634	temperature = <120000>;
1918	2635	hysteresis = <1000>;
1919	2636	type = "critical";
1920	2637	};
1921	2638	};
	2639	+
	2640	+ cooling-maps {
	2641	+ map0 {
	2642	+ trip = <&target>;
	2643	+ cooling-device = <&a57_0 2 4>;
	2644	+ contribution = <1024>;
	2645	+ };
	2646	+ };
1922	2647	};
1923	2648	};
1924	2649
	2650	+ timer {
	2651	+ compatible = "arm,armv8-timer";
	2652	+ interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) \| IRQ_TYPE_LEVEL_LOW)>,
	2653	+ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) \| IRQ_TYPE_LEVEL_LOW)>,
	2654	+ <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) \| IRQ_TYPE_LEVEL_LOW)>,
	2655	+ <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) \| IRQ_TYPE_LEVEL_LOW)>;
	2656	+ };
	2657	+
1925	2658	/* External USB clocks - can be overridden by the board */
1926	2659	usb3s0_clk: usb3s0 {
1927	2660	compatible = "fixed-clock";