forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-12-06 08f87f769b595151be1afeff53e144f543faa614
kernel/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
....@@ -7,11 +7,13 @@
77
88 /dts-v1/;
99
10
+#include <dt-bindings/gpio/gpio.h>
11
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
1012 #include "sdm845.dtsi"
1113
1214 / {
1315 model = "Qualcomm Technologies, Inc. SDM845 MTP";
14
- compatible = "qcom,sdm845-mtp";
16
+ compatible = "qcom,sdm845-mtp", "qcom,sdm845";
1517
1618 aliases {
1719 serial0 = &uart9;
....@@ -20,6 +22,425 @@
2022 chosen {
2123 stdout-path = "serial0:115200n8";
2224 };
25
+
26
+ vph_pwr: vph-pwr-regulator {
27
+ compatible = "regulator-fixed";
28
+ regulator-name = "vph_pwr";
29
+ regulator-min-microvolt = <3700000>;
30
+ regulator-max-microvolt = <3700000>;
31
+ };
32
+
33
+ /*
34
+ * Apparently RPMh does not provide support for PM8998 S4 because it
35
+ * is always-on; model it as a fixed regulator.
36
+ */
37
+ vreg_s4a_1p8: pm8998-smps4 {
38
+ compatible = "regulator-fixed";
39
+ regulator-name = "vreg_s4a_1p8";
40
+
41
+ regulator-min-microvolt = <1800000>;
42
+ regulator-max-microvolt = <1800000>;
43
+
44
+ regulator-always-on;
45
+ regulator-boot-on;
46
+
47
+ vin-supply = <&vph_pwr>;
48
+ };
49
+};
50
+
51
+&adsp_pas {
52
+ status = "okay";
53
+ firmware-name = "qcom/sdm845/adsp.mdt";
54
+};
55
+
56
+&apps_rsc {
57
+ pm8998-rpmh-regulators {
58
+ compatible = "qcom,pm8998-rpmh-regulators";
59
+ qcom,pmic-id = "a";
60
+
61
+ vdd-s1-supply = <&vph_pwr>;
62
+ vdd-s2-supply = <&vph_pwr>;
63
+ vdd-s3-supply = <&vph_pwr>;
64
+ vdd-s4-supply = <&vph_pwr>;
65
+ vdd-s5-supply = <&vph_pwr>;
66
+ vdd-s6-supply = <&vph_pwr>;
67
+ vdd-s7-supply = <&vph_pwr>;
68
+ vdd-s8-supply = <&vph_pwr>;
69
+ vdd-s9-supply = <&vph_pwr>;
70
+ vdd-s10-supply = <&vph_pwr>;
71
+ vdd-s11-supply = <&vph_pwr>;
72
+ vdd-s12-supply = <&vph_pwr>;
73
+ vdd-s13-supply = <&vph_pwr>;
74
+ vdd-l1-l27-supply = <&vreg_s7a_1p025>;
75
+ vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
76
+ vdd-l3-l11-supply = <&vreg_s7a_1p025>;
77
+ vdd-l4-l5-supply = <&vreg_s7a_1p025>;
78
+ vdd-l6-supply = <&vph_pwr>;
79
+ vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
80
+ vdd-l9-supply = <&vreg_bob>;
81
+ vdd-l10-l23-l25-supply = <&vreg_bob>;
82
+ vdd-l13-l19-l21-supply = <&vreg_bob>;
83
+ vdd-l16-l28-supply = <&vreg_bob>;
84
+ vdd-l18-l22-supply = <&vreg_bob>;
85
+ vdd-l20-l24-supply = <&vreg_bob>;
86
+ vdd-l26-supply = <&vreg_s3a_1p35>;
87
+ vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
88
+
89
+ vreg_s2a_1p125: smps2 {
90
+ regulator-min-microvolt = <1100000>;
91
+ regulator-max-microvolt = <1100000>;
92
+ };
93
+
94
+ vreg_s3a_1p35: smps3 {
95
+ regulator-min-microvolt = <1352000>;
96
+ regulator-max-microvolt = <1352000>;
97
+ };
98
+
99
+ vreg_s5a_2p04: smps5 {
100
+ regulator-min-microvolt = <1904000>;
101
+ regulator-max-microvolt = <2040000>;
102
+ };
103
+
104
+ vreg_s7a_1p025: smps7 {
105
+ regulator-min-microvolt = <900000>;
106
+ regulator-max-microvolt = <1028000>;
107
+ };
108
+
109
+ vdd_qusb_hs0:
110
+ vdda_hp_pcie_core:
111
+ vdda_mipi_csi0_0p9:
112
+ vdda_mipi_csi1_0p9:
113
+ vdda_mipi_csi2_0p9:
114
+ vdda_mipi_dsi0_pll:
115
+ vdda_mipi_dsi1_pll:
116
+ vdda_qlink_lv:
117
+ vdda_qlink_lv_ck:
118
+ vdda_qrefs_0p875:
119
+ vdda_pcie_core:
120
+ vdda_pll_cc_ebi01:
121
+ vdda_pll_cc_ebi23:
122
+ vdda_sp_sensor:
123
+ vdda_ufs1_core:
124
+ vdda_ufs2_core:
125
+ vdda_usb1_ss_core:
126
+ vdda_usb2_ss_core:
127
+ vreg_l1a_0p875: ldo1 {
128
+ regulator-min-microvolt = <880000>;
129
+ regulator-max-microvolt = <880000>;
130
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
131
+ };
132
+
133
+ vddpx_10:
134
+ vreg_l2a_1p2: ldo2 {
135
+ regulator-min-microvolt = <1200000>;
136
+ regulator-max-microvolt = <1200000>;
137
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
138
+ regulator-always-on;
139
+ };
140
+
141
+ vreg_l3a_1p0: ldo3 {
142
+ regulator-min-microvolt = <1000000>;
143
+ regulator-max-microvolt = <1000000>;
144
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
145
+ };
146
+
147
+ vdd_wcss_cx:
148
+ vdd_wcss_mx:
149
+ vdda_wcss_pll:
150
+ vreg_l5a_0p8: ldo5 {
151
+ regulator-min-microvolt = <800000>;
152
+ regulator-max-microvolt = <800000>;
153
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
154
+ };
155
+
156
+ vddpx_13:
157
+ vreg_l6a_1p8: ldo6 {
158
+ regulator-min-microvolt = <1856000>;
159
+ regulator-max-microvolt = <1856000>;
160
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
161
+ };
162
+
163
+ vreg_l7a_1p8: ldo7 {
164
+ regulator-min-microvolt = <1800000>;
165
+ regulator-max-microvolt = <1800000>;
166
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
167
+ };
168
+
169
+ vreg_l8a_1p2: ldo8 {
170
+ regulator-min-microvolt = <1200000>;
171
+ regulator-max-microvolt = <1248000>;
172
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
173
+ };
174
+
175
+ vreg_l9a_1p8: ldo9 {
176
+ regulator-min-microvolt = <1704000>;
177
+ regulator-max-microvolt = <2928000>;
178
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
179
+ };
180
+
181
+ vreg_l10a_1p8: ldo10 {
182
+ regulator-min-microvolt = <1704000>;
183
+ regulator-max-microvolt = <2928000>;
184
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
185
+ };
186
+
187
+ vreg_l11a_1p0: ldo11 {
188
+ regulator-min-microvolt = <1000000>;
189
+ regulator-max-microvolt = <1048000>;
190
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
191
+ };
192
+
193
+ vdd_qfprom:
194
+ vdd_qfprom_sp:
195
+ vdda_apc1_cs_1p8:
196
+ vdda_gfx_cs_1p8:
197
+ vdda_qrefs_1p8:
198
+ vdda_qusb_hs0_1p8:
199
+ vddpx_11:
200
+ vreg_l12a_1p8: ldo12 {
201
+ regulator-min-microvolt = <1800000>;
202
+ regulator-max-microvolt = <1800000>;
203
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
204
+ };
205
+
206
+ vddpx_2:
207
+ vreg_l13a_2p95: ldo13 {
208
+ regulator-min-microvolt = <1800000>;
209
+ regulator-max-microvolt = <2960000>;
210
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
211
+ };
212
+
213
+ vreg_l14a_1p88: ldo14 {
214
+ regulator-min-microvolt = <1800000>;
215
+ regulator-max-microvolt = <1800000>;
216
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
217
+ };
218
+
219
+ vreg_l15a_1p8: ldo15 {
220
+ regulator-min-microvolt = <1800000>;
221
+ regulator-max-microvolt = <1800000>;
222
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
223
+ };
224
+
225
+ vreg_l16a_2p7: ldo16 {
226
+ regulator-min-microvolt = <2704000>;
227
+ regulator-max-microvolt = <2704000>;
228
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
229
+ };
230
+
231
+ vreg_l17a_1p3: ldo17 {
232
+ regulator-min-microvolt = <1304000>;
233
+ regulator-max-microvolt = <1304000>;
234
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
235
+ };
236
+
237
+ vreg_l18a_2p7: ldo18 {
238
+ regulator-min-microvolt = <2704000>;
239
+ regulator-max-microvolt = <2960000>;
240
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
241
+ };
242
+
243
+ vreg_l19a_3p0: ldo19 {
244
+ regulator-min-microvolt = <2856000>;
245
+ regulator-max-microvolt = <3104000>;
246
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
247
+ };
248
+
249
+ vreg_l20a_2p95: ldo20 {
250
+ regulator-min-microvolt = <2704000>;
251
+ regulator-max-microvolt = <2960000>;
252
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
253
+ };
254
+
255
+ vreg_l21a_2p95: ldo21 {
256
+ regulator-min-microvolt = <2704000>;
257
+ regulator-max-microvolt = <2960000>;
258
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
259
+ };
260
+
261
+ vreg_l22a_2p85: ldo22 {
262
+ regulator-min-microvolt = <2864000>;
263
+ regulator-max-microvolt = <3312000>;
264
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
265
+ };
266
+
267
+ vreg_l23a_3p3: ldo23 {
268
+ regulator-min-microvolt = <3000000>;
269
+ regulator-max-microvolt = <3312000>;
270
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
271
+ };
272
+
273
+ vdda_qusb_hs0_3p1:
274
+ vreg_l24a_3p075: ldo24 {
275
+ regulator-min-microvolt = <3088000>;
276
+ regulator-max-microvolt = <3088000>;
277
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
278
+ };
279
+
280
+ vreg_l25a_3p3: ldo25 {
281
+ regulator-min-microvolt = <3300000>;
282
+ regulator-max-microvolt = <3312000>;
283
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
284
+ };
285
+
286
+ vdda_hp_pcie_1p2:
287
+ vdda_hv_ebi0:
288
+ vdda_hv_ebi1:
289
+ vdda_hv_ebi2:
290
+ vdda_hv_ebi3:
291
+ vdda_mipi_csi_1p25:
292
+ vdda_mipi_dsi0_1p2:
293
+ vdda_mipi_dsi1_1p2:
294
+ vdda_pcie_1p2:
295
+ vdda_ufs1_1p2:
296
+ vdda_ufs2_1p2:
297
+ vdda_usb1_ss_1p2:
298
+ vdda_usb2_ss_1p2:
299
+ vreg_l26a_1p2: ldo26 {
300
+ regulator-min-microvolt = <1200000>;
301
+ regulator-max-microvolt = <1200000>;
302
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
303
+ };
304
+
305
+ vreg_l28a_3p0: ldo28 {
306
+ regulator-min-microvolt = <2856000>;
307
+ regulator-max-microvolt = <3008000>;
308
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
309
+ };
310
+
311
+ vreg_lvs1a_1p8: lvs1 {
312
+ regulator-min-microvolt = <1800000>;
313
+ regulator-max-microvolt = <1800000>;
314
+ };
315
+
316
+ vreg_lvs2a_1p8: lvs2 {
317
+ regulator-min-microvolt = <1800000>;
318
+ regulator-max-microvolt = <1800000>;
319
+ };
320
+ };
321
+
322
+ pmi8998-rpmh-regulators {
323
+ compatible = "qcom,pmi8998-rpmh-regulators";
324
+ qcom,pmic-id = "b";
325
+
326
+ vdd-bob-supply = <&vph_pwr>;
327
+
328
+ vreg_bob: bob {
329
+ regulator-min-microvolt = <3312000>;
330
+ regulator-max-microvolt = <3600000>;
331
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
332
+ regulator-allow-bypass;
333
+ };
334
+ };
335
+
336
+ pm8005-rpmh-regulators {
337
+ compatible = "qcom,pm8005-rpmh-regulators";
338
+ qcom,pmic-id = "c";
339
+
340
+ vdd-s1-supply = <&vph_pwr>;
341
+ vdd-s2-supply = <&vph_pwr>;
342
+ vdd-s3-supply = <&vph_pwr>;
343
+ vdd-s4-supply = <&vph_pwr>;
344
+
345
+ vreg_s3c_0p6: smps3 {
346
+ regulator-min-microvolt = <600000>;
347
+ regulator-max-microvolt = <600000>;
348
+ };
349
+ };
350
+};
351
+
352
+&cdsp_pas {
353
+ status = "okay";
354
+ firmware-name = "qcom/sdm845/cdsp.mdt";
355
+};
356
+
357
+&dsi0 {
358
+ status = "okay";
359
+ vdda-supply = <&vdda_mipi_dsi0_1p2>;
360
+
361
+ qcom,dual-dsi-mode;
362
+ qcom,master-dsi;
363
+
364
+ #address-cells = <1>;
365
+ #size-cells = <0>;
366
+
367
+ ports {
368
+ port@1 {
369
+ endpoint {
370
+ remote-endpoint = <&truly_in_0>;
371
+ data-lanes = <0 1 2 3>;
372
+ };
373
+ };
374
+ };
375
+
376
+ panel@0 {
377
+ compatible = "truly,nt35597-2K-display";
378
+ reg = <0>;
379
+ vdda-supply = <&vreg_l14a_1p88>;
380
+
381
+ reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
382
+ mode-gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
383
+
384
+ ports {
385
+ #address-cells = <1>;
386
+ #size-cells = <0>;
387
+
388
+ port@0 {
389
+ reg = <0>;
390
+ truly_in_0: endpoint {
391
+ remote-endpoint = <&dsi0_out>;
392
+ };
393
+ };
394
+
395
+ port@1 {
396
+ reg = <1>;
397
+ truly_in_1: endpoint {
398
+ remote-endpoint = <&dsi1_out>;
399
+ };
400
+ };
401
+ };
402
+ };
403
+};
404
+
405
+&dsi0_phy {
406
+ status = "okay";
407
+ vdds-supply = <&vdda_mipi_dsi0_pll>;
408
+};
409
+
410
+&dsi1 {
411
+ status = "okay";
412
+ vdda-supply = <&vdda_mipi_dsi1_1p2>;
413
+
414
+ qcom,dual-dsi-mode;
415
+
416
+ ports {
417
+ port@1 {
418
+ endpoint {
419
+ remote-endpoint = <&truly_in_1>;
420
+ data-lanes = <0 1 2 3>;
421
+ };
422
+ };
423
+ };
424
+};
425
+
426
+&dsi1_phy {
427
+ status = "okay";
428
+ vdds-supply = <&vdda_mipi_dsi1_pll>;
429
+};
430
+
431
+&gcc {
432
+ protected-clocks = <GCC_QSPI_CORE_CLK>,
433
+ <GCC_QSPI_CORE_CLK_SRC>,
434
+ <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
435
+ <GCC_LPASS_Q6_AXI_CLK>,
436
+ <GCC_LPASS_SWAY_CLK>;
437
+};
438
+
439
+&gpu {
440
+ zap-shader {
441
+ memory-region = <&gpu_mem>;
442
+ firmware-name = "qcom/sdm845/a630_zap.mbn";
443
+ };
23444 };
24445
25446 &i2c10 {
....@@ -27,16 +448,122 @@
27448 clock-frequency = <400000>;
28449 };
29450
451
+&mdss {
452
+ status = "okay";
453
+};
454
+
455
+&mdss_mdp {
456
+ status = "okay";
457
+};
458
+
459
+&mss_pil {
460
+ status = "okay";
461
+ firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
462
+};
463
+
30464 &qupv3_id_1 {
31465 status = "okay";
32466 };
33467
34
-&tlmm {
35
- gpio-reserved-ranges = <0 4>, <81 4>;
468
+&sdhc_2 {
469
+ status = "okay";
470
+
471
+ pinctrl-names = "default";
472
+ pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_card_det_n>;
473
+
474
+ vmmc-supply = <&vreg_l21a_2p95>;
475
+ vqmmc-supply = <&vddpx_2>;
476
+
477
+ cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
36478 };
37479
38480 &uart9 {
39481 status = "okay";
482
+};
483
+
484
+&ufs_mem_hc {
485
+ status = "okay";
486
+
487
+ reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
488
+
489
+ vcc-supply = <&vreg_l20a_2p95>;
490
+ vcc-max-microamp = <600000>;
491
+};
492
+
493
+&ufs_mem_phy {
494
+ status = "okay";
495
+
496
+ vdda-phy-supply = <&vdda_ufs1_core>;
497
+ vdda-pll-supply = <&vdda_ufs1_1p2>;
498
+};
499
+
500
+&usb_1 {
501
+ status = "okay";
502
+};
503
+
504
+&usb_1_dwc3 {
505
+ /* Until we have Type C hooked up we'll force this as peripheral. */
506
+ dr_mode = "peripheral";
507
+};
508
+
509
+&usb_1_hsphy {
510
+ status = "okay";
511
+
512
+ vdd-supply = <&vdda_usb1_ss_core>;
513
+ vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
514
+ vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
515
+
516
+ qcom,imp-res-offset-value = <8>;
517
+ qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
518
+ qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
519
+ qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
520
+};
521
+
522
+&usb_1_qmpphy {
523
+ status = "okay";
524
+
525
+ vdda-phy-supply = <&vdda_usb1_ss_1p2>;
526
+ vdda-pll-supply = <&vdda_usb1_ss_core>;
527
+};
528
+
529
+&usb_2 {
530
+ status = "okay";
531
+};
532
+
533
+&usb_2_dwc3 {
534
+ /*
535
+ * Though the USB block on SDM845 can support host, there's no vbus
536
+ * signal for this port on MTP. Thus (unless you have a non-compliant
537
+ * hub that works without vbus) the only sensible thing is to force
538
+ * peripheral mode.
539
+ */
540
+ dr_mode = "peripheral";
541
+};
542
+
543
+&usb_2_hsphy {
544
+ status = "okay";
545
+
546
+ vdd-supply = <&vdda_usb2_ss_core>;
547
+ vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
548
+ vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
549
+
550
+ qcom,imp-res-offset-value = <8>;
551
+ qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
552
+};
553
+
554
+&usb_2_qmpphy {
555
+ status = "okay";
556
+
557
+ vdda-phy-supply = <&vdda_usb2_ss_1p2>;
558
+ vdda-pll-supply = <&vdda_usb2_ss_core>;
559
+};
560
+
561
+&wifi {
562
+ status = "okay";
563
+ vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
564
+ vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
565
+ vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
566
+ vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
40567 };
41568
42569 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
....@@ -62,3 +589,48 @@
62589 bias-pull-up;
63590 };
64591 };
592
+
593
+&tlmm {
594
+ gpio-reserved-ranges = <0 4>, <81 4>;
595
+
596
+ sdc2_clk: sdc2-clk {
597
+ pinconf {
598
+ pins = "sdc2_clk";
599
+ bias-disable;
600
+
601
+ /*
602
+ * It seems that mmc_test reports errors if drive
603
+ * strength is not 16 on clk, cmd, and data pins.
604
+ */
605
+ drive-strength = <16>;
606
+ };
607
+ };
608
+
609
+ sdc2_cmd: sdc2-cmd {
610
+ pinconf {
611
+ pins = "sdc2_cmd";
612
+ bias-pull-up;
613
+ drive-strength = <16>;
614
+ };
615
+ };
616
+
617
+ sdc2_data: sdc2-data {
618
+ pinconf {
619
+ pins = "sdc2_data";
620
+ bias-pull-up;
621
+ drive-strength = <16>;
622
+ };
623
+ };
624
+
625
+ sd_card_det_n: sd-card-det-n {
626
+ pinmux {
627
+ pins = "gpio126";
628
+ function = "gpio";
629
+ };
630
+
631
+ pinconf {
632
+ pins = "gpio126";
633
+ bias-pull-up;
634
+ };
635
+ };
636
+};