add dts config

hc

2023-12-06 08f87f769b595151be1afeff53e144f543faa614

 kernel/arch/arm/boot/dts/uniphier-ld4.dtsi
..
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@@ -51,7 +51,7 @@
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 		ranges;
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 		interrupt-parent = <&intc>;
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-		l2: l2-cache@500c0000 {
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+		l2: cache-controller@500c0000 {
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 			compatible = "socionext,uniphier-system-cache";
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 			reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
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 			      <0x506c0000 0x400>;
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@@ -61,6 +61,19 @@
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 			cache-sets = <256>;
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 			cache-line-size = <128>;
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 			cache-level = <2>;
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+		};
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+
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+		spi: spi@54006000 {
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+			compatible = "socionext,uniphier-scssi";
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+			status = "disabled";
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+			reg = <0x54006000 0x100>;
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+			#address-cells = <1>;
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+			#size-cells = <0>;
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+			interrupts = <0 39 4>;
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+			pinctrl-names = "default";
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+			pinctrl-0 = <&pinctrl_spi0>;
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+			clocks = <&peri_clk 11>;
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+			resets = <&peri_rst 11>;
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 		};
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 		serial0: serial@54006800 {
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@@ -224,6 +237,54 @@
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 			};
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 		};
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+		dmac: dma-controller@5a000000 {
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+			compatible = "socionext,uniphier-mio-dmac";
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+			reg = <0x5a000000 0x1000>;
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+			interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>,
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+				     <0 71 4>, <0 72 4>, <0 73 4>;
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+			clocks = <&mio_clk 7>;
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+			resets = <&mio_rst 7>;
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+			#dma-cells = <1>;
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+		};
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+
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+		sd: mmc@5a400000 {
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+			compatible = "socionext,uniphier-sd-v2.91";
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+			status = "disabled";
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+			reg = <0x5a400000 0x200>;
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+			interrupts = <0 76 4>;
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+			pinctrl-names = "default", "uhs";
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+			pinctrl-0 = <&pinctrl_sd>;
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+			pinctrl-1 = <&pinctrl_sd_uhs>;
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+			clocks = <&mio_clk 0>;
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+			reset-names = "host", "bridge";
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+			resets = <&mio_rst 0>, <&mio_rst 3>;
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+			dma-names = "rx-tx";
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+			dmas = <&dmac 4>;
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+			bus-width = <4>;
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+			cap-sd-highspeed;
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+			sd-uhs-sdr12;
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+			sd-uhs-sdr25;
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+			sd-uhs-sdr50;
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+		};
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+
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+		emmc: mmc@5a500000 {
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+			compatible = "socionext,uniphier-sd-v2.91";
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+			status = "disabled";
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+			reg = <0x5a500000 0x200>;
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+			interrupts = <0 78 4>;
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+			pinctrl-names = "default";
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+			pinctrl-0 = <&pinctrl_emmc>;
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+			clocks = <&mio_clk 1>;
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+			reset-names = "host", "bridge", "hw";
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+			resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>;
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+			dma-names = "rx-tx";
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+			dmas = <&dmac 6>;
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+			bus-width = <8>;
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+			cap-mmc-highspeed;
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+			cap-mmc-hw-reset;
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+			non-removable;
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+		};
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+
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 		usb0: usb@5a800100 {
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 			compatible = "socionext,uniphier-ehci", "generic-ehci";
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 			status = "disabled";
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@@ -316,7 +377,7 @@
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 			interrupt-controller;
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 		};
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-		aidet: aidet@61830000 {
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+		aidet: interrupt-controller@61830000 {
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 			compatible = "socionext,uniphier-ld4-aidet";
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 			reg = <0x61830000 0x200>;
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 			interrupt-controller;
..
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@@ -339,16 +400,20 @@
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 			};
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 		};
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-		nand: nand@68000000 {
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+		nand: nand-controller@68000000 {
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 			compatible = "socionext,uniphier-denali-nand-v5a";
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 			status = "disabled";
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 			reg-names = "nand_data", "denali_reg";
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 			reg = <0x68000000 0x20>, <0x68100000 0x1000>;
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+			#address-cells = <1>;
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+			#size-cells = <0>;
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 			interrupts = <0 65 4>;
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 			pinctrl-names = "default";
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-			pinctrl-0 = <&pinctrl_nand2cs>;
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-			clocks = <&sys_clk 2>;
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-			resets = <&sys_rst 2>;
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+			pinctrl-0 = <&pinctrl_nand>;
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+			clock-names = "nand", "nand_x", "ecc";
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+			clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
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+			reset-names = "nand", "reg";
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+			resets = <&sys_rst 2>, <&sys_rst 2>;
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 		};
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 	};
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 };