| .. | .. |
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| 25 | 25 | |
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| 26 | 26 | aliases { |
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| 27 | 27 | csis0 = &csis0; |
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| 28 | + dmc0 = &dmc0; |
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| 29 | + dmc1 = &dmc1; |
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| 28 | 30 | fimc0 = &fimc0; |
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| 29 | 31 | fimc1 = &fimc1; |
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| 30 | 32 | fimc2 = &fimc2; |
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| .. | .. |
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| 50 | 52 | }; |
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| 51 | 53 | }; |
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| 52 | 54 | |
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| 55 | + xxti: oscillator-0 { |
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| 56 | + compatible = "fixed-clock"; |
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| 57 | + clock-frequency = <0>; |
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| 58 | + clock-output-names = "xxti"; |
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| 59 | + #clock-cells = <0>; |
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| 60 | + }; |
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| 61 | + |
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| 62 | + xusbxti: oscillator-1 { |
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| 63 | + compatible = "fixed-clock"; |
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| 64 | + clock-frequency = <0>; |
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| 65 | + clock-output-names = "xusbxti"; |
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| 66 | + #clock-cells = <0>; |
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| 67 | + }; |
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| 68 | + |
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| 53 | 69 | soc { |
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| 54 | 70 | compatible = "simple-bus"; |
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| 55 | 71 | #address-cells = <1>; |
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| 56 | 72 | #size-cells = <1>; |
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| 57 | 73 | ranges; |
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| 58 | 74 | |
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| 59 | | - external-clocks { |
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| 60 | | - compatible = "simple-bus"; |
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| 61 | | - #address-cells = <1>; |
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| 62 | | - #size-cells = <0>; |
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| 63 | | - |
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| 64 | | - xxti: oscillator@0 { |
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| 65 | | - compatible = "fixed-clock"; |
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| 66 | | - reg = <0>; |
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| 67 | | - clock-frequency = <0>; |
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| 68 | | - clock-output-names = "xxti"; |
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| 69 | | - #clock-cells = <0>; |
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| 70 | | - }; |
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| 71 | | - |
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| 72 | | - xusbxti: oscillator@1 { |
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| 73 | | - compatible = "fixed-clock"; |
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| 74 | | - reg = <1>; |
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| 75 | | - clock-frequency = <0>; |
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| 76 | | - clock-output-names = "xusbxti"; |
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| 77 | | - #clock-cells = <0>; |
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| 78 | | - }; |
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| 79 | | - }; |
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| 80 | | - |
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| 81 | | - onenand: onenand@b0000000 { |
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| 75 | + onenand: onenand@b0600000 { |
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| 82 | 76 | compatible = "samsung,s5pv210-onenand"; |
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| 83 | 77 | reg = <0xb0600000 0x2000>, |
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| 84 | 78 | <0xb0000000 0x20000>, |
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| .. | .. |
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| 117 | 111 | interrupts = <30>; |
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| 118 | 112 | |
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| 119 | 113 | wakeup-interrupt-controller { |
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| 120 | | - compatible = "samsung,exynos4210-wakeup-eint"; |
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| 114 | + compatible = "samsung,s5pv210-wakeup-eint"; |
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| 121 | 115 | interrupts = <16>; |
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| 122 | 116 | interrupt-parent = <&vic0>; |
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| 123 | 117 | }; |
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| .. | .. |
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| 145 | 139 | #dma-cells = <1>; |
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| 146 | 140 | #dma-channels = <8>; |
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| 147 | 141 | #dma-requests = <32>; |
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| 142 | + }; |
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| 143 | + |
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| 144 | + adc: adc@e1700000 { |
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| 145 | + compatible = "samsung,s5pv210-adc"; |
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| 146 | + reg = <0xe1700000 0x1000>; |
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| 147 | + interrupt-parent = <&vic2>; |
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| 148 | + interrupts = <23>, <24>; |
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| 149 | + clocks = <&clocks CLK_TSADC>; |
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| 150 | + clock-names = "adc"; |
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| 151 | + #io-channel-cells = <1>; |
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| 152 | + io-channel-ranges; |
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| 153 | + status = "disabled"; |
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| 148 | 154 | }; |
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| 149 | 155 | |
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| 150 | 156 | spi0: spi@e1300000 { |
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| .. | .. |
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| 234 | 240 | reg = <0xeee30000 0x1000>; |
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| 235 | 241 | interrupt-parent = <&vic2>; |
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| 236 | 242 | interrupts = <16>; |
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| 237 | | - dma-names = "rx", "tx", "tx-sec"; |
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| 238 | | - dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>; |
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| 243 | + dma-names = "tx", "rx", "tx-sec"; |
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| 244 | + dmas = <&pdma1 10>, <&pdma1 9>, <&pdma1 11>; |
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| 239 | 245 | clock-names = "iis", |
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| 240 | 246 | "i2s_opclk0", |
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| 241 | 247 | "i2s_opclk1"; |
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| .. | .. |
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| 254 | 260 | reg = <0xe2100000 0x1000>; |
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| 255 | 261 | interrupt-parent = <&vic2>; |
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| 256 | 262 | interrupts = <17>; |
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| 257 | | - dma-names = "rx", "tx"; |
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| 258 | | - dmas = <&pdma1 12>, <&pdma1 13>; |
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| 263 | + dma-names = "tx", "rx"; |
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| 264 | + dmas = <&pdma1 13>, <&pdma1 12>; |
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| 259 | 265 | clock-names = "iis", "i2s_opclk0"; |
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| 260 | 266 | clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>; |
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| 261 | 267 | pinctrl-names = "default"; |
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| .. | .. |
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| 269 | 275 | reg = <0xe2a00000 0x1000>; |
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| 270 | 276 | interrupt-parent = <&vic2>; |
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| 271 | 277 | interrupts = <18>; |
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| 272 | | - dma-names = "rx", "tx"; |
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| 273 | | - dmas = <&pdma1 14>, <&pdma1 15>; |
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| 278 | + dma-names = "tx", "rx"; |
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| 279 | + dmas = <&pdma1 15>, <&pdma1 14>; |
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| 274 | 280 | clock-names = "iis", "i2s_opclk0"; |
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| 275 | 281 | clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>; |
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| 276 | 282 | pinctrl-names = "default"; |
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| .. | .. |
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| 494 | 500 | }; |
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| 495 | 501 | |
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| 496 | 502 | fimd: fimd@f8000000 { |
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| 497 | | - compatible = "samsung,exynos4210-fimd"; |
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| 503 | + compatible = "samsung,s5pv210-fimd"; |
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| 498 | 504 | interrupt-parent = <&vic2>; |
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| 499 | 505 | reg = <0xf8000000 0x20000>; |
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| 500 | 506 | interrupt-names = "fifo", "vsync", "lcd_sys"; |
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| .. | .. |
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| 502 | 508 | clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>; |
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| 503 | 509 | clock-names = "sclk_fimd", "fimd"; |
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| 504 | 510 | status = "disabled"; |
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| 511 | + }; |
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| 512 | + |
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| 513 | + dmc0: dmc@f0000000 { |
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| 514 | + compatible = "samsung,s5pv210-dmc"; |
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| 515 | + reg = <0xf0000000 0x1000>; |
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| 516 | + }; |
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| 517 | + |
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| 518 | + dmc1: dmc@f1400000 { |
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| 519 | + compatible = "samsung,s5pv210-dmc"; |
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| 520 | + reg = <0xf1400000 0x1000>; |
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| 505 | 521 | }; |
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| 506 | 522 | |
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| 507 | 523 | g2d: g2d@fa000000 { |
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| .. | .. |
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| 523 | 539 | #dma-cells = <1>; |
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| 524 | 540 | #dma-channels = <8>; |
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| 525 | 541 | #dma-requests = <1>; |
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| 542 | + }; |
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| 543 | + |
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| 544 | + rotator: rotator@fa300000 { |
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| 545 | + compatible = "samsung,s5pv210-rotator"; |
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| 546 | + reg = <0xfa300000 0x1000>; |
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| 547 | + interrupt-parent = <&vic2>; |
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| 548 | + interrupts = <4>; |
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| 549 | + clocks = <&clocks CLK_ROTATOR>; |
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| 550 | + clock-names = "rotator"; |
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| 526 | 551 | }; |
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| 527 | 552 | |
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| 528 | 553 | i2c1: i2c@fab00000 { |
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| .. | .. |
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| 547 | 572 | clock-names = "sclk_cam0", "sclk_cam1"; |
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| 548 | 573 | #address-cells = <1>; |
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| 549 | 574 | #size-cells = <1>; |
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| 575 | + #clock-cells = <1>; |
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| 576 | + clock-output-names = "cam_a_clkout", "cam_b_clkout"; |
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| 550 | 577 | ranges; |
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| 551 | | - |
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| 552 | | - clock_cam: clock-controller { |
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| 553 | | - #clock-cells = <1>; |
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| 554 | | - }; |
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| 555 | 578 | |
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| 556 | 579 | csis0: csis@fa600000 { |
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| 557 | 580 | compatible = "samsung,s5pv210-csis"; |
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| .. | .. |
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| 578 | 601 | clock-names = "fimc", |
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| 579 | 602 | "sclk_fimc"; |
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| 580 | 603 | samsung,pix-limits = <4224 8192 1920 4224>; |
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| 581 | | - samsung,mainscaler-ext; |
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| 604 | + samsung,min-pix-alignment = <16 8>; |
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| 582 | 605 | samsung,cam-if; |
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| 583 | 606 | }; |
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| 584 | 607 | |
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| .. | .. |
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| 592 | 615 | clock-names = "fimc", |
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| 593 | 616 | "sclk_fimc"; |
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| 594 | 617 | samsung,pix-limits = <4224 8192 1920 4224>; |
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| 618 | + samsung,min-pix-alignment = <1 1>; |
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| 595 | 619 | samsung,mainscaler-ext; |
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| 596 | 620 | samsung,cam-if; |
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| 621 | + samsung,lcd-wb; |
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| 597 | 622 | }; |
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| 598 | 623 | |
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| 599 | 624 | fimc2: fimc@fb400000 { |
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| .. | .. |
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| 605 | 630 | <&clocks SCLK_FIMC2>; |
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| 606 | 631 | clock-names = "fimc", |
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| 607 | 632 | "sclk_fimc"; |
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| 608 | | - samsung,pix-limits = <4224 8192 1920 4224>; |
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| 609 | | - samsung,mainscaler-ext; |
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| 610 | | - samsung,lcd-wb; |
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| 633 | + samsung,pix-limits = <1920 8192 1280 1920>; |
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| 634 | + samsung,min-pix-alignment = <16 8>; |
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| 635 | + samsung,rotators = <0>; |
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| 636 | + samsung,cam-if; |
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| 611 | 637 | }; |
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| 612 | 638 | }; |
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| 639 | + |
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| 640 | + jpeg_codec: jpeg-codec@fb600000 { |
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| 641 | + compatible = "samsung,s5pv210-jpeg"; |
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| 642 | + reg = <0xfb600000 0x1000>; |
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| 643 | + interrupt-parent = <&vic2>; |
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| 644 | + interrupts = <8>; |
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| 645 | + clocks = <&clocks CLK_JPEG>; |
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| 646 | + clock-names = "jpeg"; |
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| 647 | + }; |
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| 613 | 648 | }; |
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| 614 | 649 | }; |
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| 615 | 650 | |
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