| .. | .. |
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| 1 | 1 | /* |
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| 2 | 2 | * Device Tree Source for OMAP2420 SoC |
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| 3 | 3 | * |
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| 4 | | - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ |
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| 4 | + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ |
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| 5 | 5 | * |
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| 6 | 6 | * This file is licensed under the terms of the GNU General Public License |
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| 7 | 7 | * version 2. This program is licensed "as is" without any warranty of any |
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| .. | .. |
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| 68 | 68 | }; |
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| 69 | 69 | }; |
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| 70 | 70 | |
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| 71 | | - counter32k: counter@4000 { |
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| 72 | | - compatible = "ti,omap-counter32k"; |
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| 73 | | - reg = <0x4000 0x20>; |
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| 74 | | - ti,hwmods = "counter_32k"; |
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| 71 | + target-module@4000 { |
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| 72 | + compatible = "ti,sysc-omap2", "ti,sysc"; |
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| 73 | + reg = <0x4000 0x4>, |
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| 74 | + <0x4004 0x4>; |
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| 75 | + reg-names = "rev", "sysc"; |
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| 76 | + ti,sysc-sidle = <SYSC_IDLE_FORCE>, |
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| 77 | + <SYSC_IDLE_NO>; |
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| 78 | + clocks = <&func_32k_ck>; |
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| 79 | + clock-names = "fck"; |
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| 80 | + #address-cells = <1>; |
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| 81 | + #size-cells = <1>; |
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| 82 | + ranges = <0x0 0x4000 0x1000>; |
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| 83 | + |
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| 84 | + counter32k: counter@0 { |
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| 85 | + compatible = "ti,omap-counter32k"; |
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| 86 | + reg = <0 0x20>; |
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| 87 | + }; |
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| 75 | 88 | }; |
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| 76 | 89 | }; |
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| 77 | 90 | |
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| .. | .. |
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| 194 | 207 | }; |
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| 195 | 208 | }; |
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| 196 | 209 | |
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| 197 | | - timer1: timer@48028000 { |
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| 198 | | - compatible = "ti,omap2420-timer"; |
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| 199 | | - reg = <0x48028000 0x400>; |
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| 200 | | - interrupts = <37>; |
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| 201 | | - ti,hwmods = "timer1"; |
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| 202 | | - ti,timer-alwon; |
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| 210 | + timer1_target: target-module@48028000 { |
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| 211 | + compatible = "ti,sysc-omap2-timer", "ti,sysc"; |
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| 212 | + reg = <0x48028000 0x4>, |
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| 213 | + <0x48028010 0x4>, |
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| 214 | + <0x48028014 0x4>; |
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| 215 | + reg-names = "rev", "sysc", "syss"; |
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| 216 | + ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | |
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| 217 | + SYSC_OMAP2_EMUFREE | |
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| 218 | + SYSC_OMAP2_ENAWAKEUP | |
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| 219 | + SYSC_OMAP2_SOFTRESET | |
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| 220 | + SYSC_OMAP2_AUTOIDLE)>; |
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| 221 | + ti,sysc-sidle = <SYSC_IDLE_FORCE>, |
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| 222 | + <SYSC_IDLE_NO>, |
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| 223 | + <SYSC_IDLE_SMART>; |
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| 224 | + ti,syss-mask = <1>; |
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| 225 | + clocks = <&gpt1_fck>, <&gpt1_ick>; |
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| 226 | + clock-names = "fck", "ick"; |
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| 227 | + #address-cells = <1>; |
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| 228 | + #size-cells = <1>; |
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| 229 | + ranges = <0x0 0x48028000 0x1000>; |
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| 230 | + |
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| 231 | + timer1: timer@0 { |
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| 232 | + compatible = "ti,omap2420-timer"; |
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| 233 | + reg = <0 0x400>; |
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| 234 | + interrupts = <37>; |
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| 235 | + ti,timer-alwon; |
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| 236 | + }; |
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| 203 | 237 | }; |
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| 204 | 238 | |
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| 205 | 239 | wd_timer2: wdt@48022000 { |
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| .. | .. |
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| 218 | 252 | compatible = "ti,omap2420-i2c"; |
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| 219 | 253 | }; |
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| 220 | 254 | |
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| 221 | | -/include/ "omap24xx-clocks.dtsi" |
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| 222 | | -/include/ "omap2420-clocks.dtsi" |
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| 255 | +#include "omap24xx-clocks.dtsi" |
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| 256 | +#include "omap2420-clocks.dtsi" |
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| 257 | + |
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| 258 | +/* Preferred always-on timer for clockevent */ |
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| 259 | +&timer1_target { |
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| 260 | + ti,no-reset-on-init; |
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| 261 | + ti,no-idle; |
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| 262 | + timer@0 { |
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| 263 | + assigned-clocks = <&gpt1_fck>; |
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| 264 | + assigned-clock-parents = <&func_32k_ck>; |
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| 265 | + }; |
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| 266 | +}; |
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