| .. | .. |
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| 4 | 4 | // Copyright 2011 Linaro Ltd. |
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| 5 | 5 | |
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| 6 | 6 | #include <dt-bindings/clock/imx6qdl-clock.h> |
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| 7 | +#include <dt-bindings/input/input.h> |
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| 7 | 8 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
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| 8 | 9 | |
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| 9 | 10 | / { |
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| .. | .. |
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| 13 | 14 | * The decompressor and also some bootloaders rely on a |
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| 14 | 15 | * pre-existing /chosen node to be available to insert the |
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| 15 | 16 | * command line and merge other ATAGS info. |
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| 16 | | - * Also for U-Boot there must be a pre-existing /memory node. |
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| 17 | 17 | */ |
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| 18 | 18 | chosen {}; |
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| 19 | | - memory { device_type = "memory"; }; |
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| 20 | 19 | |
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| 21 | 20 | aliases { |
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| 22 | 21 | ethernet0 = &fec; |
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| .. | .. |
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| 68 | 67 | #clock-cells = <0>; |
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| 69 | 68 | clock-frequency = <24000000>; |
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| 70 | 69 | }; |
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| 71 | | - }; |
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| 72 | | - |
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| 73 | | - tempmon: tempmon { |
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| 74 | | - compatible = "fsl,imx6q-tempmon"; |
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| 75 | | - interrupt-parent = <&gpc>; |
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| 76 | | - interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>; |
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| 77 | | - fsl,tempmon = <&anatop>; |
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| 78 | | - fsl,tempmon-data = <&ocotp>; |
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| 79 | | - clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>; |
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| 80 | 70 | }; |
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| 81 | 71 | |
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| 82 | 72 | ldb: ldb { |
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| .. | .. |
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| 139 | 129 | interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>; |
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| 140 | 130 | }; |
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| 141 | 131 | |
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| 132 | + usbphynop1: usbphynop1 { |
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| 133 | + compatible = "usb-nop-xceiv"; |
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| 134 | + #phy-cells = <0>; |
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| 135 | + }; |
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| 136 | + |
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| 137 | + usbphynop2: usbphynop2 { |
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| 138 | + compatible = "usb-nop-xceiv"; |
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| 139 | + #phy-cells = <0>; |
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| 140 | + }; |
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| 141 | + |
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| 142 | 142 | soc { |
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| 143 | 143 | #address-cells = <1>; |
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| 144 | 144 | #size-cells = <1>; |
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| .. | .. |
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| 159 | 159 | clocks = <&clks IMX6QDL_CLK_APBH_DMA>; |
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| 160 | 160 | }; |
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| 161 | 161 | |
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| 162 | | - gpmi: gpmi-nand@112000 { |
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| 162 | + gpmi: nand-controller@112000 { |
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| 163 | 163 | compatible = "fsl,imx6q-gpmi-nand"; |
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| 164 | | - #address-cells = <1>; |
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| 165 | | - #size-cells = <1>; |
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| 166 | 164 | reg = <0x00112000 0x2000>, <0x00114000 0x2000>; |
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| 167 | 165 | reg-names = "gpmi-nand", "bch"; |
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| 168 | 166 | interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>; |
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| .. | .. |
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| 216 | 214 | <&clks IMX6QDL_CLK_GPU3D_SHADER>; |
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| 217 | 215 | clock-names = "bus", "core", "shader"; |
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| 218 | 216 | power-domains = <&pd_pu>; |
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| 217 | + #cooling-cells = <2>; |
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| 219 | 218 | }; |
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| 220 | 219 | |
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| 221 | 220 | gpu_2d: gpu@134000 { |
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| .. | .. |
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| 226 | 225 | <&clks IMX6QDL_CLK_GPU2D_CORE>; |
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| 227 | 226 | clock-names = "bus", "core"; |
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| 228 | 227 | power-domains = <&pd_pu>; |
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| 228 | + #cooling-cells = <2>; |
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| 229 | 229 | }; |
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| 230 | 230 | |
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| 231 | 231 | timer@a00600 { |
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| .. | .. |
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| 245 | 245 | interrupt-parent = <&intc>; |
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| 246 | 246 | }; |
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| 247 | 247 | |
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| 248 | | - L2: l2-cache@a02000 { |
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| 248 | + L2: cache-controller@a02000 { |
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| 249 | 249 | compatible = "arm,pl310-cache"; |
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| 250 | 250 | reg = <0x00a02000 0x1000>; |
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| 251 | 251 | interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>; |
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| .. | .. |
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| 268 | 268 | ranges = <0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */ |
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| 269 | 269 | 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ |
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| 270 | 270 | num-lanes = <1>; |
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| 271 | + num-viewport = <4>; |
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| 271 | 272 | interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; |
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| 272 | 273 | interrupt-names = "msi"; |
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| 273 | 274 | #interrupt-cells = <1>; |
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| .. | .. |
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| 283 | 284 | status = "disabled"; |
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| 284 | 285 | }; |
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| 285 | 286 | |
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| 286 | | - aips-bus@2000000 { /* AIPS1 */ |
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| 287 | + bus@2000000 { /* AIPS1 */ |
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| 287 | 288 | compatible = "fsl,aips-bus", "simple-bus"; |
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| 288 | 289 | #address-cells = <1>; |
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| 289 | 290 | #size-cells = <1>; |
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| .. | .. |
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| 317 | 318 | status = "disabled"; |
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| 318 | 319 | }; |
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| 319 | 320 | |
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| 320 | | - ecspi1: ecspi@2008000 { |
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| 321 | + ecspi1: spi@2008000 { |
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| 321 | 322 | #address-cells = <1>; |
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| 322 | 323 | #size-cells = <0>; |
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| 323 | 324 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
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| .. | .. |
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| 331 | 332 | status = "disabled"; |
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| 332 | 333 | }; |
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| 333 | 334 | |
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| 334 | | - ecspi2: ecspi@200c000 { |
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| 335 | + ecspi2: spi@200c000 { |
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| 335 | 336 | #address-cells = <1>; |
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| 336 | 337 | #size-cells = <0>; |
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| 337 | 338 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
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| .. | .. |
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| 345 | 346 | status = "disabled"; |
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| 346 | 347 | }; |
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| 347 | 348 | |
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| 348 | | - ecspi3: ecspi@2010000 { |
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| 349 | + ecspi3: spi@2010000 { |
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| 349 | 350 | #address-cells = <1>; |
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| 350 | 351 | #size-cells = <0>; |
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| 351 | 352 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
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| .. | .. |
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| 359 | 360 | status = "disabled"; |
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| 360 | 361 | }; |
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| 361 | 362 | |
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| 362 | | - ecspi4: ecspi@2014000 { |
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| 363 | + ecspi4: spi@2014000 { |
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| 363 | 364 | #address-cells = <1>; |
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| 364 | 365 | #size-cells = <0>; |
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| 365 | 366 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
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| .. | .. |
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| 498 | 499 | }; |
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| 499 | 500 | |
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| 500 | 501 | pwm1: pwm@2080000 { |
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| 501 | | - #pwm-cells = <2>; |
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| 502 | + #pwm-cells = <3>; |
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| 502 | 503 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
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| 503 | 504 | reg = <0x02080000 0x4000>; |
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| 504 | 505 | interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>; |
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| .. | .. |
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| 509 | 510 | }; |
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| 510 | 511 | |
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| 511 | 512 | pwm2: pwm@2084000 { |
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| 512 | | - #pwm-cells = <2>; |
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| 513 | + #pwm-cells = <3>; |
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| 513 | 514 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
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| 514 | 515 | reg = <0x02084000 0x4000>; |
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| 515 | 516 | interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>; |
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| .. | .. |
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| 520 | 521 | }; |
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| 521 | 522 | |
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| 522 | 523 | pwm3: pwm@2088000 { |
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| 523 | | - #pwm-cells = <2>; |
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| 524 | + #pwm-cells = <3>; |
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| 524 | 525 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
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| 525 | 526 | reg = <0x02088000 0x4000>; |
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| 526 | 527 | interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>; |
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| .. | .. |
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| 531 | 532 | }; |
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| 532 | 533 | |
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| 533 | 534 | pwm4: pwm@208c000 { |
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| 534 | | - #pwm-cells = <2>; |
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| 535 | + #pwm-cells = <3>; |
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| 535 | 536 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
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| 536 | 537 | reg = <0x0208c000 0x4000>; |
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| 537 | 538 | interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; |
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| .. | .. |
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| 548 | 549 | clocks = <&clks IMX6QDL_CLK_CAN1_IPG>, |
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| 549 | 550 | <&clks IMX6QDL_CLK_CAN1_SERIAL>; |
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| 550 | 551 | clock-names = "ipg", "per"; |
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| 552 | + fsl,stop-mode = <&gpr 0x34 28 0x10 17>; |
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| 551 | 553 | status = "disabled"; |
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| 552 | 554 | }; |
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| 553 | 555 | |
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| .. | .. |
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| 558 | 560 | clocks = <&clks IMX6QDL_CLK_CAN2_IPG>, |
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| 559 | 561 | <&clks IMX6QDL_CLK_CAN2_SERIAL>; |
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| 560 | 562 | clock-names = "ipg", "per"; |
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| 563 | + fsl,stop-mode = <&gpr 0x34 29 0x10 18>; |
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| 561 | 564 | status = "disabled"; |
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| 562 | 565 | }; |
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| 563 | 566 | |
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| 564 | | - gpt: gpt@2098000 { |
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| 567 | + gpt: timer@2098000 { |
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| 565 | 568 | compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt"; |
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| 566 | 569 | reg = <0x02098000 0x4000>; |
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| 567 | 570 | interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>; |
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| .. | .. |
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| 648 | 651 | #interrupt-cells = <2>; |
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| 649 | 652 | }; |
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| 650 | 653 | |
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| 651 | | - kpp: kpp@20b8000 { |
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| 654 | + kpp: keypad@20b8000 { |
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| 652 | 655 | compatible = "fsl,imx6q-kpp", "fsl,imx21-kpp"; |
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| 653 | 656 | reg = <0x020b8000 0x4000>; |
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| 654 | 657 | interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>; |
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| .. | .. |
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| 656 | 659 | status = "disabled"; |
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| 657 | 660 | }; |
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| 658 | 661 | |
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| 659 | | - wdog1: wdog@20bc000 { |
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| 662 | + wdog1: watchdog@20bc000 { |
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| 660 | 663 | compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; |
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| 661 | 664 | reg = <0x020bc000 0x4000>; |
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| 662 | 665 | interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>; |
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| 663 | | - clocks = <&clks IMX6QDL_CLK_DUMMY>; |
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| 666 | + clocks = <&clks IMX6QDL_CLK_IPG>; |
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| 664 | 667 | }; |
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| 665 | 668 | |
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| 666 | | - wdog2: wdog@20c0000 { |
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| 669 | + wdog2: watchdog@20c0000 { |
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| 667 | 670 | compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; |
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| 668 | 671 | reg = <0x020c0000 0x4000>; |
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| 669 | 672 | interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>; |
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| 670 | | - clocks = <&clks IMX6QDL_CLK_DUMMY>; |
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| 673 | + clocks = <&clks IMX6QDL_CLK_IPG>; |
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| 671 | 674 | status = "disabled"; |
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| 672 | 675 | }; |
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| 673 | 676 | |
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| 674 | | - clks: ccm@20c4000 { |
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| 677 | + clks: clock-controller@20c4000 { |
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| 675 | 678 | compatible = "fsl,imx6q-ccm"; |
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| 676 | 679 | reg = <0x020c4000 0x4000>; |
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| 677 | 680 | interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>, |
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| .. | .. |
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| 680 | 683 | }; |
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| 681 | 684 | |
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| 682 | 685 | anatop: anatop@20c8000 { |
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| 683 | | - compatible = "fsl,imx6q-anatop", "syscon", "simple-bus"; |
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| 686 | + compatible = "fsl,imx6q-anatop", "syscon", "simple-mfd"; |
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| 684 | 687 | reg = <0x020c8000 0x1000>; |
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| 685 | 688 | interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>, |
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| 686 | 689 | <0 54 IRQ_TYPE_LEVEL_HIGH>, |
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| .. | .. |
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| 753 | 756 | regulator-name = "vddpu"; |
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| 754 | 757 | regulator-min-microvolt = <725000>; |
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| 755 | 758 | regulator-max-microvolt = <1450000>; |
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| 756 | | - regulator-enable-ramp-delay = <150>; |
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| 759 | + regulator-enable-ramp-delay = <380>; |
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| 757 | 760 | anatop-reg-offset = <0x140>; |
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| 758 | 761 | anatop-vol-bit-shift = <9>; |
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| 759 | 762 | anatop-vol-bit-width = <5>; |
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| .. | .. |
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| 780 | 783 | anatop-min-bit-val = <1>; |
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| 781 | 784 | anatop-min-voltage = <725000>; |
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| 782 | 785 | anatop-max-voltage = <1450000>; |
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| 786 | + }; |
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| 787 | + |
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| 788 | + tempmon: tempmon { |
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| 789 | + compatible = "fsl,imx6q-tempmon"; |
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| 790 | + interrupt-parent = <&gpc>; |
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| 791 | + interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>; |
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| 792 | + fsl,tempmon = <&anatop>; |
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| 793 | + nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>; |
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| 794 | + nvmem-cell-names = "calib", "temp_grade"; |
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| 795 | + clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>; |
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| 796 | + #thermal-sensor-cells = <0>; |
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| 783 | 797 | }; |
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| 784 | 798 | }; |
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| 785 | 799 | |
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| .. | .. |
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| 820 | 834 | status = "disabled"; |
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| 821 | 835 | }; |
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| 822 | 836 | |
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| 837 | + snvs_pwrkey: snvs-powerkey { |
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| 838 | + compatible = "fsl,sec-v4.0-pwrkey"; |
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| 839 | + regmap = <&snvs>; |
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| 840 | + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; |
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| 841 | + linux,keycode = <KEY_POWER>; |
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| 842 | + wakeup-source; |
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| 843 | + status = "disabled"; |
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| 844 | + }; |
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| 845 | + |
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| 823 | 846 | snvs_lpgpr: snvs-lpgpr { |
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| 824 | 847 | compatible = "fsl,imx6q-snvs-lpgpr"; |
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| 825 | 848 | }; |
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| .. | .. |
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| 835 | 858 | interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; |
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| 836 | 859 | }; |
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| 837 | 860 | |
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| 838 | | - src: src@20d8000 { |
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| 861 | + src: reset-controller@20d8000 { |
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| 839 | 862 | compatible = "fsl,imx6q-src", "fsl,imx51-src"; |
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| 840 | 863 | reg = <0x020d8000 0x4000>; |
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| 841 | 864 | interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>, |
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| .. | .. |
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| 848 | 871 | reg = <0x020dc000 0x4000>; |
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| 849 | 872 | interrupt-controller; |
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| 850 | 873 | #interrupt-cells = <3>; |
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| 851 | | - interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>, |
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| 852 | | - <0 90 IRQ_TYPE_LEVEL_HIGH>; |
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| 874 | + interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; |
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| 853 | 875 | interrupt-parent = <&intc>; |
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| 854 | 876 | clocks = <&clks IMX6QDL_CLK_IPG>; |
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| 855 | 877 | clock-names = "ipg"; |
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| .. | .. |
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| 886 | 908 | }; |
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| 887 | 909 | }; |
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| 888 | 910 | |
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| 889 | | - iomuxc: iomuxc@20e0000 { |
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| 911 | + iomuxc: pinctrl@20e0000 { |
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| 890 | 912 | compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc"; |
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| 891 | 913 | reg = <0x20e0000 0x4000>; |
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| 892 | 914 | }; |
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| .. | .. |
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| 913 | 935 | }; |
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| 914 | 936 | }; |
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| 915 | 937 | |
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| 916 | | - aips-bus@2100000 { /* AIPS2 */ |
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| 938 | + bus@2100000 { /* AIPS2 */ |
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| 917 | 939 | compatible = "fsl,aips-bus", "simple-bus"; |
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| 918 | 940 | #address-cells = <1>; |
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| 919 | 941 | #size-cells = <1>; |
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| 920 | 942 | reg = <0x02100000 0x100000>; |
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| 921 | 943 | ranges; |
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| 922 | 944 | |
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| 923 | | - crypto: caam@2100000 { |
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| 945 | + crypto: crypto@2100000 { |
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| 924 | 946 | compatible = "fsl,sec-v4.0"; |
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| 925 | 947 | #address-cells = <1>; |
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| 926 | 948 | #size-cells = <1>; |
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| .. | .. |
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| 932 | 954 | <&clks IMX6QDL_CLK_EIM_SLOW>; |
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| 933 | 955 | clock-names = "mem", "aclk", "ipg", "emi_slow"; |
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| 934 | 956 | |
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| 935 | | - sec_jr0: jr0@1000 { |
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| 957 | + sec_jr0: jr@1000 { |
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| 936 | 958 | compatible = "fsl,sec-v4.0-job-ring"; |
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| 937 | 959 | reg = <0x1000 0x1000>; |
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| 938 | 960 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; |
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| 939 | 961 | }; |
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| 940 | 962 | |
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| 941 | | - sec_jr1: jr1@2000 { |
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| 963 | + sec_jr1: jr@2000 { |
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| 942 | 964 | compatible = "fsl,sec-v4.0-job-ring"; |
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| 943 | 965 | reg = <0x2000 0x1000>; |
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| 944 | 966 | interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; |
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| .. | .. |
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| 981 | 1003 | reg = <0x02184400 0x200>; |
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| 982 | 1004 | interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; |
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| 983 | 1005 | clocks = <&clks IMX6QDL_CLK_USBOH3>; |
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| 1006 | + fsl,usbphy = <&usbphynop1>; |
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| 1007 | + phy_type = "hsic"; |
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| 984 | 1008 | fsl,usbmisc = <&usbmisc 2>; |
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| 985 | 1009 | dr_mode = "host"; |
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| 986 | 1010 | ahb-burst-config = <0x0>; |
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| .. | .. |
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| 994 | 1018 | reg = <0x02184600 0x200>; |
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| 995 | 1019 | interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>; |
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| 996 | 1020 | clocks = <&clks IMX6QDL_CLK_USBOH3>; |
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| 1021 | + fsl,usbphy = <&usbphynop2>; |
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| 1022 | + phy_type = "hsic"; |
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| 997 | 1023 | fsl,usbmisc = <&usbmisc 3>; |
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| 998 | 1024 | dr_mode = "host"; |
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| 999 | 1025 | ahb-burst-config = <0x0>; |
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| .. | .. |
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| 1017 | 1043 | <0 119 IRQ_TYPE_LEVEL_HIGH>; |
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| 1018 | 1044 | clocks = <&clks IMX6QDL_CLK_ENET>, |
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| 1019 | 1045 | <&clks IMX6QDL_CLK_ENET>, |
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| 1046 | + <&clks IMX6QDL_CLK_ENET_REF>, |
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| 1020 | 1047 | <&clks IMX6QDL_CLK_ENET_REF>; |
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| 1021 | | - clock-names = "ipg", "ahb", "ptp"; |
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| 1048 | + clock-names = "ipg", "ahb", "ptp", "enet_out"; |
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| 1049 | + fsl,stop-mode = <&gpr 0x34 27>; |
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| 1022 | 1050 | status = "disabled"; |
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| 1023 | 1051 | }; |
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| 1024 | 1052 | |
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| .. | .. |
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| 1029 | 1057 | <0 126 IRQ_TYPE_LEVEL_HIGH>; |
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| 1030 | 1058 | }; |
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| 1031 | 1059 | |
|---|
| 1032 | | - usdhc1: usdhc@2190000 { |
|---|
| 1060 | + usdhc1: mmc@2190000 { |
|---|
| 1033 | 1061 | compatible = "fsl,imx6q-usdhc"; |
|---|
| 1034 | 1062 | reg = <0x02190000 0x4000>; |
|---|
| 1035 | 1063 | interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; |
|---|
| .. | .. |
|---|
| 1041 | 1069 | status = "disabled"; |
|---|
| 1042 | 1070 | }; |
|---|
| 1043 | 1071 | |
|---|
| 1044 | | - usdhc2: usdhc@2194000 { |
|---|
| 1072 | + usdhc2: mmc@2194000 { |
|---|
| 1045 | 1073 | compatible = "fsl,imx6q-usdhc"; |
|---|
| 1046 | 1074 | reg = <0x02194000 0x4000>; |
|---|
| 1047 | 1075 | interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; |
|---|
| .. | .. |
|---|
| 1053 | 1081 | status = "disabled"; |
|---|
| 1054 | 1082 | }; |
|---|
| 1055 | 1083 | |
|---|
| 1056 | | - usdhc3: usdhc@2198000 { |
|---|
| 1084 | + usdhc3: mmc@2198000 { |
|---|
| 1057 | 1085 | compatible = "fsl,imx6q-usdhc"; |
|---|
| 1058 | 1086 | reg = <0x02198000 0x4000>; |
|---|
| 1059 | 1087 | interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; |
|---|
| .. | .. |
|---|
| 1065 | 1093 | status = "disabled"; |
|---|
| 1066 | 1094 | }; |
|---|
| 1067 | 1095 | |
|---|
| 1068 | | - usdhc4: usdhc@219c000 { |
|---|
| 1096 | + usdhc4: mmc@219c000 { |
|---|
| 1069 | 1097 | compatible = "fsl,imx6q-usdhc"; |
|---|
| 1070 | 1098 | reg = <0x0219c000 0x4000>; |
|---|
| 1071 | 1099 | interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>; |
|---|
| .. | .. |
|---|
| 1111 | 1139 | reg = <0x021ac000 0x4000>; |
|---|
| 1112 | 1140 | }; |
|---|
| 1113 | 1141 | |
|---|
| 1114 | | - mmdc0: mmdc@21b0000 { /* MMDC0 */ |
|---|
| 1142 | + mmdc0: memory-controller@21b0000 { /* MMDC0 */ |
|---|
| 1115 | 1143 | compatible = "fsl,imx6q-mmdc"; |
|---|
| 1116 | 1144 | reg = <0x021b0000 0x4000>; |
|---|
| 1145 | + clocks = <&clks IMX6QDL_CLK_MMDC_P0_IPG>; |
|---|
| 1117 | 1146 | }; |
|---|
| 1118 | 1147 | |
|---|
| 1119 | | - mmdc1: mmdc@21b4000 { /* MMDC1 */ |
|---|
| 1148 | + mmdc1: memory-controller@21b4000 { /* MMDC1 */ |
|---|
| 1149 | + compatible = "fsl,imx6q-mmdc"; |
|---|
| 1120 | 1150 | reg = <0x021b4000 0x4000>; |
|---|
| 1151 | + status = "disabled"; |
|---|
| 1121 | 1152 | }; |
|---|
| 1122 | 1153 | |
|---|
| 1123 | 1154 | weim: weim@21b8000 { |
|---|
| .. | .. |
|---|
| 1131 | 1162 | status = "disabled"; |
|---|
| 1132 | 1163 | }; |
|---|
| 1133 | 1164 | |
|---|
| 1134 | | - ocotp: ocotp@21bc000 { |
|---|
| 1165 | + ocotp: efuse@21bc000 { |
|---|
| 1135 | 1166 | compatible = "fsl,imx6q-ocotp", "syscon"; |
|---|
| 1136 | 1167 | reg = <0x021bc000 0x4000>; |
|---|
| 1137 | 1168 | clocks = <&clks IMX6QDL_CLK_IIM>; |
|---|
| 1169 | + #address-cells = <1>; |
|---|
| 1170 | + #size-cells = <1>; |
|---|
| 1171 | + |
|---|
| 1172 | + cpu_speed_grade: speed-grade@10 { |
|---|
| 1173 | + reg = <0x10 4>; |
|---|
| 1174 | + }; |
|---|
| 1175 | + |
|---|
| 1176 | + tempmon_calib: calib@38 { |
|---|
| 1177 | + reg = <0x38 4>; |
|---|
| 1178 | + }; |
|---|
| 1179 | + |
|---|
| 1180 | + tempmon_temp_grade: temp-grade@20 { |
|---|
| 1181 | + reg = <0x20 4>; |
|---|
| 1182 | + }; |
|---|
| 1138 | 1183 | }; |
|---|
| 1139 | 1184 | |
|---|
| 1140 | 1185 | tzasc@21d0000 { /* TZASC1 */ |
|---|