add dts config

hc

2023-12-06 08f87f769b595151be1afeff53e144f543faa614

 kernel/arch/arm/boot/dts/bcm283x.dtsi
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@@ -3,6 +3,7 @@
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 #include <dt-bindings/clock/bcm2835-aux.h>
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 #include <dt-bindings/gpio/gpio.h>
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 #include <dt-bindings/interrupt-controller/irq.h>
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+#include <dt-bindings/soc/bcm2835-pm.h>
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 /* firmware-provided startup stubs live here, where the secondary CPUs are
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  * spinning.
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@@ -17,7 +18,6 @@
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 / {
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 	compatible = "brcm,bcm2835";
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 	model = "BCM2835";
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-	interrupt-parent = <&intc>;
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 	#address-cells = <1>;
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 	#size-cells = <1>;
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..
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@@ -30,12 +30,23 @@
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 		stdout-path = "serial0:115200n8";
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 	};
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+	rmem: reserved-memory {
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+		#address-cells = <1>;
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+		#size-cells = <1>;
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+		ranges;
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+
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+		cma: linux,cma {
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+			compatible = "shared-dma-pool";
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+			size = <0x4000000>; /* 64MB */
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+			reusable;
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+			linux,cma-default;
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+		};
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+	};
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+
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 	thermal-zones {
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 		cpu_thermal: cpu-thermal {
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 			polling-delay-passive = <0>;
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 			polling-delay = <1000>;
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-
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-			thermal-sensors = <&thermal>;
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 			trips {
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 				cpu-crit {
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@@ -55,7 +66,7 @@
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 		#address-cells = <1>;
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 		#size-cells = <1>;
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68
 
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-		timer@7e003000 {
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+		system_timer: timer@7e003000 {
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 			compatible = "brcm,bcm2835-system-timer";
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 			reg = <0x7e003000 0x1000>;
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 			interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
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@@ -66,63 +77,10 @@
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 			clock-frequency = <1000000>;
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 		};
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-		txp@7e004000 {
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+		txp: txp@7e004000 {
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 			compatible = "brcm,bcm2835-txp";
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 			reg = <0x7e004000 0x20>;
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 			interrupts = <1 11>;
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-		};
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-
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-		dma: dma@7e007000 {
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-			compatible = "brcm,bcm2835-dma";
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-			reg = <0x7e007000 0xf00>;
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-			interrupts = <1 16>,
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-				     <1 17>,
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-				     <1 18>,
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-				     <1 19>,
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-				     <1 20>,
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-				     <1 21>,
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-				     <1 22>,
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-				     <1 23>,
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-				     <1 24>,
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-				     <1 25>,
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-				     <1 26>,
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-				     /* dma channel 11-14 share one irq */
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-				     <1 27>,
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-				     <1 27>,
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-				     <1 27>,
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-				     <1 27>,
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-				     /* unused shared irq for all channels */
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-				     <1 28>;
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-			interrupt-names = "dma0",
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-					  "dma1",
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-					  "dma2",
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-					  "dma3",
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-					  "dma4",
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-					  "dma5",
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-					  "dma6",
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-					  "dma7",
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-					  "dma8",
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-					  "dma9",
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-					  "dma10",
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-					  "dma11",
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-					  "dma12",
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-					  "dma13",
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-					  "dma14",
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-					  "dma-shared-all";
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-			#dma-cells = <1>;
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-			brcm,dma-channel-mask = <0x7f35>;
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-		};
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-
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-		intc: interrupt-controller@7e00b200 {
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-			compatible = "brcm,bcm2835-armctrl-ic";
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-			reg = <0x7e00b200 0x200>;
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-			interrupt-controller;
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-			#interrupt-cells = <2>;
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-		};
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-
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-		watchdog@7e100000 {
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-			compatible = "brcm,bcm2835-pm-wdt";
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-			reg = <0x7e100000 0x28>;
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 		};
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 		clocks: cprman@7e101000 {
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@@ -137,12 +95,6 @@
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 			clocks = <&clk_osc>,
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 				<&dsi0 0>, <&dsi0 1>, <&dsi0 2>,
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 				<&dsi1 0>, <&dsi1 1>, <&dsi1 2>;
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-		};
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-
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-		rng@7e104000 {
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-			compatible = "brcm,bcm2835-rng";
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-			reg = <0x7e104000 0x10>;
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-			interrupts = <2 29>;
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 		};
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 		mailbox: mailbox@7e00b880 {
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@@ -174,8 +126,9 @@
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 			interrupt-controller;
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 			#interrupt-cells = <2>;
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128
 
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-			/* Defines pin muxing groups according to
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-			 * BCM2835-ARM-Peripherals.pdf page 102.
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+			gpio-ranges = <&gpio 0 0 54>;
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+
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+			/* Defines common pin muxing groups
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 			 *
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 			 * While each pin can have its mux selected
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 			 * for various functions individually, some
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@@ -253,15 +206,7 @@
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 				brcm,pins = <44 45>;
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 				brcm,function = <BCM2835_FSEL_ALT2>;
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 			};
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-			i2c_slave_gpio18: i2c_slave_gpio18 {
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-				brcm,pins = <18 19 20 21>;
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-				brcm,function = <BCM2835_FSEL_ALT3>;
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-			};
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-			jtag_gpio4: jtag_gpio4 {
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-				brcm,pins = <4 5 6 12 13>;
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-				brcm,function = <BCM2835_FSEL_ALT5>;
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-			};
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 			jtag_gpio22: jtag_gpio22 {
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 				brcm,pins = <22 23 24 25 26 27>;
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 				brcm,function = <BCM2835_FSEL_ALT4>;
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@@ -274,35 +219,6 @@
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 			pcm_gpio28: pcm_gpio28 {
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 				brcm,pins = <28 29 30 31>;
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 				brcm,function = <BCM2835_FSEL_ALT2>;
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-			};
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-
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-			pwm0_gpio12: pwm0_gpio12 {
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-				brcm,pins = <12>;
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-				brcm,function = <BCM2835_FSEL_ALT0>;
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-			};
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-			pwm0_gpio18: pwm0_gpio18 {
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-				brcm,pins = <18>;
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-				brcm,function = <BCM2835_FSEL_ALT5>;
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-			};
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-			pwm0_gpio40: pwm0_gpio40 {
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-				brcm,pins = <40>;
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-				brcm,function = <BCM2835_FSEL_ALT0>;
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-			};
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-			pwm1_gpio13: pwm1_gpio13 {
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-				brcm,pins = <13>;
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-				brcm,function = <BCM2835_FSEL_ALT0>;
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-			};
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-			pwm1_gpio19: pwm1_gpio19 {
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-				brcm,pins = <19>;
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-				brcm,function = <BCM2835_FSEL_ALT5>;
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-			};
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-			pwm1_gpio41: pwm1_gpio41 {
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-				brcm,pins = <41>;
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-				brcm,function = <BCM2835_FSEL_ALT0>;
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-			};
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-			pwm1_gpio45: pwm1_gpio45 {
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-				brcm,pins = <45>;
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-				brcm,function = <BCM2835_FSEL_ALT0>;
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 			};
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 			sdhost_gpio48: sdhost_gpio48 {
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@@ -386,8 +302,8 @@
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 		};
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 		uart0: serial@7e201000 {
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-			compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
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-			reg = <0x7e201000 0x1000>;
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+			compatible = "arm,pl011", "arm,primecell";
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+			reg = <0x7e201000 0x200>;
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 			interrupts = <2 25>;
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 			clocks = <&clocks BCM2835_CLOCK_UART>,
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 				 <&clocks BCM2835_CLOCK_VPU>;
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@@ -400,8 +316,6 @@
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 			reg = <0x7e202000 0x100>;
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 			interrupts = <2 24>;
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 			clocks = <&clocks BCM2835_CLOCK_VPU>;
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-			dmas = <&dma 13>;
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-			dma-names = "rx-tx";
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 			status = "disabled";
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 		};
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321
 
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@@ -409,16 +323,12 @@
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 			compatible = "brcm,bcm2835-i2s";
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 			reg = <0x7e203000 0x24>;
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 			clocks = <&clocks BCM2835_CLOCK_PCM>;
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-
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-			dmas = <&dma 2>,
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-			       <&dma 3>;
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-			dma-names = "tx", "rx";
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 			status = "disabled";
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 		};
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328
 
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 		spi: spi@7e204000 {
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 			compatible = "brcm,bcm2835-spi";
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-			reg = <0x7e204000 0x1000>;
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+			reg = <0x7e204000 0x200>;
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 			interrupts = <2 22>;
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 			clocks = <&clocks BCM2835_CLOCK_VPU>;
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 			#address-cells = <1>;
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@@ -428,24 +338,12 @@
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338
 
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 		i2c0: i2c@7e205000 {
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 			compatible = "brcm,bcm2835-i2c";
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-			reg = <0x7e205000 0x1000>;
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+			reg = <0x7e205000 0x200>;
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 			interrupts = <2 21>;
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 			clocks = <&clocks BCM2835_CLOCK_VPU>;
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 			#address-cells = <1>;
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 			#size-cells = <0>;
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 			status = "disabled";
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-		};
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-
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-		pixelvalve@7e206000 {
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-			compatible = "brcm,bcm2835-pixelvalve0";
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-			reg = <0x7e206000 0x100>;
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-			interrupts = <2 13>; /* pwa0 */
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-		};
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-
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-		pixelvalve@7e207000 {
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-			compatible = "brcm,bcm2835-pixelvalve1";
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-			reg = <0x7e207000 0x100>;
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-			interrupts = <2 14>; /* pwa1 */
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 		};
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 		dpi: dpi@7e208000 {
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@@ -476,14 +374,6 @@
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 					     "dsi0_ddr2",
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 					     "dsi0_ddr";
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479
-			status = "disabled";
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-		};
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-
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-		thermal: thermal@7e212000 {
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-			compatible = "brcm,bcm2835-thermal";
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-			reg = <0x7e212000 0x8>;
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-			clocks = <&clocks BCM2835_CLOCK_TSENS>;
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-			#thermal-sensor-cells = <0>;
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 			status = "disabled";
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 		};
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@@ -532,7 +422,7 @@
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 			status = "disabled";
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 		};
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-		sdhci: sdhci@7e300000 {
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+		sdhci: mmc@7e300000 {
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 			compatible = "brcm,bcm2835-sdhci";
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 			reg = <0x7e300000 0x100>;
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 			interrupts = <2 30>;
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@@ -576,41 +466,11 @@
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 			status = "disabled";
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 		};
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468
 
579
-		i2c2: i2c@7e805000 {
580
-			compatible = "brcm,bcm2835-i2c";
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-			reg = <0x7e805000 0x1000>;
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-			interrupts = <2 21>;
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-			clocks = <&clocks BCM2835_CLOCK_VPU>;
584
-			#address-cells = <1>;
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-			#size-cells = <0>;
586
-			status = "disabled";
587
-		};
588
-
589
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 		vec: vec@7e806000 {
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 			compatible = "brcm,bcm2835-vec";
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 			reg = <0x7e806000 0x1000>;
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 			clocks = <&clocks BCM2835_CLOCK_VEC>;
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 			interrupts = <2 27>;
594
-			status = "disabled";
595
-		};
596
-
597
-		pixelvalve@7e807000 {
598
-			compatible = "brcm,bcm2835-pixelvalve2";
599
-			reg = <0x7e807000 0x100>;
600
-			interrupts = <2 10>; /* pixelvalve */
601
-		};
602
-
603
-		hdmi: hdmi@7e902000 {
604
-			compatible = "brcm,bcm2835-hdmi";
605
-			reg = <0x7e902000 0x600>,
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-			      <0x7e808000 0x100>;
607
-			interrupts = <2 8>, <2 9>;
608
-			ddc = <&i2c2>;
609
-			clocks = <&clocks BCM2835_PLLH_PIX>,
610
-				 <&clocks BCM2835_CLOCK_HSM>;
611
-			clock-names = "pixel", "hdmi";
612
-			dmas = <&dma 17>;
613
-			dma-names = "audio-rx";
614
474
 			status = "disabled";
615
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 		};
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476
 
..
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@@ -625,35 +485,19 @@
625
485
 			phys = <&usbphy>;
626
486
 			phy-names = "usb2-phy";
627
487
 		};
628
-
629
-		v3d: v3d@7ec00000 {
630
-			compatible = "brcm,bcm2835-v3d";
631
-			reg = <0x7ec00000 0x1000>;
632
-			interrupts = <1 10>;
633
-		};
634
-
635
-		vc4: gpu {
636
-			compatible = "brcm,bcm2835-vc4";
637
-		};
638
488
 	};
639
489
 
640
490
 	clocks {
641
-		compatible = "simple-bus";
642
-		#address-cells = <1>;
643
-		#size-cells = <0>;
644
-
645
491
 		/* The oscillator is the root of the clock tree. */
646
-		clk_osc: clock@3 {
492
+		clk_osc: clk-osc {
647
493
 			compatible = "fixed-clock";
648
-			reg = <3>;
649
494
 			#clock-cells = <0>;
650
495
 			clock-output-names = "osc";
651
496
 			clock-frequency = <19200000>;
652
497
 		};
653
498
 
654
-		clk_usb: clock@4 {
499
+		clk_usb: clk-usb {
655
500
 			compatible = "fixed-clock";
656
-			reg = <4>;
657
501
 			#clock-cells = <0>;
658
502
 			clock-output-names = "otg";
659
503
 			clock-frequency = <480000000>;